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authorMaciej Pijanka <maciej.pijanka@gmail.com>2009-06-03 14:46:22 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-06-03 14:46:22 +0000
commitc6e1111bed4bea188c922ed27d5d00bf5efea8cd (patch)
treeae8c057c9f52e230cfd61ac74a58266d9733d1ff /flash.h
parent48f34c66d9f91bdaee542f2ea0257210f2841a3d (diff)
downloadast2050-flashrom-c6e1111bed4bea188c922ed27d5d00bf5efea8cd.zip
ast2050-flashrom-c6e1111bed4bea188c922ed27d5d00bf5efea8cd.tar.gz
Add probe_timing information (int uS value)
This eliminates the conflicting delay requirements for old and new chips with the same probing sequence. Corresponding to flashrom svn r569. Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'flash.h')
-rw-r--r--flash.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/flash.h b/flash.h
index 2a71761..f6cb0cd 100644
--- a/flash.h
+++ b/flash.h
@@ -155,6 +155,9 @@ struct flashchip {
uint32_t tested;
int (*probe) (struct flashchip *flash);
+
+ /* Delay after "enter/exit ID mode" commands in microseconds. */
+ int probe_timing;
int (*erase) (struct flashchip *flash);
int (*write) (struct flashchip *flash, uint8_t *buf);
int (*read) (struct flashchip *flash, uint8_t *buf);
@@ -182,6 +185,16 @@ struct flashchip {
#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
#define TEST_BAD_MASK 0xf0
+/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
+ * field and zero delay.
+ *
+ * SPI devices will always have zero delay and ignore this field.
+ */
+#define TIMING_FIXME -1
+/* this is intentionally same value as fixme */
+#define TIMING_IGNORED -1
+#define TIMING_ZERO -2
+
extern struct flashchip flashchips[];
struct penable {
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