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authorFENG yu ning <fengyuning1984@gmail.com>2008-12-08 18:16:58 +0000
committerStefan Reinauer <stefan.reinauer@coreboot.org>2008-12-08 18:16:58 +0000
commitc05a295dc33b273d16c2d289ffd95ba688727511 (patch)
treead6db2e33101079d2b713bef06666b5e8e937eec /flash.h
parentff692fb56777cbbf04e5c4858029340003190f5f (diff)
downloadast2050-flashrom-c05a295dc33b273d16c2d289ffd95ba688727511.zip
ast2050-flashrom-c05a295dc33b273d16c2d289ffd95ba688727511.tar.gz
Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPI configuration is locked down
Corresponding to flashrom svn r364 and coreboot v2 svn r3805. Signed-off-by: FENG yu ning <fengyuning1984@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
Diffstat (limited to 'flash.h')
-rw-r--r--flash.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/flash.h b/flash.h
index de9199c..c74c96f 100644
--- a/flash.h
+++ b/flash.h
@@ -51,6 +51,12 @@
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+/* for pairing opcodes with their required preop */
+struct preop_opcode_pair {
+ uint8_t preop;
+ uint8_t opcode;
+};
+
struct flashchip {
const char *vendor;
const char *name;
@@ -76,6 +82,8 @@ struct flashchip {
int (*write) (struct flashchip *flash, uint8_t *buf);
int (*read) (struct flashchip *flash, uint8_t *buf);
+ struct preop_opcode_pair *preop_opcode_pairs;
+
/* Some flash devices have an additional register space. */
volatile uint8_t *virtual_memory;
volatile uint8_t *virtual_registers;
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