summaryrefslogtreecommitdiffstats
path: root/flash.h
diff options
context:
space:
mode:
authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-09 02:30:21 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-09 02:30:21 +0000
commit96930c39524225cc55a5625e6e45d7519b3f2528 (patch)
tree40368d966ea3689aa4c8c2b020984671cc45d1d9 /flash.h
parent03adbe12691d512c0d9f28caa93cb35e468fd5d3 (diff)
downloadast2050-flashrom-96930c39524225cc55a5625e6e45d7519b3f2528.zip
ast2050-flashrom-96930c39524225cc55a5625e6e45d7519b3f2528.tar.gz
Chips like the SST SST25VF080B can only handle single byte writes outside AAI mode
Change SPI architecture to handle 1-byte chunk chip writing differently from 256-byte chunk chip writing. Annotate SPI chip write functions with _256 or _1 suffix denoting the number of bytes they write at maximum. The 1-byte chunk writing is cut-n-pasted to different SPI drivers right now. A later patch can move them to the generic spi_chip_write_1. Corresponding to flashrom svn r485. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'flash.h')
-rw-r--r--flash.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/flash.h b/flash.h
index 6b4dcb8..2b305b4 100644
--- a/flash.h
+++ b/flash.h
@@ -617,6 +617,7 @@ int spi_chip_erase_60_c7(struct flashchip *flash);
int spi_chip_erase_d8(struct flashchip *flash);
int spi_block_erase_52(const struct flashchip *flash, unsigned long addr);
int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr);
+int spi_chip_write_1(struct flashchip *flash, uint8_t *buf);
int spi_chip_write(struct flashchip *flash, uint8_t *buf);
int spi_chip_read(struct flashchip *flash, uint8_t *buf);
uint8_t spi_read_status_register(void);
@@ -645,7 +646,7 @@ int ich_init_opcodes(void);
int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int ich_spi_read(struct flashchip *flash, uint8_t * buf);
-int ich_spi_write(struct flashchip *flash, uint8_t * buf);
+int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
/* it87spi.c */
extern uint16_t it8716f_flashport;
@@ -653,13 +654,14 @@ int it87xx_probe_spi_flash(const char *name);
int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
-int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
+int it8716f_spi_chip_write_1(struct flashchip *flash, uint8_t *buf);
+int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
/* sb600spi.c */
int sb600_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int sb600_spi_read(struct flashchip *flash, uint8_t *buf);
-int sb600_spi_write(struct flashchip *flash, uint8_t *buf);
+int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
uint8_t sb600_read_status_register(void);
extern uint8_t volatile *sb600_spibar;
@@ -758,7 +760,7 @@ int write_49f002(struct flashchip *flash, uint8_t *buf);
int wbsio_check_for_spi(const char *name);
int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int wbsio_spi_read(struct flashchip *flash, uint8_t *buf);
-int wbsio_spi_write(struct flashchip *flash, uint8_t *buf);
+int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
/* stm50flw0x0x.c */
int probe_stm50flw0x0x(struct flashchip *flash);
OpenPOWER on IntegriCloud