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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-31 17:57:34 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-31 17:57:34 +0000
commit1dfe0ff1745118406f2ca0d03340dd346cc39770 (patch)
tree8b0f6db0abbbd38355b6ddf8feadb7b06a4e9bab /flash.h
parentebd7b8393906876d4b450d8b83a9b748d43c64b4 (diff)
downloadast2050-flashrom-1dfe0ff1745118406f2ca0d03340dd346cc39770.zip
ast2050-flashrom-1dfe0ff1745118406f2ca0d03340dd346cc39770.tar.gz
Add bus type annotation to struct flashchips
Right now, the annotation only differentiates between SPI and non-SPI. Anyone who knows more about a specific flash chip should feel free to update it. The existing flashbus variable was abused to denote the SPI controller type. Use an aptly named variable for that purpose. Once this patch is merged, the chipset/programmer init functions can set supported flash chip types and flashrom can automatically select only matching probe/read/erase/write functions. A side benefit of that will be the elimination of the Winbond W29EE011 vs. AMIC A49LF040A conflict. Corresponding to flashrom svn r556. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'flash.h')
-rw-r--r--flash.h39
1 files changed, 25 insertions, 14 deletions
diff --git a/flash.h b/flash.h
index fd15e87..c056f6e 100644
--- a/flash.h
+++ b/flash.h
@@ -120,9 +120,21 @@ uint32_t chip_readl(const chipaddr addr);
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+enum chipbustype {
+ CHIP_BUSTYPE_PARALLEL = 1 << 0,
+ CHIP_BUSTYPE_LPC = 1 << 1,
+ CHIP_BUSTYPE_FWH = 1 << 2,
+ CHIP_BUSTYPE_SPI = 1 << 3,
+ CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH,
+ CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI,
+};
+
struct flashchip {
const char *vendor;
const char *name;
+
+ enum chipbustype bustype;
+
/*
* With 32bit manufacture_id and model_id we can cover IDs up to
* (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
@@ -592,25 +604,12 @@ int board_flash_enable(const char *vendor, const char *part);
void print_supported_boards(void);
/* chipset_enable.c */
+extern enum chipbustype buses_supported;
int chipset_flash_enable(void);
void print_supported_chipsets(void);
extern unsigned long flashbase;
-typedef enum {
- BUS_TYPE_LPC,
- BUS_TYPE_ICH7_SPI,
- BUS_TYPE_ICH9_SPI,
- BUS_TYPE_IT87XX_SPI,
- BUS_TYPE_SB600_SPI,
- BUS_TYPE_VIA_SPI,
- BUS_TYPE_WBSIO_SPI,
- BUS_TYPE_DUMMY_SPI
-} flashbus_t;
-
-extern flashbus_t flashbus;
-extern void *spibar;
-
/* physmap.c */
void *physmap(const char *descr, unsigned long phys_addr, size_t len);
void physunmap(void *virt_addr, size_t len);
@@ -691,6 +690,18 @@ int coreboot_init(void);
extern char *lb_part, *lb_vendor;
/* spi.c */
+enum spi_controller {
+ SPI_CONTROLLER_NONE,
+ SPI_CONTROLLER_ICH7,
+ SPI_CONTROLLER_ICH9,
+ SPI_CONTROLLER_IT87XX,
+ SPI_CONTROLLER_SB600,
+ SPI_CONTROLLER_VIA,
+ SPI_CONTROLLER_WBSIO,
+ SPI_CONTROLLER_DUMMY,
+};
+extern enum spi_controller spi_controller;
+extern void *spibar;
int probe_spi_rdid(struct flashchip *flash);
int probe_spi_rdid4(struct flashchip *flash);
int probe_spi_rems(struct flashchip *flash);
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