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authorDavid Hendricks <dhendrix@google.com>2010-01-19 02:19:27 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2010-01-19 02:19:27 +0000
commitdb7c153cdd0eb3de235bfcfac23709c2feef52e1 (patch)
treea428a83bc9ddfc8e89bd0d05d5192e5809ef3eb0 /chipset_enable.c
parent2aff7aa03fd8ef96f96330301fc1c73551aef81e (diff)
downloadast2050-flashrom-db7c153cdd0eb3de235bfcfac23709c2feef52e1.zip
ast2050-flashrom-db7c153cdd0eb3de235bfcfac23709c2feef52e1.tar.gz
Add Intel NM10 chipset enable
Public chipset documentation available at http://www.intel.com/Assets/PDF/datasheet/322896.pdf Tested on NM10-based customer reference board from Intel. Corresponding to flashrom svn r866. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 0f42c7f..50e62b1 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1156,6 +1156,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7},
{0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7},
{0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7},
+ {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7},
{0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e},
{0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8},
{0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8},
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