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| author | Dominik Geyer <dominik.geyer@kontron.com> | 2008-05-16 12:55:55 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-16 12:55:55 +0000 |
| commit | b46acba6e0da846f5c29f26ac8ec11733adc19f6 (patch) | |
| tree | 92a8d5578a46b441f559ebd626cc3c541d9e0683 /chipset_enable.c | |
| parent | 337df1d618327e9e440d21725dd9486f3c179898 (diff) | |
| download | ast2050-flashrom-b46acba6e0da846f5c29f26ac8ec11733adc19f6.zip ast2050-flashrom-b46acba6e0da846f5c29f26ac8ec11733adc19f6.tar.gz | |
Add support for SPI chips on ICH9
This is done by using the generic SPI interface.
Corresponding to flashrom svn r239 and coreboot v2 svn r3325.
Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 3dec881..fdcae7b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -198,7 +198,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsign /* Calculate the Root Complex Register Block address */ tmp &= 0xffffc000; printf_debug("Root Complex Register Block address = 0x%x\n", tmp); - rcrb = mmap(0, 0x4000, PROT_READ, MAP_SHARED, fd_mem, (off_t)tmp); + rcrb = mmap(0, 0x4000, PROT_READ | PROT_WRITE, MAP_SHARED, fd_mem, (off_t)tmp); if (rcrb == MAP_FAILED) { perror("Can't mmap memory using " MEM_DEV); exit(1); |
