summaryrefslogtreecommitdiffstats
path: root/chipset_enable.c
diff options
context:
space:
mode:
authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2010-05-28 15:53:08 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2010-05-28 15:53:08 +0000
commit80f3d05e7356ec85f9ea27ae2e11245e0b6bb3c6 (patch)
tree3a8deb77453a25d539577a7bfe50aa2bf98682f6 /chipset_enable.c
parent4073c09556e4fd75fa58102b24b1b6e3aabbe124 (diff)
downloadast2050-flashrom-80f3d05e7356ec85f9ea27ae2e11245e0b6bb3c6.zip
ast2050-flashrom-80f3d05e7356ec85f9ea27ae2e11245e0b6bb3c6.tar.gz
ichspi: try harder to conform to address restrictions
ICH SPI can enforce address restrictions for all accesses which take an address (well, it could if the chipset implementation was not broken). Since exploiting the broken implementation is harder than conforming to the address restrictions wherever possible, conform to the address restrictions instead. This patch eliminates a lot of transaction errors people were seeing on chip probe. Corresponding to flashrom svn r1016. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 76893a1..04b1a1c 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -36,8 +36,6 @@
#if defined(__i386__) || defined(__x86_64__)
-extern int ichspi_lock;
-
static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
{
uint8_t tmp;
@@ -515,8 +513,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name,
msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4,
mmio_readl(spibar + offs + 4), i);
}
+ ichspi_bbar = mmio_readl(spibar + 0x50);
msg_pdbg("0x50: 0x%08x (BBAR)\n",
- mmio_readl(spibar + 0x50));
+ ichspi_bbar);
msg_pdbg("0x54: 0x%04x (PREOP)\n",
mmio_readw(spibar + 0x54));
msg_pdbg("0x56: 0x%04x (OPTYPE)\n",
@@ -587,8 +586,9 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name,
mmio_readl(spibar + 0x98));
msg_pdbg("0x9C: 0x%08x (OPMENU+4)\n",
mmio_readl(spibar + 0x9C));
+ ichspi_bbar = mmio_readl(spibar + 0xA0);
msg_pdbg("0xA0: 0x%08x (BBAR)\n",
- mmio_readl(spibar + 0xA0));
+ ichspi_bbar);
msg_pdbg("0xB0: 0x%08x (FDOC)\n",
mmio_readl(spibar + 0xB0));
if (tmp2 & (1 << 15)) {
OpenPOWER on IntegriCloud