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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-11-26 16:51:39 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-11-26 16:51:39 +0000 |
| commit | 797a8346cf8f07e6acfd29a370a2f40138470d94 (patch) | |
| tree | 3e9502680cf7012d60cb8e4e320616170d4feb54 /chipset_enable.c | |
| parent | 972cec282c061dadd3c501221d20d8b6437057e7 (diff) | |
| download | ast2050-flashrom-797a8346cf8f07e6acfd29a370a2f40138470d94.zip ast2050-flashrom-797a8346cf8f07e6acfd29a370a2f40138470d94.tar.gz | |
Add support for Intel 3400 series / 5 series chipset
Found in Intel document 322170 (Intel 5 Series Chipset and Intel 3400
Series Chipset Specification Update).
According to http://pciids.sourceforge.net/ we probably should match all
IDs from 0x3b00-0x3b1f, but so far I didn't find an Intel doc saying the
same.
If anybody has contacts at Intel and can check, I'd be happy to add the
rest of the IDs.
Corresponding to flashrom svn r784.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 7038ea8..3be7763 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1097,6 +1097,9 @@ const struct penable chipset_enables[] = { {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, |
