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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-12-13 22:28:00 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-12-13 22:28:00 +0000
commit66ef4e5ff32b1d19281c9d6723b1acfe566f9763 (patch)
treedf65fe458cd52070208d9e46e23418a015b16696 /chipset_enable.c
parenta7e30503fad58008e739627dcb84348ded8ef572 (diff)
downloadast2050-flashrom-66ef4e5ff32b1d19281c9d6723b1acfe566f9763.zip
ast2050-flashrom-66ef4e5ff32b1d19281c9d6723b1acfe566f9763.tar.gz
Internal (onboard) programming was the only feature which could not be disabled
Make various pieces of code conditional on support for internal programming. Code shared between PCI device programmers and onboard programming is now conditional as well. It is now possible to build only with dummy support: make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no This allows building for a specific use case only, and it also facilitates porting to a new architecture because it is possible to focus on highlevel code only. Note: Either internal or dummy programmer needs to be compiled in due to the current behaviour of always picking a default programmer if -p is not specified. Picking an arbitrary external programmer as default wouldn't make sense. Build and runtime tested in all 1024 possible build combinations. The only failures are by design as mentioned above. Corresponding to flashrom svn r797. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c21
1 files changed, 0 insertions, 21 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 3bdd7d0..333d79d 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -32,27 +32,6 @@
#include <fcntl.h>
#include "flash.h"
-unsigned long flashbase = 0;
-
-/**
- * flashrom defaults to Parallel/LPC/FWH flash devices. If a known host
- * controller is found, the init routine sets the buses_supported bitfield to
- * contain the supported buses for that controller.
- */
-
-enum chipbustype buses_supported = CHIP_BUSTYPE_NONSPI;
-
-/**
- * Programmers supporting multiple buses can have differing size limits on
- * each bus. Store the limits for each bus in a common struct.
- */
-struct decode_sizes max_rom_decode = {
- .parallel = 0xffffffff,
- .lpc = 0xffffffff,
- .fwh = 0xffffffff,
- .spi = 0xffffffff
-};
-
extern int ichspi_lock;
static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
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