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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-16 14:39:39 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-16 14:39:39 +0000
commit1b18b3c076713aa73a9c8251dc0b83a80f413897 (patch)
tree4e56ddab461a6179d1ba495621a695e346a9fc2e /chipset_enable.c
parentf5430bde52a0950fca878e055bdef80c291d13ad (diff)
downloadast2050-flashrom-1b18b3c076713aa73a9c8251dc0b83a80f413897.zip
ast2050-flashrom-1b18b3c076713aa73a9c8251dc0b83a80f413897.tar.gz
ICH8 and ICH9 have an almost identical SPI interface, only the location of the SPIBAR differs
Add ICH8 support to the ICH9 code. Corresponding to flashrom svn r241 and coreboot v2 svn r3327. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c26
1 files changed, 16 insertions, 10 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index fdcae7b..8dca68f 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -234,13 +234,19 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsign
return enable_flash_ich_dc(dev, name);
}
-static int enable_flash_ich78(struct pci_dev *dev, const char *name)
+static int enable_flash_ich7(struct pci_dev *dev, const char *name)
{
return enable_flash_ich_dc_spi(dev, name, 0x3020);
}
int ich9_detected = 0;
+static int enable_flash_ich8(struct pci_dev *dev, const char *name)
+{
+ ich9_detected = 1;
+ return enable_flash_ich_dc_spi(dev, name, 0x3020);
+}
+
static int enable_flash_ich9(struct pci_dev *dev, const char *name)
{
ich9_detected = 1;
@@ -597,15 +603,15 @@ static const FLASH_ENABLE enables[] = {
{0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e},
{0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc},
{0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc},
- {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich78},
- {0x8086, 0x27b8, "Intel ICH7/ICH7R", enable_flash_ich78},
- {0x8086, 0x27b9, "Intel ICH7M", enable_flash_ich78},
- {0x8086, 0x27bd, "Intel ICH7MDH", enable_flash_ich78},
- {0x8086, 0x2810, "Intel ICH8/ICH8R", enable_flash_ich78},
- {0x8086, 0x2811, "Intel ICH8M-E", enable_flash_ich78},
- {0x8086, 0x2812, "Intel ICH8DH", enable_flash_ich78},
- {0x8086, 0x2814, "Intel ICH8DO", enable_flash_ich78},
- {0x8086, 0x2815, "Intel ICH8M", enable_flash_ich78},
+ {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich7},
+ {0x8086, 0x27b8, "Intel ICH7/ICH7R", enable_flash_ich7},
+ {0x8086, 0x27b9, "Intel ICH7M", enable_flash_ich7},
+ {0x8086, 0x27bd, "Intel ICH7MDH", enable_flash_ich7},
+ {0x8086, 0x2810, "Intel ICH8/ICH8R", enable_flash_ich8},
+ {0x8086, 0x2811, "Intel ICH8M-E", enable_flash_ich8},
+ {0x8086, 0x2812, "Intel ICH8DH", enable_flash_ich8},
+ {0x8086, 0x2814, "Intel ICH8DO", enable_flash_ich8},
+ {0x8086, 0x2815, "Intel ICH8M", enable_flash_ich8},
{0x8086, 0x2912, "Intel ICH9DH", enable_flash_ich9},
{0x8086, 0x2914, "Intel ICH9DO", enable_flash_ich9},
{0x8086, 0x2916, "Intel ICH9R", enable_flash_ich9},
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