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authorStefan Reinauer <stepan@coresystems.de>2009-01-26 01:10:48 +0000
committerPeter Stuge <peter@stuge.se>2009-01-26 01:10:48 +0000
commit0593f21f1049e2dc8df1e2920c29ce9e93f7a663 (patch)
treea542b94c7b06b0242a00a3e6c538a475bb2f86e5 /chipset_enable.c
parent776d2021fd27ada1874cbe795b57f3cce1834c8b (diff)
downloadast2050-flashrom-0593f21f1049e2dc8df1e2920c29ce9e93f7a663.zip
ast2050-flashrom-0593f21f1049e2dc8df1e2920c29ce9e93f7a663.tar.gz
Abstract mmap() in physmap.c and only open /dev/mem on the first physmap() call
Corresponding to flashrom svn r397 and coreboot v2 svn r3903. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c34
1 files changed, 4 insertions, 30 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index d7eb7fa..7298729 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -215,14 +215,7 @@ static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name)
mmio_base = (pci_read_long(dev, 0xbc)) << 8;
printf_debug("MMIO base at = 0x%x\n", mmio_base);
- spibar = mmap(NULL, 0x70, PROT_READ | PROT_WRITE, MAP_SHARED,
- fd_mem, mmio_base);
-
- if (spibar == MAP_FAILED) {
- perror("Can't mmap memory using " MEM_DEV);
- mmap_errmsg();
- exit(1);
- }
+ spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70);
printf_debug("0x6c: 0x%04x (CLOCK/DEBUG)\n",
*(uint16_t *) (spibar + 0x6c));
@@ -252,13 +245,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name,
printf_debug("\nRoot Complex Register Block address = 0x%x\n", tmp);
/* Map RCBA to virtual memory */
- rcrb = mmap(0, 0x4000, PROT_READ | PROT_WRITE, MAP_SHARED, fd_mem,
- (off_t) tmp);
- if (rcrb == MAP_FAILED) {
- perror("Can't mmap memory using " MEM_DEV);
- mmap_errmsg();
- exit(1);
- }
+ rcrb = physmap("ICH RCRB", tmp, 0x4000);
gcs = *(volatile uint32_t *)(rcrb + 0x3410);
printf_debug("GCS = 0x%x: ", gcs);
@@ -679,13 +666,7 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name)
tmp &= 0xffffc000;
printf_debug("SPI base address is at 0x%x\n", tmp + low_bits);
- sb600_spibar = mmap(0, 0x4000, PROT_READ | PROT_WRITE, MAP_SHARED,
- fd_mem, (off_t)tmp);
- if (sb600_spibar == MAP_FAILED) {
- perror("Can't mmap memory using " MEM_DEV);
- mmap_errmsg();
- exit(1);
- }
+ sb600_spibar = physmap("SB600 SPI registers", tmp, 0x4000);
sb600_spibar += low_bits;
/* Clear ROM protect 0-3. */
@@ -835,14 +816,7 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name)
void *mmcr;
/* 1. Map MMCR */
- mmcr = mmap(0, getpagesize(), PROT_WRITE | PROT_READ,
- MAP_SHARED, fd_mem, (off_t)0xFFFEF000);
-
- if (mmcr == MAP_FAILED) {
- perror("Can't mmap Elan SC520 specific registers using " MEM_DEV);
- mmap_errmsg();
- exit(1);
- }
+ mmcr = physmap("Elan SC520 MMCR", 0xfffef000, getpagesize());
/* 2. Scan PAR0 (0x88) - PAR15 (0xc4) for
* BOOTCS region (PARx[31:29] = 100b)e
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