path: root/chipset_enable.c
diff options
authorPaul Menzel <>2011-10-21 12:33:07 +0000
committerStefan Tauner <>2011-10-21 12:33:07 +0000
commit018d482536f2fa7897a03849374b5ec9cd2414f5 (patch)
tree7caa605a8a4cca7500139f1ec413577a49b43d9e /chipset_enable.c
parent7189a5ff8cb8cfc33ef2c0be3268204064a2771b (diff)
Add a bunch of new/tested stuff and various small changes 8
Tested mainboards: OK: - ASUS Crosshair II Formula - ASUS K8N - ASUS M2N-E SLI - ASUS M3N78-VM - ASUS M4A78LT-M LE - ASUS M4A89GTD PRO - MSI A75MA-G55 (MS-7696) - PCCHIPS M598LMR (V9.0) - ECS P4VXMS (V1.0A) - Foxconn P4M800P7MA-RS2 - GIGABYTE GA-P67A-UD3P - GIGABYTE Z68MX-UD2H-B - ZOTAC Fusion-ITX WiFi (FUSION350-A-E) NOT OK: - ASUS P8B-E/4L - ASUS P8B WS Tested chipsets: - MCP78S (:075d) - VT8233 (:3074) - SiS 530 (:0530) - P67 (:1c46) - Z68 (:1c44) Tested flash chips: - mark AMIC A29002T as TEST_OK_PREW - mark Eon EN29F002(A)(N)T as TEST_OK_PREW - mark EonEN25F16 as TEST_OK_PREW - mark Macronix MX29F002(N)T as TEST_OK_PREW - mark Pm39LV040 as TEST_OK_PR - mark Pm39LV010 as TEST_OK_PREW - mark SST49LF008A as TEST_OK_PREW - mark SyncMOS {F,S,V}29C51002T as TEST_OK_PREW - mark W39V040B as write tested - mark W39V040C as TEST_OK_PREW - remove superfluous line break in enable_flash_ich_dc_spi - m->M in "min" and "max" (voltage) in print_wiki.c Corresponding to flashrom svn r1454. - spi25: get rid of unneccessary line breaks (on failed probes) which is Acked-by: Uwe Hermann <> - rayer_spi.c: Remove double word: `s/the the/the/` which is Signed-off-by: Paul Menzel <> The parts added until 2011-10-14 (most of this patch) were Acked-by: Uwe Hermann <> everything else is Signed-off-by: Stefan Tauner <> Acked-by: Stefan Tauner <>
Diffstat (limited to 'chipset_enable.c')
1 files changed, 6 insertions, 6 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 1c7eb31..d2d81e0 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -536,7 +536,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name,
/* Get physical address of Root Complex Register Block */
tmp = pci_read_long(dev, 0xf0) & 0xffffc000;
- msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp);
+ msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp);
/* Map RCBA to virtual memory */
rcrb = physmap("ICH RCRB", tmp, 0x4000);
@@ -1138,7 +1138,7 @@ const struct penable chipset_enables[] = {
{0x1022, 0x780e, OK, "AMD", "Hudson", enable_flash_sb600},
{0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501},
{0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496},
- {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530},
+ {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530},
{0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540},
{0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530},
{0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540},
@@ -1205,7 +1205,7 @@ const struct penable chipset_enables[] = {
{0x10de, 0x0443, NT, "NVIDIA", "MCP65", enable_flash_mcp6x_7x},
{0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x},
{0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
- {0x10de, 0x075d, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
+ {0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
{0x10de, 0x07d7, NT, "NVIDIA", "MCP73", enable_flash_mcp6x_7x},
{0x10de, 0x0aac, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
{0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
@@ -1222,7 +1222,7 @@ const struct penable chipset_enables[] = {
{0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111},
{0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111},
{0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111},
- {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x},
+ {0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x},
{0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x},
{0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x},
{0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x},
@@ -1236,8 +1236,8 @@ const struct penable chipset_enables[] = {
{0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000},
{0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4},
{0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4},
- {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_pch6},
- {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_pch6},
+ {0x8086, 0x1c44, OK, "Intel", "Z68", enable_flash_pch6},
+ {0x8086, 0x1c46, OK, "Intel", "P67", enable_flash_pch6},
{0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_pch6},
{0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_pch6},
{0x8086, 0x1c4a, OK, "Intel", "H67", enable_flash_pch6},
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