path: root/Makefile
diff options
authorNikolay Petukhov <>2008-05-17 01:08:58 +0000
committerPeter Stuge <>2008-05-17 01:08:58 +0000
commit4784c47a882247c107ba2e1c3c63e71b7d78e844 (patch)
treefb7ab264b5a252ffee6aec466827c2e1da8ff22f /Makefile
parentfc52409252eb3f6f05547cf28b0e44793a39a6a4 (diff)
Support Pm49FL004/2 Block Locking Registers
The PMC chips understand both LPC and FWH flash commands. When in FWH mode (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block Locking Registers by default lock the flash chip for write and erase - in addition to any chipset write protection. This patch adds unlock operations before Pm49FL004/2 write and erase, and it includes an svn mv pm49fl004.c pm49fl00x.c Thanks go to Nikolay for this patch. Corresponding to flashrom svn r243 and coreboot v2 svn r3332. Signed-off-by: Nikolay Petukhov <> Signed-off-by: Peter Stuge <> Acked-by: Bari Ari <>
Diffstat (limited to 'Makefile')
1 files changed, 1 insertions, 1 deletions
diff --git a/Makefile b/Makefile
index 35b891d..a645d4c 100644
--- a/Makefile
+++ b/Makefile
@@ -22,7 +22,7 @@ endif
OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \
sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
- w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \
+ w49f002u.o 82802ab.o msys_doc.o pm49fl00x.o sst49lf040.o \
sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
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