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authorStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2011-11-13 23:03:30 +0000
committerStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2011-11-13 23:03:30 +0000
commit25ffba7644de824c7cba10a0d367d60e499d575d (patch)
tree9a16fad092de190376db3cc128e41626302a52bd /Documentation/mysteries_intel.txt
parent745f6bbec2acf6a94111df385384067b01f6e567 (diff)
downloadast2050-flashrom-25ffba7644de824c7cba10a0d367d60e499d575d.zip
ast2050-flashrom-25ffba7644de824c7cba10a0d367d60e499d575d.tar.gz
Create a directory for documentation files
Move the serprog specification there and document a few things we could not figure out on intel platforms yet. Corresponding to flashrom svn r1465. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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+= BBAR on ICH8 =
+ There is no sign of BBAR (BIOS Base Address Configuration Register) in the
+ public datasheet (or specification update) of the ICH8. Also, the offset of
+ that register has changed between ICH7 (SPIBAR + 50h) and ICH9 (SPIBAR +
+ A0h), so we have no clue if or where it is on ICH8. Out current policy is to
+ not touch it at all and assume/hope it is 0.
+
+= Accesses beyond region bounds in descriptor mode =
+ Intel's flash image tool will always expand the last region so that it covers
+ the whole flash chip, but some boards ship with a different configuration.
+ It seems that in descriptor mode all addresses outside the used regions can not
+ be accessed whatsoever. This is not specified anywhere publicly as far as we
+ could tell. flashrom does not handle this explicitly yet. It will just fail
+ when trying to touch an address outside of any region.
+ See also http://www.flashrom.org/pipermail/flashrom/2011-August/007606.html
+
+= Unlocking the ME region =
+TODO
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