Random flashrom updates

 - Add explicit installation instructions in the README.

 - Code cleanups, coding style fixes, drop dead code.

 - Drop duplicate board listings from -L output (some boards were explicitly
   recorded in boards_ok[] _and_ implicitly via the board-enables table.

 - Add MS-xxxx numbers to MSI boards where we can find that info.

 - Fix typo, "K8T Neo2" should have been "K8T Neo2-F" actually, at least
   according to the comment of w83627thf_gpio4_4_raise_2e() which says
   "Suited for: MSI K8T Neo2-F".

Corresponding to flashrom svn r554.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

3 files changed, 35 insertions, 31 deletions

diff --git a/README b/README
index 7df2f5e..81e51cb 100644
--- a/README
+++ b/README
@@ -15,7 +15,7 @@ or SPI.
 (see http://coreboot.org for details on coreboot)
 
 
-Build Requirements
+Build Instructions
 ------------------
 
 To build flashrom you need to install the following packages or ports:
@@ -55,6 +55,18 @@ To compile and run on Darwin/Mac OS X:
  DirectIO is available at http://www.coresystems.de/en/directio.
 
 
+Installation
+------------
+
+In order to install flashrom and the manpage into /usr/local, type:
+
+ sudo make install
+
+For installation in a different directory use DESTDIR, e.g. like this:
+
+ sudo make DESTDIR=/usr install
+
+
 Usage / Options
 ---------------
 
diff --git a/board_enable.c b/board_enable.c
index ec1ae5d..b073ed6 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -688,10 +688,10 @@ struct board_pciid_enable board_pciid_enables[] = {
 	/* Note: There are >= 2 version of the Kontron 986LCD-M/mITX! */
 	{0x8086, 0x27b8,      0,      0,       0,      0,      0,      0, "kontron",    "986lcd-m",    "Kontron",     "986LCD-M",           board_kontron_986lcd_m},
 	{0x10ec, 0x8168, 0x10ec, 0x8168,  0x104c, 0x8023, 0x104c, 0x8019, "kontron",    "986lcd-m",    "Kontron",     "986LCD-M",           board_kontron_986lcd_m},
-	{0x10de, 0x005e,      0,      0,       0,      0,      0,      0, "msi",        "k8n-neo3",    "MSI",         "K8N Neo3",           w83627thf_gpio4_4_raise_4e},
-	{0x1106, 0x3149, 0x1462, 0x7094,  0x10ec, 0x8167, 0x1462, 0x094c, NULL,         NULL,          "MSI",         "K8T Neo2",           w83627thf_gpio4_4_raise_2e},
-	{0x1106, 0x0571, 0x1462, 0x7120,       0,      0,      0,      0, "msi",        "kt4v",        "MSI",         "KT4V",               board_msi_kt4v},
-	{0x13f6, 0x0111, 0x1462, 0x5900,  0x1106, 0x3177, 0x1106,      0, "msi",        "kt4ultra",    "MSI",         "KT4 Ultra",          board_msi_kt4v},
+	{0x10de, 0x005e,      0,      0,       0,      0,      0,      0, "msi",        "k8n-neo3",    "MSI",         "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e},
+	{0x1106, 0x3149, 0x1462, 0x7094,  0x10ec, 0x8167, 0x1462, 0x094c, NULL,         NULL,          "MSI",         "MS-6702E (K8T Neo2-F)",w83627thf_gpio4_4_raise_2e},
+	{0x1106, 0x0571, 0x1462, 0x7120,       0,      0,      0,      0, "msi",        "kt4v",        "MSI",         "MS-6712 (KT4V)",     board_msi_kt4v},
+	{0x13f6, 0x0111, 0x1462, 0x5900,  0x1106, 0x3177, 0x1106,      0, "msi",        "kt4ultra",    "MSI",         "MS-6590 (KT4 Ultra)",board_msi_kt4v},
 	{0x8086, 0x2658, 0x1462, 0x7046,  0x1106, 0x3044, 0x1462, 0x046d, NULL,         NULL,          "MSI",         "MS-7046",            ich6_gpio19_raise},
 	{0x8086, 0x1076, 0x8086, 0x1176,  0x1106, 0x3059, 0x10f1, 0x2498, NULL,         NULL,          "Tyan",        "S2498 (Tomcat K7M)", board_asus_a7v8x_mx},
 	{0x1106, 0x0314, 0x1106, 0xaa08,  0x1106, 0x3227, 0x1106, 0xAA08, NULL,         NULL,          "VIA",         "EPIA-CN",            board_via_epia_sp},
@@ -721,7 +721,6 @@ const struct board_info boards_ok[] = {
 	{ "ASUS",		"A7N8X Deluxe", },
 	{ "ASUS",		"A7V400-MX", },
 	{ "ASUS",		"A7V8X-MX", },
-	{ "ASUS",		"P4B266", },
 	{ "ASUS",		"A8V-E SE", },
 	{ "ASUS",		"P2L97-S", },
 	{ "ASUS",		"M2A-MX", },
@@ -734,9 +733,7 @@ const struct board_info boards_ok[] = {
 	{ "GIGABYTE",		"GA-6ZMA", },
 	{ "Intel",		"EP80759", },
 	{ "Jetway",		"J7F4K1G5D-PB", },
-	{ "MSI",		"K7N2", },
-	{ "MSI",		"KT4V", },
-	{ "MSI",		"MS-7046", },
+	{ "MSI",		"MS-6570 (K7N2)", },
 	{ "MSI",		"MS-7065", },
 	{ "MSI",		"MS-7236 (945PL Neo3)", },
 	{ "MSI",		"MS-7345 (P35 Neo2-FIR)", },
@@ -771,9 +768,6 @@ const struct board_info boards_ok[] = {
 	{ "Tyan",		"S5376G2NR/S5376WAG2NR", },
 	{ "Tyan",		"S5377", },
 	{ "Tyan",		"S5397", },
-	{ "VIA",		"EPIA-M", },
-	{ "VIA",		"EPIA-MII", },
-	{ "VIA",		"EPIA-CN", },
 	{ "VIA",		"EPIA-LN", },
 	{ "VIA",		"VB700X", },
 	{ "VIA",		"NAB74X0", },
diff --git a/flash.h b/flash.h
index 15b0636..3151646 100644
--- a/flash.h
+++ b/flash.h
@@ -92,7 +92,8 @@ struct programmer_entry {
 	int (*init) (void);
 	int (*shutdown) (void);
 
-	void * (*map_flash_region) (const char *descr, unsigned long phys_addr, size_t len);
+	void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
+				    size_t len);
 	void (*unmap_flash_region) (void *virt_addr, size_t len);
 
 	void (*chip_writeb) (uint8_t val, chipaddr addr);
@@ -151,20 +152,20 @@ struct flashchip {
 
 #define TEST_UNTESTED	0
 
-#define TEST_OK_PROBE	(1<<0)
-#define TEST_OK_READ	(1<<1)
-#define TEST_OK_ERASE	(1<<2)
-#define TEST_OK_WRITE	(1<<3)
-#define TEST_OK_PR	(TEST_OK_PROBE|TEST_OK_READ)
-#define TEST_OK_PRE	(TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE)
-#define TEST_OK_PREW	(TEST_OK_PROBE|TEST_OK_READ|TEST_OK_ERASE|TEST_OK_WRITE)
+#define TEST_OK_PROBE	(1 << 0)
+#define TEST_OK_READ	(1 << 1)
+#define TEST_OK_ERASE	(1 << 2)
+#define TEST_OK_WRITE	(1 << 3)
+#define TEST_OK_PR	(TEST_OK_PROBE | TEST_OK_READ)
+#define TEST_OK_PRE	(TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
+#define TEST_OK_PREW	(TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
 #define TEST_OK_MASK	0x0f
 
-#define TEST_BAD_PROBE	(1<<4)
-#define TEST_BAD_READ	(1<<5)
-#define TEST_BAD_ERASE	(1<<6)
-#define TEST_BAD_WRITE	(1<<7)
-#define TEST_BAD_PREW	(TEST_BAD_PROBE|TEST_BAD_READ|TEST_BAD_ERASE|TEST_BAD_WRITE)
+#define TEST_BAD_PROBE	(1 << 4)
+#define TEST_BAD_READ	(1 << 5)
+#define TEST_BAD_ERASE	(1 << 6)
+#define TEST_BAD_WRITE	(1 << 7)
+#define TEST_BAD_PREW	(TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
 #define TEST_BAD_MASK	0xf0
 
 extern struct flashchip flashchips[];
@@ -534,7 +535,7 @@ extern const struct board_info boards_bad[];
  * byte of device ID is related to log(bitsize).
  */
 #define WINBOND_ID		0xDA	/* Winbond */
-#define WINBOND_NEX_ID		0xEF	/* Winbond (ex Nexcom) serial flash devices */
+#define WINBOND_NEX_ID		0xEF	/* Winbond (ex Nexcom) serial flashes */
 #define W_25X10			0x3011
 #define W_25X20			0x3012
 #define W_25X40			0x3013
@@ -659,8 +660,6 @@ int dummy_spi_command(unsigned int writecnt, unsigned int readcnt,
 /* nic3com.c */
 int nic3com_init(void);
 int nic3com_shutdown(void);
-void *nic3com_map(const char *descr, unsigned long phys_addr, size_t len);
-void nic3com_unmap(void *virt_addr, size_t len);
 void nic3com_chip_writeb(uint8_t val, chipaddr addr);
 uint8_t nic3com_chip_readb(const chipaddr addr);
 extern struct pcidev_status nics_3com[];
@@ -668,8 +667,6 @@ extern struct pcidev_status nics_3com[];
 /* satasii.c */
 int satasii_init(void);
 int satasii_shutdown(void);
-void *satasii_map(const char *descr, unsigned long phys_addr, size_t len);
-void satasii_unmap(void *virt_addr, size_t len);
 void satasii_chip_writeb(uint8_t val, chipaddr addr);
 uint8_t satasii_chip_readb(const chipaddr addr);
 extern struct pcidev_status satas_sii[];
@@ -850,7 +847,8 @@ int write_49f002(struct flashchip *flash, uint8_t *buf);
 
 /* wbsio_spi.c */
 int wbsio_check_for_spi(const char *name);
-int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt,
+		      const unsigned char *writearr, unsigned char *readarr);
 int wbsio_spi_read(struct flashchip *flash, uint8_t *buf);
 int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);