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| author | Ed Swierk <eswierk@arastra.com> | 2008-08-20 20:31:41 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-08-20 20:31:41 +0000 |
| commit | cd2ed475ada1e04968d05d33aa657cbb35f91c22 (patch) | |
| tree | 923fe7e1740fd6f0f6c6b3aee55ae068978540ac | |
| parent | b20953c3b9340cfb6211d64cd6b453478be6bd31 (diff) | |
| download | ast2050-flashrom-cd2ed475ada1e04968d05d33aa657cbb35f91c22.zip ast2050-flashrom-cd2ed475ada1e04968d05d33aa657cbb35f91c22.tar.gz | |
Recognize the Intel EP80579 LPC flash interface
Corresponding to flashrom svn r310 and coreboot v2 svn r3532.
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
| -rw-r--r-- | chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 95565ce..241a698 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -707,6 +707,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x5031, "Intel EP80579", enable_flash_ich_dc}, {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, "Intel ICH7/ICH7R", enable_flash_ich7}, {0x8086, 0x27b9, "Intel ICH7M", enable_flash_ich7}, |
