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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-14 12:59:36 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-14 12:59:36 +0000
commitbfe2e0cf677ef4609e3eacb337efc669c869f209 (patch)
tree6bd9710ba48b8b27fd99469669e6cc8925ab7043
parentd02b73f9e9a717706dc820eca04128958238df37 (diff)
downloadast2050-flashrom-bfe2e0cf677ef4609e3eacb337efc669c869f209.zip
ast2050-flashrom-bfe2e0cf677ef4609e3eacb337efc669c869f209.tar.gz
Add a dummy SPI controller driver, similar to the dummy LPC/FWH/Parallel flasher driver
Does not support reading or writing the fake chip yet. flashrom --programmer dummy also enables the dummy SPI controller driver. Testing the dummy SPI driver revealed a RDID debug printing bug in the SPI core. Fix that as well. Corresponding to flashrom svn r507. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
-rw-r--r--dummyflasher.c21
-rw-r--r--flash.h5
-rw-r--r--spi.c10
3 files changed, 33 insertions, 3 deletions
diff --git a/dummyflasher.c b/dummyflasher.c
index ba54206..7e671b8 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -31,6 +31,7 @@
int dummy_init(void)
{
printf_debug("%s\n", __func__);
+ flashbus = BUS_TYPE_DUMMY_SPI;
return 0;
}
@@ -86,3 +87,23 @@ uint32_t dummy_chip_readl(const volatile void *addr)
return 0xffffffff;
}
+int dummy_spi_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr)
+{
+ int i;
+
+ printf_debug("%s:", __func__);
+
+ printf_debug(" writing %u bytes:", writecnt);
+ for (i = 0; i < writecnt; i++)
+ printf_debug(" 0x%02x", writearr[i]);
+
+ printf_debug(" reading %u bytes:", readcnt);
+ for (i = 0; i < readcnt; i++) {
+ printf_debug(" 0xff");
+ readarr[i] = 0xff;
+ }
+
+ printf_debug("\n");
+ return 0;
+}
diff --git a/flash.h b/flash.h
index bf52a56..0514739 100644
--- a/flash.h
+++ b/flash.h
@@ -571,7 +571,8 @@ typedef enum {
BUS_TYPE_IT87XX_SPI,
BUS_TYPE_SB600_SPI,
BUS_TYPE_VIA_SPI,
- BUS_TYPE_WBSIO_SPI
+ BUS_TYPE_WBSIO_SPI,
+ BUS_TYPE_DUMMY_SPI
} flashbus_t;
extern flashbus_t flashbus;
@@ -602,6 +603,8 @@ void dummy_chip_writel(uint32_t val, volatile void *addr);
uint8_t dummy_chip_readb(const volatile void *addr);
uint16_t dummy_chip_readw(const volatile void *addr);
uint32_t dummy_chip_readl(const volatile void *addr);
+int dummy_spi_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
/* nic3com.c */
int nic3com_init(void);
diff --git a/spi.c b/spi.c
index 6d1185e..2f2842c 100644
--- a/spi.c
+++ b/spi.c
@@ -46,6 +46,8 @@ int spi_command(unsigned int writecnt, unsigned int readcnt,
return sb600_spi_command(writecnt, readcnt, writearr, readarr);
case BUS_TYPE_WBSIO_SPI:
return wbsio_spi_command(writecnt, readcnt, writearr, readarr);
+ case BUS_TYPE_DUMMY_SPI:
+ return dummy_spi_command(writecnt, readcnt, writearr, readarr);
default:
printf_debug
("%s called, but no SPI chipset/strapping detected\n",
@@ -58,12 +60,15 @@ static int spi_rdid(unsigned char *readarr, int bytes)
{
const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
int ret;
+ int i;
ret = spi_command(sizeof(cmd), bytes, cmd, readarr);
if (ret)
return ret;
- printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1],
- readarr[2]);
+ printf_debug("RDID returned");
+ for (i = 0; i < bytes; i++)
+ printf_debug(" 0x%02x", readarr[i]);
+ printf_debug("\n");
return 0;
}
@@ -202,6 +207,7 @@ int probe_spi_rdid4(struct flashchip *flash)
case BUS_TYPE_VIA_SPI:
case BUS_TYPE_SB600_SPI:
case BUS_TYPE_WBSIO_SPI:
+ case BUS_TYPE_DUMMY_SPI:
return probe_spi_rdid_generic(flash, 4);
default:
printf_debug("4b ID not supported on this SPI controller\n");
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