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author | Timothy Pearson <tpearson@raptorengineering.com> | 2016-08-31 20:18:57 -0500 |
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committer | Timothy Pearson <tpearson@raptorengineering.com> | 2017-05-02 14:20:23 -0500 |
commit | acf6d5342b908d797c215dc35db2ae38405838a6 (patch) | |
tree | 1fc0a33f87f8e95f36a4b65edc810acbe248f8e1 | |
parent | 9dedbdb2bc4a96ae864b64cbb15fa9945695f3dc (diff) | |
download | ast2050-flashrom-acf6d5342b908d797c215dc35db2ae38405838a6.zip ast2050-flashrom-acf6d5342b908d797c215dc35db2ae38405838a6.tar.gz |
Obtain correct virtual address for 32-bit BARs on PPC
PowerPC systems have the ability to map 32-bit BARs into
64-bit host windows. Reading the BAR directly from the
hardware is insufficient on these machines; use the libpci
deb->base_addr[x] mechanism instead.
Change-Id: I7a37ae98f54aab62e0937985220d1dcd097109f3
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
-rw-r--r-- | pcidev.c | 11 |
1 files changed, 10 insertions, 1 deletions
@@ -37,11 +37,13 @@ enum pci_bartype { uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) { uint64_t addr; - uint32_t upperaddr; uint8_t headertype; uint16_t supported_cycles; enum pci_bartype bartype = TYPE_UNKNOWN; +#ifndef __PPC64__ + uint32_t upperaddr; +#endif headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f; msg_pspew("PCI header type 0x%02x\n", headertype); @@ -97,6 +99,12 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) switch (bartype) { case TYPE_MEMBAR: msg_pdbg("MEM"); +#ifdef __PPC64__ + /* PowerPC is able to translate 32-bit BARs into 64-bit host windows. + * Use the dev->base_addr[x] mechanism to handle mapping. + */ + addr = dev->base_addr[(bar - 0x10) / 0x4] & PCI_BASE_ADDRESS_MEM_MASK; +#else if (!(supported_cycles & PCI_COMMAND_MEMORY)) { msg_perr("MEM BAR access requested, but device has MEM space accesses disabled.\n"); /* TODO: Abort here? */ @@ -122,6 +130,7 @@ uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) } } addr &= PCI_BASE_ADDRESS_MEM_MASK; +#endif break; case TYPE_IOBAR: msg_pdbg("I/O\n"); |