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| author | Claus Gindhart <claus.gindhart@kontron.com> | 2008-05-14 12:22:38 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-14 12:22:38 +0000 |
| commit | a00e2a0edfcf71573c1d346ccc3f79e1d05f731f (patch) | |
| tree | f49014866b882302e5ba5dd3dde183e089dbff4e | |
| parent | 09022e535f8e8974b64a175de91c9cb5a4bed97c (diff) | |
| download | ast2050-flashrom-a00e2a0edfcf71573c1d346ccc3f79e1d05f731f.zip ast2050-flashrom-a00e2a0edfcf71573c1d346ccc3f79e1d05f731f.tar.gz | |
Add the Intel 6300ESB as known chipset to the chipset struct enables
Corresponding to flashrom svn r233 and coreboot v2 svn r3310.
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
| -rw-r--r-- | chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 77a132a..973fb81 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -577,6 +577,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x24c0, "Intel ICH4/ICH4-L", enable_flash_ich_4e}, {0x8086, 0x24cc, "Intel ICH4-M", enable_flash_ich_4e}, {0x8086, 0x24d0, "Intel ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich_dc_spi}, |
