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authorPeter Stuge <peter@stuge.se>2009-01-12 21:31:14 +0000
committerPeter Stuge <peter@stuge.se>2009-01-12 21:31:14 +0000
commit5807206cfe469be9e1bf0cfc079b583a2904a8ce (patch)
treeb03dd6a56b6db33a780122b6874fa803deca52c9
parentd3bce83599358722791b6051ea45de70628adb57 (diff)
downloadast2050-flashrom-5807206cfe469be9e1bf0cfc079b583a2904a8ce.zip
ast2050-flashrom-5807206cfe469be9e1bf0cfc079b583a2904a8ce.tar.gz
Board enable for GIGABYTE GA-MA78G-DS3H
This board has 2x MX25L8005 flash chips behind an IT8718F LPC->SPI bridge. The board uses GIGABYTE's patented BIOS failover technology, and at this point we do not know how to control which of the two chips flashrom actually hits. Corresponding to flashrom svn r380 and coreboot v2 svn r3859. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Yul Rottmann <yulrottmann@bitel.net>
-rw-r--r--board_enable.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/board_enable.c b/board_enable.c
index 42d59c0..2ea1dd9 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -634,6 +634,8 @@ struct board_pciid_enable board_pciid_enables[] = {
"gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash},
{0x10de, 0x03e0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
"gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash},
+ {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385,
+ NULL, NULL, "GIGABYTE GA-MA78G-DS3H", it87xx_probe_spi_flash},
{0x1039, 0x0761, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
"gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash},
{0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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