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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-13 22:51:27 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-13 22:51:27 +0000
commit5100a8a9aed38ed96e182da22d3ed1a01202350b (patch)
treede0f7f28da67b7528a9b35f120fb2ffd410f66ee
parent93bb375356073782ba20a3139cfe08905f0eb4ab (diff)
downloadast2050-flashrom-5100a8a9aed38ed96e182da22d3ed1a01202350b.zip
ast2050-flashrom-5100a8a9aed38ed96e182da22d3ed1a01202350b.tar.gz
Generic status register prettyprinting for SST25*
Even if we don't tell the user about the areas the block locking bits correspond to, printing a detailed list of which lock bits are set is a definite improvement. Corresponding to flashrom svn r505. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Sample output: [...] Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 4a. probe_spi_rdid_generic: id1 0xbf, id2 0x254a Chip status register is 1c Chip status register: Block Protect Write Disable (BPL) is not set Chip status register: Auto Address Increment Programming (AAI) is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is set Chip status register: Bit 3 / Block Protect 1 (BP1) is set Chip status register: Bit 2 / Block Protect 0 (BP0) is set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "SST SST25VF032B" (4096 KB) at physical address 0xffc00000. Acked-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>
-rw-r--r--spi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/spi.c b/spi.c
index b61f433..6d1185e 100644
--- a/spi.c
+++ b/spi.c
@@ -384,7 +384,7 @@ void spi_prettyprint_status_register(struct flashchip *flash)
case 0x258d:
spi_prettyprint_status_register_sst25vf040b(status);
break;
- case 0x258e:
+ default:
spi_prettyprint_status_register_sst25(status);
break;
}
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