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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-08-13 23:23:37 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-08-13 23:23:37 +0000 |
| commit | 4449868623f931dea63b7b552436dd5fc681429e (patch) | |
| tree | dd080b1dc717801dc3d1755cc09a5364edd4f6a3 | |
| parent | 204b076df7c7c9466ada9120780dc8aad2cd6586 (diff) | |
| download | ast2050-flashrom-4449868623f931dea63b7b552436dd5fc681429e.zip ast2050-flashrom-4449868623f931dea63b7b552436dd5fc681429e.tar.gz | |
Allow the user to override FWH IDSEL on ICH6 and later
Usage:
flashrom -p internal=fwh_idsel=0
Corresponding to flashrom svn r685.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Log:
flashrom v0.9.0-r670
coreboot table found at 0xcf7f3c00.
Vendor ID: KONTRON, part ID: 986LCD-M
Found chipset "Intel ICH7/ICH7R", enabling flash write...
Setting IDSEL=0 for top 8 MBOK.
This chipset supports the following protocols: LPC,FWH.
Disabling flash write protection for board "Kontron 986LCD-M"... OK.
Calibrating delay loop... OK.
Found chip "SST SST49LF016C" (2048 KB, FWH) at physical address
0xffe00000.
No operations were specified.
Acked-by: Chris Kinney <cmkinne@sandia.gov>
| -rw-r--r-- | chipset_enable.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 6ac829b..ab68598 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -203,6 +203,7 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) { uint32_t fwh_conf; int i; + char *idsel = NULL; /* Ignore all legacy ranges below 1 MB. */ /* FWH_SEL1 */ @@ -232,6 +233,19 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) (0xff0 + i) * 0x100000, (fwh_conf >> i) & 0x1 ? "en" : "dis"); + if (programmer_param) + idsel = strstr(programmer_param, "fwh_idsel="); + + if (idsel) { + idsel += strlen("fwh_idsel="); + fwh_conf = (uint32_t)strtoul(idsel, NULL, 0); + + /* FIXME: Need to undo this on shutdown. */ + printf("\nSetting IDSEL=0x%x for top 16 MB", fwh_conf); + pci_write_long(dev, 0xd0, fwh_conf); + pci_write_word(dev, 0xd4, fwh_conf); + } + return enable_flash_ich(dev, name, 0xdc); } |
