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authorRudolf Marek <r.marek@assembler.cz>2009-02-01 18:40:50 +0000
committerRudolf Marek <r.marek@assembler.cz>2009-02-01 18:40:50 +0000
commit0c2029f862ca2ff6aa7161cd88cb76a2c054baae (patch)
treeb86bbe5ab35551e4b54f54fd67bf243426fa1318
parent7314cc3de0f91f65f9a579c32b2aa7c8ddf157fc (diff)
downloadast2050-flashrom-0c2029f862ca2ff6aa7161cd88cb76a2c054baae.zip
ast2050-flashrom-0c2029f862ca2ff6aa7161cd88cb76a2c054baae.tar.gz
Following patch fixes VIA SPI (VT8237S)
It needs to have opcodes initialized same way as ICH7. Corresponding to flashrom svn r413 and coreboot v2 svn r3926. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se>
-rw-r--r--chipset_enable.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index dc5cccb..3eb8b28 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -221,6 +221,7 @@ static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name)
*(uint16_t *) (spibar + 0x6c));
flashbus = BUS_TYPE_VIA_SPI;
+ ich_init_opcodes();
return 0;
}
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