1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
|
/*
** No copyright?!
*/
/*
* Notes:
* 1) Second PIC is not implemented.
* 2) Interrupt priority management is not implemented.
* 3) What should be read from port 0x20?
*
* "within interrupt processing" means the following is true:
* 1) Hardware interrupt <irql> is delivered by hardint().
* 2) Next interrupt <irql> is not possible yet by either:
* a) V_IF;
* b) Interrupt mask;
* c) Current irql.
*
* Related functions:
* int isinhardint(int irql)
* void set_eoir(int irql, void (*eoir)(void *), void *arg);
*
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "doscmd.h"
struct IRQ {
int pending;
int busy;
int within;
void (*eoir)(void *arg);
void *arg;
};
static unsigned char IM;
static int Irql;
static struct IRQ Irqs[8];
#define int_allowed(n) ((IM & 1 << (n)) == 0 && Irql > (n))
void
set_eoir(int irql, void (*eoir)(void *), void *arg)
{
Irqs [irql].eoir = eoir;
Irqs [irql].arg = arg;
}
int
isinhardint(int irql)
{
return Irqs[irql].within;
}
static void
set_vip(void)
{
regcontext_t *REGS = saved_regcontext;
int irql;
if (R_EFLAGS & PSL_VIF) {
R_EFLAGS &= ~PSL_VIP;
return;
}
for (irql = 0; irql < 8; irql++)
if (int_allowed(irql) && (Irqs[irql].within || Irqs[irql].pending)) {
R_EFLAGS |= PSL_VIP;
return;
}
R_EFLAGS &= ~PSL_VIP;
}
void
resume_interrupt(void)
{
regcontext_t *REGS = saved_regcontext;
int irql;
if (R_EFLAGS & PSL_VIF) {
for (irql = 0; irql < 8; irql++)
if (Irqs[irql].within && int_allowed(irql)) {
Irqs[irql].within = 0;
if (Irqs[irql].eoir)
Irqs[irql].eoir(Irqs[irql].arg);
}
for (irql = 0; irql < 8; irql++)
if (Irqs[irql].pending && int_allowed(irql)) {
Irqs[irql].pending = 0;
hardint(irql);
break;
}
}
set_vip();
}
void
send_eoi(void)
{
if (Irql >= 8)
return;
Irqs[Irql].busy = 0;
while (++Irql < 8)
if (Irqs [Irql].busy)
break;
resume_interrupt();
}
/*
** Cause a hardware interrupt to happen immediately after
** we return to vm86 mode
*/
void
hardint(int irql)
{
regcontext_t *REGS = saved_regcontext;
u_long vec = ivec[8 + irql];
/*
** if we're dead, or there's no vector, or the saved registers
** are invalid
*/
if (dead || !saved_valid || vec == 0)
return;
/*
** if the vector points into the BIOS, or the handler at the
** other end is just an IRET, don't bother
*/
if ((vec >> 16) == 0xf000 || *(u_char *)VECPTR(vec) == 0xcf)
return;
if (!int_allowed(irql)) {
Irqs[irql].pending = 1;
return;
}
if ((R_EFLAGS & PSL_VIF) == 0) {
Irqs[irql].pending = 1;
R_EFLAGS |= PSL_VIP;
return;
}
debug(D_TRAPS | (8 + irql), "Int%02x [%04lx:%04lx]\n",
8 + irql, vec >> 16, vec & 0xffff);
Irql = irql;
Irqs[Irql].busy = 1;
if (Irqs[Irql].eoir)
Irqs[Irql].within = 1;
PUSH((R_FLAGS & ~PSL_I) | (R_EFLAGS & PSL_VIF ? PSL_I : 0), REGS);
PUSH(R_CS, REGS);
PUSH(R_IP, REGS);
R_EFLAGS &= ~PSL_VIF; /* XXX disable interrupts */
PUTVEC(R_CS, R_IP, vec);
}
void
unpend(int irql)
{
if (!Irqs[irql].pending)
return;
Irqs[irql].pending = 0;
set_vip();
}
static unsigned char
irqc_in(int port __unused)
{
return 0x60; /* What should be here? */
}
static void
irqc_out(int port __unused, unsigned char val)
{
if (val == 0x20)
send_eoi();
}
static unsigned char
imr_in(int port __unused)
{
return IM;
}
static void
imr_out(int port __unused, unsigned char val)
{
IM = val;
resume_interrupt();
}
/*
** Cause a software interrupt to happen immediately after we
** return to vm86 mode
*/
void
softint(int intnum)
{
regcontext_t *REGS = saved_regcontext;
u_long vec = ivec[intnum];
/*
** if we're dead, or there's no vector or the saved registers are
** invalid
*/
if (dead || !saved_valid || vec == 0)
return;
/*
** if the vector points into the BIOS, or the handler at the other
** end is just an IRET, don't bother.
*/
if ((vec >> 16) == 0xf000 || *(u_char *)VECPTR(vec) == 0xcf)
return;
debug(D_TRAPS | intnum, "INT %02x [%04lx:%04lx]\n",
intnum, vec >> 16, vec & 0xffff);
PUSH((R_FLAGS & ~PSL_I) | (R_EFLAGS & PSL_VIF ? PSL_I : 0), REGS);
PUSH(R_CS, REGS);
PUSH(R_IP, REGS);
R_EFLAGS &= ~PSL_VIF; /* XXX disable interrupts? */
PUTVEC(R_CS, R_IP, vec);
}
void
init_ints(void)
{
int i;
for (i = 0; i < 8; i++) {
Irqs[i].busy = 0;
Irqs[i].pending = 0;
Irqs[i].within = 0;
}
IM = 0x00;
Irql = 8;
define_input_port_handler(0x20, irqc_in);
define_output_port_handler(0x20, irqc_out);
define_input_port_handler(0x21, imr_in);
define_output_port_handler(0x21, imr_out);
}
|
