1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
|
.\" $FreeBSD$
.TH "LLI" "1" "2012-08-16" "3.2" "LLVM"
.SH NAME
lli \- directly execute programs from LLVM bitcode
.
.nr rst2man-indent-level 0
.
.de1 rstReportMargin
\\$1 \\n[an-margin]
level \\n[rst2man-indent-level]
level margin: \\n[rst2man-indent\\n[rst2man-indent-level]]
-
\\n[rst2man-indent0]
\\n[rst2man-indent1]
\\n[rst2man-indent2]
..
.de1 INDENT
.\" .rstReportMargin pre:
. RS \\$1
. nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin]
. nr rst2man-indent-level +1
.\" .rstReportMargin post:
..
.de UNINDENT
. RE
.\" indent \\n[an-margin]
.\" old: \\n[rst2man-indent\\n[rst2man-indent-level]]
.nr rst2man-indent-level -1
.\" new: \\n[rst2man-indent\\n[rst2man-indent-level]]
.in \\n[rst2man-indent\\n[rst2man-indent-level]]u
..
.\" Man page generated from reStructuredText.
.
.SH SYNOPSIS
.sp
\fBlli\fP [\fIoptions\fP] [\fIfilename\fP] [\fIprogram args\fP]
.SH DESCRIPTION
.sp
\fBlli\fP directly executes programs in LLVM bitcode format. It takes a program
in LLVM bitcode format and executes it using a just\-in\-time compiler, if one is
available for the current architecture, or an interpreter. \fBlli\fP takes all of
the same code generator options as llc|llc, but they are only effective when
\fBlli\fP is using the just\-in\-time compiler.
.sp
If \fIfilename\fP is not specified, then \fBlli\fP reads the LLVM bitcode for the
program from standard input.
.sp
The optional \fIargs\fP specified on the command line are passed to the program as
arguments.
.SH GENERAL OPTIONS
.sp
\fB\-fake\-argv0\fP=\fIexecutable\fP
.INDENT 0.0
.INDENT 3.5
Override the \fBargv[0]\fP value passed into the executing program.
.UNINDENT
.UNINDENT
.sp
\fB\-force\-interpreter\fP=\fI{false,true}\fP
.INDENT 0.0
.INDENT 3.5
If set to true, use the interpreter even if a just\-in\-time compiler is available
for this architecture. Defaults to false.
.UNINDENT
.UNINDENT
.sp
\fB\-help\fP
.INDENT 0.0
.INDENT 3.5
Print a summary of command line options.
.UNINDENT
.UNINDENT
.sp
\fB\-load\fP=\fIpuginfilename\fP
.INDENT 0.0
.INDENT 3.5
Causes \fBlli\fP to load the plugin (shared object) named \fIpluginfilename\fP and use
it for optimization.
.UNINDENT
.UNINDENT
.sp
\fB\-stats\fP
.INDENT 0.0
.INDENT 3.5
Print statistics from the code\-generation passes. This is only meaningful for
the just\-in\-time compiler, at present.
.UNINDENT
.UNINDENT
.sp
\fB\-time\-passes\fP
.INDENT 0.0
.INDENT 3.5
Record the amount of time needed for each code\-generation pass and print it to
standard error.
.UNINDENT
.UNINDENT
.sp
\fB\-version\fP
.INDENT 0.0
.INDENT 3.5
Print out the version of \fBlli\fP and exit without doing anything else.
.UNINDENT
.UNINDENT
.SH TARGET OPTIONS
.sp
\fB\-mtriple\fP=\fItarget triple\fP
.INDENT 0.0
.INDENT 3.5
Override the target triple specified in the input bitcode file with the
specified string. This may result in a crash if you pick an
architecture which is not compatible with the current system.
.UNINDENT
.UNINDENT
.sp
\fB\-march\fP=\fIarch\fP
.INDENT 0.0
.INDENT 3.5
Specify the architecture for which to generate assembly, overriding the target
encoded in the bitcode file. See the output of \fBllc \-help\fP for a list of
valid architectures. By default this is inferred from the target triple or
autodetected to the current architecture.
.UNINDENT
.UNINDENT
.sp
\fB\-mcpu\fP=\fIcpuname\fP
.INDENT 0.0
.INDENT 3.5
Specify a specific chip in the current architecture to generate code for.
By default this is inferred from the target triple and autodetected to
the current architecture. For a list of available CPUs, use:
\fBllvm\-as < /dev/null | llc \-march=xyz \-mcpu=help\fP
.UNINDENT
.UNINDENT
.sp
\fB\-mattr\fP=\fIa1,+a2,\-a3,...\fP
.INDENT 0.0
.INDENT 3.5
Override or control specific attributes of the target, such as whether SIMD
operations are enabled or not. The default set of attributes is set by the
current CPU. For a list of available attributes, use:
\fBllvm\-as < /dev/null | llc \-march=xyz \-mattr=help\fP
.UNINDENT
.UNINDENT
.SH FLOATING POINT OPTIONS
.sp
\fB\-disable\-excess\-fp\-precision\fP
.INDENT 0.0
.INDENT 3.5
Disable optimizations that may increase floating point precision.
.UNINDENT
.UNINDENT
.sp
\fB\-enable\-no\-infs\-fp\-math\fP
.INDENT 0.0
.INDENT 3.5
Enable optimizations that assume no Inf values.
.UNINDENT
.UNINDENT
.sp
\fB\-enable\-no\-nans\-fp\-math\fP
.INDENT 0.0
.INDENT 3.5
Enable optimizations that assume no NAN values.
.UNINDENT
.UNINDENT
.sp
\fB\-enable\-unsafe\-fp\-math\fP
.INDENT 0.0
.INDENT 3.5
Causes \fBlli\fP to enable optimizations that may decrease floating point
precision.
.UNINDENT
.UNINDENT
.sp
\fB\-soft\-float\fP
.INDENT 0.0
.INDENT 3.5
Causes \fBlli\fP to generate software floating point library calls instead of
equivalent hardware instructions.
.UNINDENT
.UNINDENT
.SH CODE GENERATION OPTIONS
.sp
\fB\-code\-model\fP=\fImodel\fP
.INDENT 0.0
.INDENT 3.5
Choose the code model from:
.sp
.nf
.ft C
default: Target default code model
small: Small code model
kernel: Kernel code model
medium: Medium code model
large: Large code model
.ft P
.fi
.UNINDENT
.UNINDENT
.sp
\fB\-disable\-post\-RA\-scheduler\fP
.INDENT 0.0
.INDENT 3.5
Disable scheduling after register allocation.
.UNINDENT
.UNINDENT
.sp
\fB\-disable\-spill\-fusing\fP
.INDENT 0.0
.INDENT 3.5
Disable fusing of spill code into instructions.
.UNINDENT
.UNINDENT
.sp
\fB\-enable\-correct\-eh\-support\fP
.INDENT 0.0
.INDENT 3.5
Make the \-lowerinvoke pass insert expensive, but correct, EH code.
.UNINDENT
.UNINDENT
.sp
\fB\-jit\-enable\-eh\fP
.INDENT 0.0
.INDENT 3.5
Exception handling should be enabled in the just\-in\-time compiler.
.UNINDENT
.UNINDENT
.sp
\fB\-join\-liveintervals\fP
.INDENT 0.0
.INDENT 3.5
Coalesce copies (default=true).
.UNINDENT
.UNINDENT
.sp
\fB\-nozero\-initialized\-in\-bss\fP Don\(aqt place zero\-initialized symbols into the BSS section.
.sp
\fB\-pre\-RA\-sched\fP=\fIscheduler\fP
.INDENT 0.0
.INDENT 3.5
Instruction schedulers available (before register allocation):
.sp
.nf
.ft C
=default: Best scheduler for the target
=none: No scheduling: breadth first sequencing
=simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
=simple\-noitin: Simple two pass scheduling: Same as simple except using generic latency
=list\-burr: Bottom\-up register reduction list scheduling
=list\-tdrr: Top\-down register reduction list scheduling
=list\-td: Top\-down list scheduler \-print\-machineinstrs \- Print generated machine code
.ft P
.fi
.UNINDENT
.UNINDENT
.sp
\fB\-regalloc\fP=\fIallocator\fP
.INDENT 0.0
.INDENT 3.5
Register allocator to use (default=linearscan)
.sp
.nf
.ft C
=bigblock: Big\-block register allocator
=linearscan: linear scan register allocator =local \- local register allocator
=simple: simple register allocator
.ft P
.fi
.UNINDENT
.UNINDENT
.sp
\fB\-relocation\-model\fP=\fImodel\fP
.INDENT 0.0
.INDENT 3.5
Choose relocation model from:
.sp
.nf
.ft C
=default: Target default relocation model
=static: Non\-relocatable code =pic \- Fully relocatable, position independent code
=dynamic\-no\-pic: Relocatable external references, non\-relocatable code
.ft P
.fi
.UNINDENT
.UNINDENT
.sp
\fB\-spiller\fP
.INDENT 0.0
.INDENT 3.5
Spiller to use (default=local)
.sp
.nf
.ft C
=simple: simple spiller
=local: local spiller
.ft P
.fi
.UNINDENT
.UNINDENT
.sp
\fB\-x86\-asm\-syntax\fP=\fIsyntax\fP
.INDENT 0.0
.INDENT 3.5
Choose style of code to emit from X86 backend:
.sp
.nf
.ft C
=att: Emit AT&T\-style assembly
=intel: Emit Intel\-style assembly
.ft P
.fi
.UNINDENT
.UNINDENT
.SH EXIT STATUS
.sp
If \fBlli\fP fails to load the program, it will exit with an exit code of 1.
Otherwise, it will return the exit code of the program it executes.
.SH SEE ALSO
.sp
llc|llc
.SH AUTHOR
Maintained by The LLVM Team (http://llvm.org/).
.SH COPYRIGHT
2012, LLVM Project
.\" Generated by docutils manpage writer.
.
|