summaryrefslogtreecommitdiffstats
path: root/sys/sparc64/sparc64/counter.c
blob: 8009fad4e85a193043498809b0d469acb9981370 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
/*-
 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");

#include <sys/param.h>
#include <sys/bus.h>
#include <sys/malloc.h>
#include <sys/systm.h>
#include <sys/time.h>
#include <sys/timetc.h>

#include <machine/bus.h>
#include <machine/bus_common.h>

#define	COUNTER_MASK	((1 << 29) - 1)
#define	COUNTER_FREQ	1000000
#define	COUNTER_QUALITY	100

/* Bits in the limit register. */
#define	CTLR_INTEN	(1U << 31)	/* Enable timer interrupts */
#define	CTLR_RELOAD	(1U << 30)	/* Zero counter on write to limit reg */
#define	CTLR_PERIODIC	(1U << 29)	/* Wrap to 0 if limit is reached */

/* Offsets of the registers for the two counters. */
#define	CTR_CT0		0x00
#define	CTR_CT1		0x10

/* Register offsets from the base address. */
#define	CTR_COUNT	0x00
#define	CTR_LIMIT	0x08


static timecounter_get_t counter_get_timecount;

struct ct_softc {
	bus_space_tag_t		sc_tag;
	bus_space_handle_t	sc_handle;
	bus_addr_t		sc_offset;
};


/*
 * This is called from the psycho and sbus drivers.  It does not directly
 * attach to the nexus because it shares register space with the bridge in
 * question.
 */
void
sparc64_counter_init(const char *name, bus_space_tag_t tag,
    bus_space_handle_t handle, bus_addr_t offset)
{
	struct timecounter *tc;
	struct ct_softc *sc;

	printf("initializing counter-timer\n");
	/*
	 * Turn off interrupts from both counters.  Set the limit to the
	 * maximum value (although that should not change anything with
	 * CTLR_INTEN and CTLR_PERIODIC off).
	 */
	bus_space_write_8(tag, handle, offset + CTR_CT0 + CTR_LIMIT,
	    COUNTER_MASK);
	bus_space_write_8(tag, handle, offset + CTR_CT1 + CTR_LIMIT,
	    COUNTER_MASK);
	/* Register as a time counter. */
	tc = malloc(sizeof(*tc), M_DEVBUF, M_WAITOK | M_ZERO);
	sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK);
	sc->sc_tag = tag;
	sc->sc_handle = handle;
	sc->sc_offset = offset + CTR_CT0;
	tc->tc_get_timecount = counter_get_timecount;
	tc->tc_counter_mask = COUNTER_MASK;
	tc->tc_frequency = COUNTER_FREQ;
	tc->tc_name = strdup(name, M_DEVBUF);
	tc->tc_priv = sc;
	tc->tc_quality = COUNTER_QUALITY;
	tc_init(tc);
}

static unsigned int
counter_get_timecount(struct timecounter *tc)
{
	struct ct_softc *sc;

	sc = tc->tc_priv;
	return (bus_space_read_8(sc->sc_tag, sc->sc_handle, sc->sc_offset));
}
OpenPOWER on IntegriCloud