1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
|
/*
* Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed under OpenBSD by
* Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $
* $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $
* $FreeBSD$
*/
#ifndef _MACHINE_PIO_H_
#define _MACHINE_PIO_H_
/*
* I/O macros.
*/
static __inline void
__outb(volatile u_int8_t *a, u_int8_t v)
{
*a = v;
__asm__ volatile("eieio; sync");
}
static __inline void
__outw(volatile u_int16_t *a, u_int16_t v)
{
*a = v;
__asm__ volatile("eieio; sync");
}
static __inline void
__outl(volatile u_int32_t *a, u_int32_t v)
{
*a = v;
__asm__ volatile("eieio; sync");
}
static __inline void
__outwrb(volatile u_int16_t *a, u_int16_t v)
{
__asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
__asm__ volatile("eieio; sync");
}
static __inline void
__outlrb(volatile u_int32_t *a, u_int32_t v)
{
__asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
__asm__ volatile("eieio; sync");
}
static __inline u_int8_t
__inb(volatile u_int8_t *a)
{
u_int8_t _v_;
_v_ = *a;
__asm__ volatile("eieio; sync");
return _v_;
}
static __inline u_int16_t
__inw(volatile u_int16_t *a)
{
u_int16_t _v_;
_v_ = *a;
__asm__ volatile("eieio; sync");
return _v_;
}
static __inline u_int32_t
__inl(volatile u_int32_t *a)
{
u_int32_t _v_;
_v_ = *a;
__asm__ volatile("eieio; sync");
return _v_;
}
static __inline u_int16_t
__inwrb(volatile u_int16_t *a)
{
u_int16_t _v_;
__asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
__asm__ volatile("eieio; sync");
return _v_;
}
static __inline u_int32_t
__inlrb(volatile u_int32_t *a)
{
u_int32_t _v_;
__asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
__asm__ volatile("eieio; sync");
return _v_;
}
#define outb(a,v) (__outb((volatile u_int8_t *)(a), v))
#define out8(a,v) outb(a,v)
#define outw(a,v) (__outw((volatile u_int16_t *)(a), v))
#define out16(a,v) outw(a,v)
#define outl(a,v) (__outl((volatile u_int32_t *)(a), v))
#define out32(a,v) outl(a,v)
#define inb(a) (__inb((volatile u_int8_t *)(a)))
#define in8(a) inb(a)
#define inw(a) (__inw((volatile u_int16_t *)(a)))
#define in16(a) inw(a)
#define inl(a) (__inl((volatile u_int32_t *)(a)))
#define in32(a) inl(a)
#define out8rb(a,v) outb(a,v)
#define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v))
#define out16rb(a,v) outwrb(a,v)
#define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v))
#define out32rb(a,v) outlrb(a,v)
#define in8rb(a) inb(a)
#define inwrb(a) (__inwrb((volatile u_int16_t *)(a)))
#define in16rb(a) inwrb(a)
#define inlrb(a) (__inlrb((volatile u_int32_t *)(a)))
#define in32rb(a) inlrb(a)
static __inline void
__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c)
{
while (c--)
*a = *s++;
__asm__ volatile("eieio; sync");
}
static __inline void
__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c)
{
while (c--)
*a = *s++;
__asm__ volatile("eieio; sync");
}
static __inline void
__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c)
{
while (c--)
*a = *s++;
__asm__ volatile("eieio; sync");
}
static __inline void
__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c)
{
while (c--)
__asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
__asm__ volatile("eieio; sync");
}
static __inline void
__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c)
{
while (c--)
__asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
__asm__ volatile("eieio; sync");
}
static __inline void
__insb(volatile u_int8_t *a, u_int8_t *d, size_t c)
{
while (c--)
*d++ = *a;
__asm__ volatile("eieio; sync");
}
static __inline void
__insw(volatile u_int16_t *a, u_int16_t *d, size_t c)
{
while (c--)
*d++ = *a;
__asm__ volatile("eieio; sync");
}
static __inline void
__insl(volatile u_int32_t *a, u_int32_t *d, size_t c)
{
while (c--)
*d++ = *a;
__asm__ volatile("eieio; sync");
}
static __inline void
__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c)
{
while (c--)
__asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
__asm__ volatile("eieio; sync");
}
static __inline void
__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c)
{
while (c--)
__asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
__asm__ volatile("eieio; sync");
}
#define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c))
#define outs8(a,s,c) outsb(a,s,c)
#define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c))
#define outs16(a,s,c) outsw(a,s,c)
#define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c))
#define outs32(a,s,c) outsl(a,s,c)
#define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c))
#define ins8(a,d,c) insb(a,d,c)
#define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c))
#define ins16(a,d,c) insw(a,d,c)
#define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c))
#define ins32(a,d,c) insl(a,d,c)
#define outs8rb(a,s,c) outsb(a,s,c)
#define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c))
#define outs16rb(a,s,c) outswrb(a,s,c)
#define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c))
#define outs32rb(a,s,c) outslrb(a,s,c)
#define ins8rb(a,d,c) insb(a,d,c)
#define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c))
#define ins16rb(a,d,c) inswrb(a,d,c)
#define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c))
#define ins32rb(a,d,c) inslrb(a,d,c)
#endif /*_MACHINE_PIO_H_*/
|