1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
|
/***********************license start***************
* Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
* reserved.
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* * Neither the name of Cavium Networks nor the names of
* its contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
*
* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
* OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
* RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
* REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
* DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
* OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
* PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
* POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
* OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
*
*
* For any questions regarding licensing please contact marketing@caviumnetworks.com
*
***********************license end**************************************/
/*
* octeon_ebt3000_cf.c
*
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/bio.h>
#include <sys/systm.h>
#include <sys/sysctl.h>
#include <sys/ata.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/power.h>
#include <sys/smp.h>
#include <sys/time.h>
#include <sys/timetc.h>
#include <sys/malloc.h>
#include <geom/geom.h>
#include <machine/clock.h>
#include <machine/locore.h>
#include <machine/md_var.h>
#include <machine/cpuregs.h>
#include <mips/cavium/octeon_pcmap_regs.h>
#include <contrib/octeon-sdk/cvmx.h>
/* ATA Commands */
#define CMD_READ_SECTOR 0x20
#define CMD_WRITE_SECTOR 0x30
#define CMD_IDENTIFY 0xEC
/* The ATA Task File */
#define TF_DATA 0x00
#define TF_ERROR 0x01
#define TF_PRECOMP 0x01
#define TF_SECTOR_COUNT 0x02
#define TF_SECTOR_NUMBER 0x03
#define TF_CYL_LSB 0x04
#define TF_CYL_MSB 0x05
#define TF_DRV_HEAD 0x06
#define TF_STATUS 0x07
#define TF_COMMAND 0x07
/* Status Register */
#define STATUS_BSY 0x80 /* Drive is busy */
#define STATUS_RDY 0x40 /* Drive is ready */
#define STATUS_DF 0x20 /* Device fault */
#define STATUS_DRQ 0x08 /* Data can be transferred */
/* Miscelaneous */
#define SECTOR_SIZE 512
#define WAIT_DELAY 1000
#define NR_TRIES 1000
#define SWAP_SHORT(x) ((x << 8) | (x >> 8))
#define MODEL_STR_SIZE 40
/* Globals */
/*
* There's three bus types supported by this driver.
*
* CF_8 -- Traditional PC Card IDE interface on an 8-bit wide bus. We assume
* the bool loader has configure attribute memory properly. We then access
* the device like old-school 8-bit IDE card (which is all a traditional PC Card
* interface really is).
* CF_16 -- Traditional PC Card IDE interface on a 16-bit wide bus. Registers on
* this bus are 16-bits wide too. When accessing registers in the task file, you
* have to do it in 16-bit chunks, and worry about masking out what you don't want
* or ORing together the traditional 8-bit values. We assume the bootloader does
* the right attribute memory initialization dance.
* CF_TRUE_IDE_8 - CF Card wired to True IDE mode. There's no Attribute memory
* space at all. Instead all the traditional 8-bit registers are there, but
* on a 16-bit bus where addr0 isn't wired. This means we need to read/write them
* 16-bit chunks, but only the lower 8 bits are valid. We do not (and can not)
* access this like CF_16 with the comingled registers. Yet we can't access
* this like CF_8 because of the register offset. Except the TF_DATA register
* appears to be full width?
*/
void *base_addr;
int bus_type;
#define CF_8 1 /* 8-bit bus, no offsets - PC Card */
#define CF_16 2 /* 16-bit bus, registers shared - PC Card */
#define CF_TRUE_IDE_8 3 /* 16-bit bus, only lower 8-bits, TrueIDE */
const char *const cf_type[] = {
"impossible type",
"CF 8-bit",
"CF 16-bit",
"True IDE"
};
/* Device parameters */
struct drive_param{
union {
char buf[SECTOR_SIZE];
struct ata_params driveid;
} u;
char model[MODEL_STR_SIZE];
uint32_t nr_sectors;
uint16_t sector_size;
uint16_t heads;
uint16_t tracks;
uint16_t sec_track;
};
/* Device softc */
struct cf_priv {
device_t dev;
struct drive_param drive_param;
struct bio_queue_head cf_bq;
struct g_geom *cf_geom;
struct g_provider *cf_provider;
};
/* GEOM class implementation */
static g_access_t cf_access;
static g_start_t cf_start;
static g_ioctl_t cf_ioctl;
struct g_class g_cf_class = {
.name = "CF",
.version = G_VERSION,
.start = cf_start,
.access = cf_access,
.ioctl = cf_ioctl,
};
DECLARE_GEOM_CLASS(g_cf_class, g_cf);
/* Device methods */
static int cf_probe(device_t);
static void cf_identify(driver_t *, device_t);
static int cf_attach(device_t);
static void cf_attach_geom(void *, int);
/* ATA methods */
static int cf_cmd_identify(struct cf_priv *);
static int cf_cmd_write(uint32_t, uint32_t, void *);
static int cf_cmd_read(uint32_t, uint32_t, void *);
static int cf_wait_busy(void);
static int cf_send_cmd(uint32_t, uint8_t);
/* Miscelenous */
static void cf_swap_ascii(unsigned char[], char[]);
/* ------------------------------------------------------------------- *
* cf_access() *
* ------------------------------------------------------------------- */
static int cf_access (struct g_provider *pp, int r, int w, int e)
{
return (0);
}
/* ------------------------------------------------------------------- *
* cf_start() *
* ------------------------------------------------------------------- */
static void cf_start (struct bio *bp)
{
struct cf_priv *cf_priv;
int error;
cf_priv = bp->bio_to->geom->softc;
/*
* Handle actual I/O requests. The request is passed down through
* the bio struct.
*/
if(bp->bio_cmd & BIO_GETATTR) {
if (g_handleattr_int(bp, "GEOM::fwsectors", cf_priv->drive_param.sec_track))
return;
if (g_handleattr_int(bp, "GEOM::fwheads", cf_priv->drive_param.heads))
return;
g_io_deliver(bp, ENOIOCTL);
return;
}
if ((bp->bio_cmd & (BIO_READ | BIO_WRITE))) {
if (bp->bio_cmd & BIO_READ) {
error = cf_cmd_read(bp->bio_length / cf_priv->drive_param.sector_size,
bp->bio_offset / cf_priv->drive_param.sector_size, bp->bio_data);
} else if (bp->bio_cmd & BIO_WRITE) {
error = cf_cmd_write(bp->bio_length / cf_priv->drive_param.sector_size,
bp->bio_offset/cf_priv->drive_param.sector_size, bp->bio_data);
} else {
printf("%s: unrecognized bio_cmd %x.\n", __func__, bp->bio_cmd);
error = ENOTSUP;
}
if (error != 0) {
g_io_deliver(bp, error);
return;
}
bp->bio_resid = 0;
bp->bio_completed = bp->bio_length;
g_io_deliver(bp, 0);
}
}
static int cf_ioctl (struct g_provider *pp, u_long cmd, void *data, int fflag, struct thread *td)
{
return (0);
}
static uint8_t cf_inb_8(int port)
{
/*
* Traditional 8-bit PC Card/CF bus access.
*/
if (bus_type == CF_8) {
volatile uint8_t *task_file = (volatile uint8_t *)base_addr;
return task_file[port];
}
/*
* True IDE access. lower 8 bits on a 16-bit bus (see above).
*/
volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
return task_file[port] & 0xff;
}
static void cf_outb_8(int port, uint8_t val)
{
/*
* Traditional 8-bit PC Card/CF bus access.
*/
if (bus_type == CF_8) {
volatile uint8_t *task_file = (volatile uint8_t *)base_addr;
task_file[port] = val;
return;
}
/*
* True IDE access. lower 8 bits on a 16-bit bus (see above).
*/
volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
task_file[port] = val & 0xff;
}
static uint8_t cf_inb_16(int port)
{
volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
uint16_t val = task_file[port / 2];
if (port & 1)
return (val >> 8) & 0xff;
return val & 0xff;
}
static uint16_t cf_inw_16(int port)
{
volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
uint16_t val = task_file[port / 2];
return val;
}
static void cf_outw_16(int port, uint16_t val)
{
volatile uint16_t *task_file = (volatile uint16_t *)base_addr;
task_file[port / 2] = val;
}
/* ------------------------------------------------------------------- *
* cf_cmd_read() *
* ------------------------------------------------------------------- *
*
* Read nr_sectors from the device starting from start_sector.
*/
static int cf_cmd_read (uint32_t nr_sectors, uint32_t start_sector, void *buf)
{
unsigned long lba;
uint32_t count;
uint16_t *ptr_16;
uint8_t *ptr_8;
int error;
ptr_8 = (uint8_t*)buf;
ptr_16 = (uint16_t*)buf;
lba = start_sector;
while (nr_sectors--) {
error = cf_send_cmd(lba, CMD_READ_SECTOR);
if (error != 0) {
printf("%s: cf_send_cmd(CMD_READ_SECTOR) failed: %d\n", __func__, error);
return (error);
}
switch (bus_type)
{
case CF_8:
for (count = 0; count < SECTOR_SIZE; count++) {
*ptr_8++ = cf_inb_8(TF_DATA);
if ((count & 0xf) == 0)
(void)cf_inb_8(TF_STATUS);
}
break;
case CF_TRUE_IDE_8:
case CF_16:
default:
for (count = 0; count < SECTOR_SIZE; count+=2) {
uint16_t temp;
temp = cf_inw_16(TF_DATA);
*ptr_16++ = SWAP_SHORT(temp);
if ((count & 0xf) == 0)
(void)cf_inb_16(TF_STATUS);
}
break;
}
lba++;
}
return (0);
}
/* ------------------------------------------------------------------- *
* cf_cmd_write() *
* ------------------------------------------------------------------- *
*
* Write nr_sectors to the device starting from start_sector.
*/
static int cf_cmd_write (uint32_t nr_sectors, uint32_t start_sector, void *buf)
{
uint32_t lba;
uint32_t count;
uint16_t *ptr_16;
uint8_t *ptr_8;
int error;
lba = start_sector;
ptr_8 = (uint8_t*)buf;
ptr_16 = (uint16_t*)buf;
while (nr_sectors--) {
error = cf_send_cmd(lba, CMD_WRITE_SECTOR);
if (error != 0) {
printf("%s: cf_send_cmd(CMD_WRITE_SECTOR) failed: %d\n", __func__, error);
return (error);
}
switch (bus_type)
{
case CF_8:
for (count = 0; count < SECTOR_SIZE; count++) {
cf_outb_8(TF_DATA, *ptr_8++);
if ((count & 0xf) == 0)
(void)cf_inb_8(TF_STATUS);
}
break;
case CF_TRUE_IDE_8:
case CF_16:
default:
for (count = 0; count < SECTOR_SIZE; count+=2) {
uint16_t temp = *ptr_16++;
cf_outw_16(TF_DATA, SWAP_SHORT(temp));
if ((count & 0xf) == 0)
(void)cf_inb_16(TF_STATUS);
}
break;
}
lba++;
}
return (0);
}
/* ------------------------------------------------------------------- *
* cf_cmd_identify() *
* ------------------------------------------------------------------- *
*
* Read parameters and other information from the drive and store
* it in the drive_param structure
*
*/
static int cf_cmd_identify(struct cf_priv *cf_priv)
{
int count;
int error;
error = cf_send_cmd(0, CMD_IDENTIFY);
if (error != 0) {
printf("%s: identify failed: %d\n", __func__, error);
return (error);
}
switch (bus_type)
{
case CF_8:
for (count = 0; count < SECTOR_SIZE; count++)
cf_priv->drive_param.u.buf[count] = cf_inb_8(TF_DATA);
break;
case CF_TRUE_IDE_8:
case CF_16:
default:
for (count = 0; count < SECTOR_SIZE; count += 2) {
uint16_t temp;
temp = cf_inw_16(TF_DATA);
/* endianess will be swapped below */
cf_priv->drive_param.u.buf[count] = (temp & 0xff);
cf_priv->drive_param.u.buf[count + 1] = (temp & 0xff00) >> 8;
}
break;
}
cf_swap_ascii(cf_priv->drive_param.u.driveid.model, cf_priv->drive_param.model);
cf_priv->drive_param.sector_size = 512; //= SWAP_SHORT (cf_priv->drive_param.u.driveid.sector_bytes);
cf_priv->drive_param.heads = SWAP_SHORT (cf_priv->drive_param.u.driveid.current_heads);
cf_priv->drive_param.tracks = SWAP_SHORT (cf_priv->drive_param.u.driveid.current_cylinders);
cf_priv->drive_param.sec_track = SWAP_SHORT (cf_priv->drive_param.u.driveid.current_sectors);
cf_priv->drive_param.nr_sectors = (uint32_t)SWAP_SHORT (cf_priv->drive_param.u.driveid.lba_size_1) |
((uint32_t)SWAP_SHORT (cf_priv->drive_param.u.driveid.lba_size_2));
if (bootverbose) {
printf(" model %s\n", cf_priv->drive_param.model);
printf(" heads %d tracks %d sec_tracks %d sectors %d\n",
cf_priv->drive_param.heads, cf_priv->drive_param.tracks,
cf_priv->drive_param.sec_track, cf_priv->drive_param.nr_sectors);
}
return (0);
}
/* ------------------------------------------------------------------- *
* cf_send_cmd() *
* ------------------------------------------------------------------- *
*
* Send command to read/write one sector specified by lba.
*
*/
static int cf_send_cmd (uint32_t lba, uint8_t cmd)
{
switch (bus_type)
{
case CF_8:
case CF_TRUE_IDE_8:
while (cf_inb_8(TF_STATUS) & STATUS_BSY)
DELAY(WAIT_DELAY);
cf_outb_8(TF_SECTOR_COUNT, 1);
cf_outb_8(TF_SECTOR_NUMBER, lba & 0xff);
cf_outb_8(TF_CYL_LSB, (lba >> 8) & 0xff);
cf_outb_8(TF_CYL_MSB, (lba >> 16) & 0xff);
cf_outb_8(TF_DRV_HEAD, ((lba >> 24) & 0xff) | 0xe0);
cf_outb_8(TF_COMMAND, cmd);
break;
case CF_16:
default:
while (cf_inb_16(TF_STATUS) & STATUS_BSY)
DELAY(WAIT_DELAY);
cf_outw_16(TF_SECTOR_COUNT, 1 | ((lba & 0xff) << 8));
cf_outw_16(TF_CYL_LSB, ((lba >> 8) & 0xff) | (((lba >> 16) & 0xff) << 8));
cf_outw_16(TF_DRV_HEAD, (((lba >> 24) & 0xff) | 0xe0) | (cmd << 8));
break;
}
return (cf_wait_busy());
}
/* ------------------------------------------------------------------- *
* cf_wait_busy() *
* ------------------------------------------------------------------- *
*
* Wait until the drive finishes a given command and data is
* ready to be transferred. This is done by repeatedly checking
* the BSY bit of the status register. When the controller is ready for
* data transfer, it clears the BSY bit and sets the DRQ bit.
*
* If the DF bit is ever set, we return error.
*
* This code originally spun on DRQ. If that behavior turns out to be
* necessary, a flag can be added or this function can be called
* repeatedly as long as it is returning ENXIO.
*/
static int cf_wait_busy (void)
{
uint8_t status;
switch (bus_type)
{
case CF_8:
case CF_TRUE_IDE_8:
status = cf_inb_8(TF_STATUS);
while ((status & STATUS_BSY) == STATUS_BSY) {
if ((status & STATUS_DF) != 0) {
printf("%s: device fault (status=%x)\n", __func__, status);
return (EIO);
}
DELAY(WAIT_DELAY);
status = cf_inb_8(TF_STATUS);
}
break;
case CF_16:
default:
status = cf_inb_16(TF_STATUS);
while ((status & STATUS_BSY) == STATUS_BSY) {
if ((status & STATUS_DF) != 0) {
printf("%s: device fault (status=%x)\n", __func__, status);
return (EIO);
}
DELAY(WAIT_DELAY);
status = cf_inb_16(TF_STATUS);
}
break;
}
/* DRQ is only for when read data is actually available; check BSY */
/* Some vendors do assert DRQ, but not all. Check BSY instead. */
if (status & STATUS_BSY) {
printf("%s: device not ready (status=%x)\n", __func__, status);
return (ENXIO);
}
return (0);
}
/* ------------------------------------------------------------------- *
* cf_swap_ascii() *
* ------------------------------------------------------------------- *
*
* The ascii string returned by the controller specifying
* the model of the drive is byte-swaped. This routine
* corrects the byte ordering.
*
*/
static void cf_swap_ascii (unsigned char str1[], char str2[])
{
int i;
for(i = 0; i < MODEL_STR_SIZE; i++)
str2[i] = str1[i ^ 1];
}
/* ------------------------------------------------------------------- *
* cf_probe() *
* ------------------------------------------------------------------- */
static int cf_probe (device_t dev)
{
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
return (ENXIO);
if (device_get_unit(dev) != 0) {
panic("can't attach more devices\n");
}
device_set_desc(dev, "Octeon Compact Flash Driver");
return (0);
}
/* ------------------------------------------------------------------- *
* cf_identify() *
* ------------------------------------------------------------------- *
*
* Find the bootbus region for the CF to determine
* 16 or 8 bit and check to see if device is
* inserted.
*
*/
static void cf_identify (driver_t *drv, device_t parent)
{
int bus_region;
int count = 0;
cvmx_mio_boot_reg_cfgx_t cfg;
uint64_t phys_base;
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
return;
phys_base = cvmx_sysinfo_get()->compact_flash_common_base_addr;
if (phys_base == 0)
return;
base_addr = cvmx_phys_to_ptr(phys_base);
for (bus_region = 0; bus_region < 8; bus_region++)
{
cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(bus_region));
if (cfg.s.base == phys_base >> 16)
{
if (cvmx_sysinfo_get()->compact_flash_attribute_base_addr == 0)
bus_type = CF_TRUE_IDE_8;
else
bus_type = (cfg.s.width) ? CF_16 : CF_8;
printf("Compact flash found in bootbus region %d (%s).\n", bus_region, cf_type[bus_type]);
break;
}
}
switch (bus_type)
{
case CF_8:
case CF_TRUE_IDE_8:
/* Check if CF is inserted */
while (cf_inb_8(TF_STATUS) & STATUS_BSY) {
if ((count++) == NR_TRIES ) {
printf("Compact Flash not present\n");
return;
}
DELAY(WAIT_DELAY);
}
break;
case CF_16:
default:
/* Check if CF is inserted */
while (cf_inb_16(TF_STATUS) & STATUS_BSY) {
if ((count++) == NR_TRIES ) {
printf("Compact Flash not present\n");
return;
}
DELAY(WAIT_DELAY);
}
break;
}
BUS_ADD_CHILD(parent, 0, "cf", 0);
}
/* ------------------------------------------------------------------- *
* cf_attach_geom() *
* ------------------------------------------------------------------- */
static void cf_attach_geom (void *arg, int flag)
{
struct cf_priv *cf_priv;
cf_priv = (struct cf_priv *) arg;
cf_priv->cf_geom = g_new_geomf(&g_cf_class, "cf%d", device_get_unit(cf_priv->dev));
cf_priv->cf_geom->softc = cf_priv;
cf_priv->cf_provider = g_new_providerf(cf_priv->cf_geom, cf_priv->cf_geom->name);
cf_priv->cf_provider->sectorsize = cf_priv->drive_param.sector_size;
cf_priv->cf_provider->mediasize = cf_priv->drive_param.nr_sectors * cf_priv->cf_provider->sectorsize;
g_error_provider(cf_priv->cf_provider, 0);
}
/* ------------------------------------------------------------------- *
* cf_attach() *
* ------------------------------------------------------------------- */
static int cf_attach (device_t dev)
{
struct cf_priv *cf_priv;
int error;
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
return (ENXIO);
cf_priv = device_get_softc(dev);
cf_priv->dev = dev;
error = cf_cmd_identify(cf_priv);
if (error != 0) {
device_printf(dev, "cf_cmd_identify failed: %d\n", error);
return (error);
}
g_post_event(cf_attach_geom, cf_priv, M_WAITOK, NULL);
bioq_init(&cf_priv->cf_bq);
return 0;
}
static device_method_t cf_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, cf_probe),
DEVMETHOD(device_identify, cf_identify),
DEVMETHOD(device_attach, cf_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
{ 0, 0 }
};
static driver_t cf_driver = {
"cf",
cf_methods,
sizeof(struct cf_priv)
};
static devclass_t cf_devclass;
DRIVER_MODULE(cf, nexus, cf_driver, cf_devclass, 0, 0);
|