1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
|
/*-
* Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
* Copyright (c) 2003-2006 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include <sys/param.h>
#include <sys/types.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <sys/systm.h>
#include <sys/sbuf.h>
#include <sys/queue.h>
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/sysctl.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <machine/clock.h> /* for DELAY */
#include <dev/sound/chip.h>
#include <dev/sound/pcm/sound.h>
#include <dev/sound/pcm/ac97.h>
#include "opt_emu10kx.h"
#include <dev/sound/pci/emu10kx.h>
/* hw flags */
#define HAS_51 0x0001
#define HAS_71 0x0002
#define HAS_AC97 0x0004
#define IS_EMU10K1 0x0008
#define IS_EMU10K2 0x0010
#define IS_CA0102 0x0020
#define IS_CA0108 0x0040
#define IS_UNKNOWN 0x0080
#define BROKEN_DIGITAL 0x0100
#define DIGITAL_ONLY 0x0200
#define IS_CARDBUS 0x0400
#define MODE_ANALOG 1
#define MODE_DIGITAL 2
#define SPDIF_MODE_PCM 1
#define SPDIF_MODE_AC3 2
#define MACS 0x0
#define MACS1 0x1
#define MACW 0x2
#define MACW1 0x3
#define MACINTS 0x4
#define MACINTW 0x5
#define ACC3 0x6
#define MACMV 0x7
#define ANDXOR 0x8
#define TSTNEG 0x9
#define LIMIT 0xA
#define LIMIT1 0xB
#define LOG 0xC
#define EXP 0xD
#define INTERP 0xE
#define SKIP 0xF
#define GPR(i) (sc->gpr_base+(i))
#define INP(i) (sc->input_base+(i))
#define OUTP(i) (sc->output_base+(i))
#define FX(i) (i)
#define FX2(i) (sc->efxc_base+(i))
#define DSP_CONST(i) (sc->dsp_zero+(i))
#define COND_NORMALIZED DSP_CONST(0x1)
#define COND_BORROW DSP_CONST(0x2)
#define COND_MINUS DSP_CONST(0x3)
#define COND_LESS_ZERO DSP_CONST(0x4)
#define COND_EQ_ZERO DSP_CONST(0x5)
#define COND_SATURATION DSP_CONST(0x6)
#define COND_NEQ_ZERO DSP_CONST(0x8)
/* Live! Inputs */
#define IN_AC97_L 0x00
#define IN_AC97_R 0x01
#define IN_AC97 IN_AC97_L
#define IN_SPDIF_CD_L 0x02
#define IN_SPDIF_CD_R 0x03
#define IN_SPDIF_CD IN_SPDIF_CD_L
#define IN_ZOOM_L 0x04
#define IN_ZOOM_R 0x05
#define IN_ZOOM IN_ZOOM_L
#define IN_TOSLINK_L 0x06
#define IN_TOSLINK_R 0x07
#define IN_TOSLINK IN_TOSLINK_L
#define IN_LINE1_L 0x08
#define IN_LINE1_R 0x09
#define IN_LINE1 IN_LINE1_L
#define IN_COAX_SPDIF_L 0x0a
#define IN_COAX_SPDIF_R 0x0b
#define IN_COAX_SPDIF IN_COAX_SPDIF_L
#define IN_LINE2_L 0x0c
#define IN_LINE2_R 0x0d
#define IN_LINE2 IN_LINE2_L
#define IN_0E 0x0e
#define IN_0F 0x0f
/* Outputs */
#define OUT_AC97_L 0x00
#define OUT_AC97_R 0x01
#define OUT_AC97 OUT_AC97_L
#define OUT_A_FRONT OUT_AC97
#define OUT_TOSLINK_L 0x02
#define OUT_TOSLINK_R 0x03
#define OUT_TOSLINK OUT_TOSLINK_L
#define OUT_D_CENTER 0x04
#define OUT_D_SUB 0x05
#define OUT_HEADPHONE_L 0x06
#define OUT_HEADPHONE_R 0x07
#define OUT_HEADPHONE OUT_HEADPHONE_L
#define OUT_REAR_L 0x08
#define OUT_REAR_R 0x09
#define OUT_REAR OUT_REAR_L
#define OUT_ADC_REC_L 0x0a
#define OUT_ADC_REC_R 0x0b
#define OUT_ADC_REC OUT_ADC_REC_L
#define OUT_MIC_CAP 0x0c
/* Live! 5.1 Digital, non-standart 5.1 (center & sub) outputs */
#define OUT_A_CENTER 0x11
#define OUT_A_SUB 0x12
/* Audigy Inputs */
#define A_IN_AC97_L 0x00
#define A_IN_AC97_R 0x01
#define A_IN_AC97 A_IN_AC97_L
#define A_IN_SPDIF_CD_L 0x02
#define A_IN_SPDIF_CD_R 0x03
#define A_IN_SPDIF_CD A_IN_SPDIF_CD_L
#define A_IN_O_SPDIF_L 0x04
#define A_IN_O_SPDIF_R 0x05
#define A_IN_O_SPDIF A_IN_O_SPDIF_L
#define A_IN_LINE2_L 0x08
#define A_IN_LINE2_R 0x09
#define A_IN_LINE2 A_IN_LINE2_L
#define A_IN_R_SPDIF_L 0x0a
#define A_IN_R_SPDIF_R 0x0b
#define A_IN_R_SPDIF A_IN_R_SPDIF_L
#define A_IN_AUX2_L 0x0c
#define A_IN_AUX2_R 0x0d
#define A_IN_AUX2 A_IN_AUX2_L
/* Audigiy Outputs */
#define A_OUT_D_FRONT_L 0x00
#define A_OUT_D_FRONT_R 0x01
#define A_OUT_D_FRONT A_OUT_D_FRONT_L
#define A_OUT_D_CENTER 0x02
#define A_OUT_D_SUB 0x03
#define A_OUT_D_SIDE_L 0x04
#define A_OUT_D_SIDE_R 0x05
#define A_OUT_D_SIDE A_OUT_D_SIDE_L
#define A_OUT_D_REAR_L 0x06
#define A_OUT_D_REAR_R 0x07
#define A_OUT_D_REAR A_OUT_D_REAR_L
/* on Audigy Platinum only */
#define A_OUT_HPHONE_L 0x04
#define A_OUT_HPHONE_R 0x05
#define A_OUT_HPHONE A_OUT_HPHONE_L
#define A_OUT_A_FRONT_L 0x08
#define A_OUT_A_FRONT_R 0x09
#define A_OUT_A_FRONT A_OUT_A_FRONT_L
#define A_OUT_A_CENTER 0x0a
#define A_OUT_A_SUB 0x0b
#define A_OUT_A_SIDE_L 0x0c
#define A_OUT_A_SIDE_R 0x0d
#define A_OUT_A_SIDE A_OUT_A_SIDE_L
#define A_OUT_A_REAR_L 0x0e
#define A_OUT_A_REAR_R 0x0f
#define A_OUT_A_REAR A_OUT_A_REAR_L
#define A_OUT_AC97_L 0x10
#define A_OUT_AC97_R 0x11
#define A_OUT_AC97 A_OUT_AC97_L
#define A_OUT_ADC_REC_L 0x16
#define A_OUT_ADC_REC_R 0x17
#define A_OUT_ADC_REC A_OUT_ADC_REC_L
#include "emu10k1-alsa%diked.h"
#include "p16v-alsa%diked.h"
#include "p17v-alsa%diked.h"
#define C_FRONT_L 0
#define C_FRONT_R 1
#define C_REC_L 2
#define C_REC_R 3
#define C_REAR_L 4
#define C_REAR_R 5
#define C_CENTER 6
#define C_SUB 7
#define C_SIDE_L 8
#define C_SIDE_R 9
#define NUM_CACHES 10
#define NUM_DUMMIES 64
#define EMU_MAX_GPR 512
#define EMU_MAX_IRQ_CONSUMERS 32
struct emu_voice {
int vnum;
unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1;
int speed;
int start;
int end;
int vol;
uint32_t buf;
void *vbuf;
struct emu_voice *slave;
uint32_t sa;
uint32_t ea;
};
struct emu_memblk {
SLIST_ENTRY(emu_memblk) link;
void *buf;
char owner[16];
bus_addr_t buf_addr;
uint32_t pte_start, pte_size;
};
struct emu_mem {
uint8_t bmap[EMU_MAXPAGES / 8];
uint32_t *ptb_pages;
void *silent_page;
bus_addr_t silent_page_addr;
bus_addr_t ptb_pages_addr;
bus_dma_tag_t dmat;
SLIST_HEAD(, emu_memblk) blocks;
};
/* rm */
struct emu_rm {
struct emu_sc_info *card;
struct mtx gpr_lock;
signed int allocmap[EMU_MAX_GPR];
int num_gprs;
int last_free_gpr;
int num_used;
};
struct emu_intr_handler {
void* softc;
uint32_t intr_mask;
uint32_t inte_mask;
uint32_t(*irq_func) (void *softc, uint32_t irq);
};
struct emu_sc_info {
struct mtx lock;
struct mtx rw; /* Hardware exclusive access lock */
/* Hardware and subdevices */
device_t dev;
device_t pcm[RT_COUNT];
device_t midi[2];
uint32_t type;
uint32_t rev;
bus_space_tag_t st;
bus_space_handle_t sh;
struct cdev *cdev; /* /dev/emu10k character device */
struct mtx emu10kx_lock;
int emu10kx_isopen;
struct sbuf emu10kx_sbuf;
int emu10kx_bufptr;
/* Resources */
struct resource *reg;
struct resource *irq;
void *ih;
/* IRQ handlers */
struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS];
/* Card HW configuration */
unsigned int mchannel_fx;
unsigned int dsp_zero;
unsigned int code_base;
unsigned int code_size;
unsigned int gpr_base;
unsigned int num_gprs;
unsigned int input_base;
unsigned int output_base;
unsigned int efxc_base;
unsigned int opcode_shift;
unsigned int high_operand_shift;
unsigned int address_mask;
uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1,
has_ac97:1, has_51:1, has_71:1,
enable_ir:1, enable_debug:1,
broken_digital:1, is_cardbus:1;
unsigned int num_inputs;
unsigned int num_outputs;
unsigned int num_fxbuses;
unsigned int routing_code_start;
unsigned int routing_code_end;
/* HW resources */
struct emu_voice voice[NUM_G]; /* Hardware voices */
uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */
int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */
int timerinterval;
struct emu_rm *rm;
struct emu_mem mem; /* memory */
/* Mixer */
int mixer_gpr[NUM_MIXERS];
int mixer_volcache[NUM_MIXERS];
int cache_gpr[NUM_CACHES];
int dummy_gpr[NUM_DUMMIES];
struct sysctl_ctx_list *ctx;
struct sysctl_oid *root;
};
static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error);
static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr);
static void emu_free(struct emu_mem *mem, void *dmabuf);
static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner);
static int emu_memfree(struct emu_mem *mem, void *membuf);
static int emu_memstart(struct emu_mem *mem, void *membuf);
/* /dev */
static int emu10kx_dev_init(struct emu_sc_info *sc);
static int emu10kx_dev_uninit(struct emu_sc_info *sc);
static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s);
static void emumix_set_mode(struct emu_sc_info *sc, int mode);
static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode);
static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol);
static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);
static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS);
static int emu_rm_init(struct emu_sc_info *sc);
static int emu_rm_uninit(struct emu_sc_info *sc);
static int emu_rm_gpr_alloc(struct emu_rm *rm, int count);
static unsigned int emu_getcard(device_t dev);
static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size);
static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size);
static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data);
static void emu_vstop(struct emu_sc_info *sc, char channel, int enable);
static void emu_intr(void *p);
static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data);
static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc);
static void emu_initefx(struct emu_sc_info *sc);
static int emu_cardbus_init(struct emu_sc_info *sc);
static int emu_init(struct emu_sc_info *sc);
static int emu_uninit(struct emu_sc_info *sc);
static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result);
static int emu_write_ivar(device_t bus __unused, device_t dev __unused,
int ivar_index, uintptr_t value __unused);
static int emu_pci_probe(device_t dev);
static int emu_pci_attach(device_t dev);
static int emu_pci_detach(device_t dev);
static int emu_modevent(module_t mod __unused, int cmd, void *data __unused);
/* Supported cards */
struct emu_hwinfo {
uint16_t vendor;
uint16_t device;
uint16_t subvendor;
uint16_t subdevice;
char SBcode[8];
char desc[32];
int flags;
};
static struct emu_hwinfo emu_cards[] = {
{0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0},
/* 0x0020..0x002f 4.0 EMU10K1 cards */
{0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1},
/* (range unknown) 5.1 EMU10K1 cards */
{0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
/* 0x80??..0x805? 4.0 EMU10K1 cards */
{0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
/* 0x8061..0x???? 5.1 EMU10K1 cards */
{0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
{0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1},
/* Generic SB Live! */
{0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1},
/* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */
/* 0x0051..0x0051 5.1 CA0100-IAF cards */
{0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2},
/* ES is CA0100-IDF chip that don't work in digital mode */
{0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL},
/* 0x0053..0x005C 5.1 CA0101-NAF cards */
{0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
{0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
/* 0x1002..0x1009 5.1 CA0102-IAT cards */
{0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102},
{0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102},
{0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102},
/* 0x2001..0x2003 7.1 CA0102-ICT cards */
{0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
{0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
/* XXX No reports about 0x2003 & 0x2004 cards */
{0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
{0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
{0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
/* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */
{0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102},
/* Generic Audigy or Audigy 2 */
{0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2},
/* We don't support CA0103-DAT (Audigy LS) cards */
/* There is NO CA0104-xxx cards */
/* There is NO CA0105-xxx cards */
/* We don't support CA0106-DAT (SB Live! 24 bit) cards */
/* There is NO CA0107-xxx cards */
/* 0x1000..0x1001 7.1 CA0108-IAT cards */
{0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY},
{0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
{0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
{0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS},
{0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108},
};
/* Unsupported cards */
static struct emu_hwinfo emu_bad_cards[] = {
/* APS cards should be possible to support */
{0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0},
{0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0},
{0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0},
/* Similar-named ("Live!" or "Audigy") cards on different chipsets */
{0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0},
{0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0},
{0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0},
};
/*
* Get best known information about device.
*/
static unsigned int
emu_getcard(device_t dev)
{
uint16_t device;
uint16_t subdevice;
int n_cards;
unsigned int thiscard;
int i;
device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2);
subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2);
n_cards = sizeof(emu_cards) / sizeof(struct emu_hwinfo);
thiscard = 0;
for (i = 1; i < n_cards; i++) {
if (device == emu_cards[i].device) {
if (subdevice == emu_cards[i].subdevice) {
thiscard = i;
break;
}
if (0x0000 == emu_cards[i].subdevice) {
thiscard = i;
/* don't break, we can get more specific card
* later in the list */
}
}
}
n_cards = sizeof(emu_bad_cards) / sizeof(struct emu_hwinfo);
for (i = 0; i < n_cards; i++) {
if (device == emu_bad_cards[i].device) {
if (subdevice == emu_bad_cards[i].subdevice) {
thiscard = 0;
break;
}
if (0x0000 == emu_bad_cards[i].subdevice) {
thiscard = 0;
break; /* we avoid all this cards */
}
}
}
return (thiscard);
}
/*
* Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers.
* Some of them are used directly, some of them provide pointer / data pairs.
*/
static uint32_t
emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
{
KASSERT(sc != NULL, ("emu_rd: NULL sc"));
switch (size) {
case 1:
return (bus_space_read_1(sc->st, sc->sh, regno));
case 2:
return (bus_space_read_2(sc->st, sc->sh, regno));
case 4:
return (bus_space_read_4(sc->st, sc->sh, regno));
}
return (0xffffffff);
}
static void
emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
{
KASSERT(sc != NULL, ("emu_rd: NULL sc"));
switch (size) {
case 1:
bus_space_write_1(sc->st, sc->sh, regno, data);
break;
case 2:
bus_space_write_2(sc->st, sc->sh, regno, data);
break;
case 4:
bus_space_write_4(sc->st, sc->sh, regno, data);
break;
}
}
/*
* PTR / DATA interface. Access to EMU10Kx is made
* via (channel, register) pair. Some registers are channel-specific,
* some not.
*/
uint32_t
emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg)
{
uint32_t ptr, val, mask, size, offset;
ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
mtx_lock(&sc->rw);
emu_wr_nolock(sc, PTR, ptr, 4);
val = emu_rd_nolock(sc, DATA, 4);
mtx_unlock(&sc->rw);
/*
* XXX Some register numbers has data size and offset encoded in
* it to get only part of 32bit register. This use is not described
* in register name, be careful!
*/
if (reg & 0xff000000) {
size = (reg >> 24) & 0x3f;
offset = (reg >> 16) & 0x1f;
mask = ((1 << size) - 1) << offset;
val &= mask;
val >>= offset;
}
return (val);
}
void
emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data)
{
uint32_t ptr, mask, size, offset;
ptr = ((reg << 16) & sc->address_mask) | (chn & PTR_CHANNELNUM_MASK);
mtx_lock(&sc->rw);
emu_wr_nolock(sc, PTR, ptr, 4);
/*
* XXX Another kind of magic encoding in register number. This can
* give you side effect - it will read previous data from register
* and change only required bits.
*/
if (reg & 0xff000000) {
size = (reg >> 24) & 0x3f;
offset = (reg >> 16) & 0x1f;
mask = ((1 << size) - 1) << offset;
data <<= offset;
data &= mask;
data |= emu_rd_nolock(sc, DATA, 4) & ~mask;
}
emu_wr_nolock(sc, DATA, data, 4);
mtx_unlock(&sc->rw);
}
/*
* PTR2 / DATA2 interface. Access to P16v is made
* via (channel, register) pair. Some registers are channel-specific,
* some not. This interface is supported by CA0102 and CA0108 chips only.
*/
uint32_t
emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg)
{
uint32_t val;
mtx_lock(&sc->rw);
emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
val = emu_rd_nolock(sc, DATA2, 4);
mtx_unlock(&sc->rw);
return (val);
}
void
emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data)
{
mtx_lock(&sc->rw);
emu_wr_nolock(sc, PTR2, (reg << 16) | chn, 4);
emu_wr_nolock(sc, DATA2, data, 4);
mtx_unlock(&sc->rw);
}
/*
* XXX CardBus interface. Not tested on any real hardware.
*/
static void
emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data)
{
uint32_t val;
/* 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102 Seems
* to be some reg/value accessible kind of config register on CardBus
* CA0108, with value(?) in top 16 bit, address(?) in low 16 */
mtx_lock(&sc->rw);
val = emu_rd_nolock(sc, 0x38, 4);
emu_wr_nolock(sc, 0x38, data, 4);
val = emu_rd_nolock(sc, 0x38, 4);
mtx_unlock(&sc->rw);
}
/*
* Direct hardware register access
*/
void
emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
{
mtx_lock(&sc->rw);
emu_wr_nolock(sc, regno, data, size);
mtx_unlock(&sc->rw);
}
uint32_t
emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
{
uint32_t rd;
mtx_lock(&sc->rw);
rd = emu_rd_nolock(sc, regno, size);
mtx_unlock(&sc->rw);
return (rd);
}
/*
* Enabling IR MIDI messages is another kind of black magic. It just
* has to be made this way. It really do it.
*/
void
emu_enable_ir(struct emu_sc_info *sc)
{
uint32_t iocfg;
mtx_lock(&sc->rw);
if (sc->is_emu10k2 || sc->is_ca0102) {
iocfg = emu_rd_nolock(sc, A_IOCFG, 2);
emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT2, 2);
DELAY(500);
emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, 2);
DELAY(500);
emu_wr_nolock(sc, A_IOCFG, iocfg | A_IOCFG_GPOUT1, 2);
DELAY(100);
emu_wr_nolock(sc, A_IOCFG, iocfg, 2);
device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
sc->enable_ir = 1;
}
if (sc->is_emu10k1) {
iocfg = emu_rd_nolock(sc, HCFG, 4);
emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT2, 4);
DELAY(500);
emu_wr_nolock(sc, HCFG, iocfg | HCFG_GPOUT1 | HCFG_GPOUT2, 4);
DELAY(100);
emu_wr_nolock(sc, HCFG, iocfg, 4);
device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
sc->enable_ir = 1;
}
mtx_unlock(&sc->rw);
}
/*
* emu_timer_ - HW timer managment
*/
int
emu_timer_create(struct emu_sc_info *sc)
{
int i, timer;
timer = -1;
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
if (sc->timer[i] == 0) {
sc->timer[i] = -1; /* disable it */
timer = i;
return (timer);
}
return (-1);
}
int
emu_timer_set(struct emu_sc_info *sc, int timer, int delay)
{
int i;
if(timer < 0)
return (-1);
RANGE(delay, 16, 1024);
RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
sc->timer[timer] = delay;
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
if (sc->timerinterval > sc->timer[i])
sc->timerinterval = sc->timer[i];
emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
return (timer);
}
int
emu_timer_enable(struct emu_sc_info *sc, int timer, int go)
{
uint32_t x;
int ena_int;
int i;
if(timer < 0)
return (-1);
RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
mtx_lock(&sc->lock);
if ((go == 1) && (sc->timer[timer] < 0))
sc->timer[timer] = -sc->timer[timer];
if ((go == 0) && (sc->timer[timer] > 0))
sc->timer[timer] = -sc->timer[timer];
ena_int = 0;
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
if (sc->timerinterval > sc->timer[i])
sc->timerinterval = sc->timer[i];
if (sc->timer[i] > 0)
ena_int = 1;
}
emu_wr(sc, TIMER, sc->timerinterval & 0x03ff, 2);
if (ena_int == 1) {
x = emu_rd(sc, INTE, 4);
x |= INTE_INTERVALTIMERENB;
emu_wr(sc, INTE, x, 4);
} else {
x = emu_rd(sc, INTE, 4);
x &= ~INTE_INTERVALTIMERENB;
emu_wr(sc, INTE, x, 4);
}
mtx_unlock(&sc->lock);
return (0);
}
int
emu_timer_clear(struct emu_sc_info *sc, int timer)
{
if(timer < 0)
return (-1);
RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
emu_timer_enable(sc, timer, 0);
mtx_lock(&sc->lock);
if (sc->timer[timer] != 0)
sc->timer[timer] = 0;
mtx_unlock(&sc->lock);
return (timer);
}
/*
* emu_intr_ - HW interrupt handler managment
*/
int
emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc)
{
int i;
uint32_t x;
mtx_lock(&sc->lock);
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
if (sc->ihandler[i].inte_mask == 0) {
sc->ihandler[i].inte_mask = inte_mask;
sc->ihandler[i].intr_mask = intr_mask;
sc->ihandler[i].softc = isc;
sc->ihandler[i].irq_func = func;
x = emu_rd(sc, INTE, 4);
x |= inte_mask;
emu_wr(sc, INTE, x, 4);
mtx_unlock(&sc->lock);
#ifdef SND_EMU10KX_DEBUG
device_printf(sc->dev, "ihandle %d registered\n", i);
#endif
return (i);
}
mtx_unlock(&sc->lock);
#ifdef SND_EMU10KX_DEBUG
device_printf(sc->dev, "ihandle not registered\n");
#endif
return (-1);
}
int
emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
{
uint32_t x;
int i;
mtx_lock(&sc->lock);
if (sc->ihandler[hnumber].inte_mask == 0) {
mtx_unlock(&sc->lock);
return (-1);
}
x = emu_rd(sc, INTE, 4);
x &= ~sc->ihandler[hnumber].inte_mask;
sc->ihandler[hnumber].inte_mask = 0;
sc->ihandler[hnumber].intr_mask = 0;
sc->ihandler[hnumber].softc = NULL;
sc->ihandler[hnumber].irq_func = NULL;
/* other interupt handlers may use this INTE value */
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
if (sc->ihandler[i].inte_mask != 0)
x |= sc->ihandler[i].inte_mask;
emu_wr(sc, INTE, x, 4);
mtx_unlock(&sc->lock);
return (hnumber);
}
static void
emu_intr(void *p)
{
struct emu_sc_info *sc = (struct emu_sc_info *)p;
uint32_t stat, ack;
int i;
for (;;) {
stat = emu_rd(sc, IPR, 4);
ack = 0;
if (stat == 0)
break;
emu_wr(sc, IPR, stat, 4);
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
(((void *)sc->ihandler[i].irq_func) != NULL)) {
ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc,
(sc->ihandler[i].intr_mask) & stat);
}
}
#ifdef SND_EMU10KX_DEBUG
if(stat & (~ack))
device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack));
#endif
}
if ((sc->is_ca0102) || (sc->is_ca0108))
for (;;) {
stat = emu_rd(sc, IPR2, 4);
ack = 0;
if (stat == 0)
break;
emu_wr(sc, IPR2, stat, 4);
device_printf(sc->dev, "IPR2: %08x\n", stat);
break; /* to avoid infinite loop. shoud be removed
* after completion of P16V interface. */
}
if (sc->is_ca0102)
for (;;) {
stat = emu_rd(sc, IPR3, 4);
ack = 0;
if (stat == 0)
break;
emu_wr(sc, IPR3, stat, 4);
device_printf(sc->dev, "IPR3: %08x\n", stat);
break; /* to avoid infinite loop. should be removed
* after completion of S/PDIF interface */
}
}
/*
* Get data from private emu10kx structure for PCM buffer allocation.
* Used by PCM code only.
*/
bus_dma_tag_t
emu_gettag(struct emu_sc_info *sc)
{
return (sc->mem.dmat);
}
static void
emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error)
{
bus_addr_t *phys = (bus_addr_t *) arg;
*phys = error ? 0 : (bus_addr_t) segs->ds_addr;
if (bootverbose) {
printf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n",
(unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
nseg, error);
}
}
static void *
emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr)
{
void *dmabuf;
bus_dmamap_t map;
*addr = 0;
if (bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, &map))
return (NULL);
if (bus_dmamap_load(mem->dmat, map, dmabuf, sz, emu_setmap, addr, 0) || !*addr)
return (NULL);
return (dmabuf);
}
static void
emu_free(struct emu_mem *mem, void *dmabuf)
{
bus_dmamem_free(mem->dmat, dmabuf, NULL);
}
static void *
emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner)
{
uint32_t blksz, start, idx, ofs, tmp, found;
struct emu_memblk *blk;
void *membuf;
blksz = sz / EMUPAGESIZE;
if (sz > (blksz * EMUPAGESIZE))
blksz++;
if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE)
return (NULL);
/* find a free block in the bitmap */
found = 0;
start = 1;
while (!found && start + blksz < EMU_MAXPAGES) {
found = 1;
for (idx = start; idx < start + blksz; idx++)
if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
found = 0;
if (!found)
start++;
}
if (!found)
return (NULL);
blk = malloc(sizeof(*blk), M_DEVBUF, M_NOWAIT);
if (blk == NULL)
return (NULL);
bzero(blk, sizeof(*blk));
membuf = emu_malloc(mem, sz, &blk->buf_addr);
*addr = blk->buf_addr;
if (membuf == NULL) {
free(blk, M_DEVBUF);
return (NULL);
}
blk->buf = membuf;
blk->pte_start = start;
blk->pte_size = blksz;
strncpy(blk->owner, owner, 15);
blk->owner[15] = '\0';
#ifdef SND_EMU10KX_DEBUG
printf("emu10kx emu_memalloc: allocating %d for %s\n", blk->pte_size, blk->owner);
#endif
ofs = 0;
for (idx = start; idx < start + blksz; idx++) {
mem->bmap[idx >> 3] |= 1 << (idx & 7);
tmp = (uint32_t) (u_long) ((uint8_t *) blk->buf_addr + ofs);
mem->ptb_pages[idx] = (tmp << 1) | idx;
ofs += EMUPAGESIZE;
}
SLIST_INSERT_HEAD(&mem->blocks, blk, link);
return (membuf);
}
static int
emu_memfree(struct emu_mem *mem, void *membuf)
{
uint32_t idx, tmp;
struct emu_memblk *blk, *i;
blk = NULL;
SLIST_FOREACH(i, &mem->blocks, link) {
if (i->buf == membuf)
blk = i;
}
if (blk == NULL)
return (EINVAL);
#ifdef SND_EMU10KX_DEBUG
printf("emu10kx emu_memfree: freeing %d for %s\n", blk->pte_size, blk->owner);
#endif
SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
emu_free(mem, membuf);
tmp = (uint32_t) (mem->silent_page_addr) << 1;
for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
mem->ptb_pages[idx] = tmp | idx;
}
free(blk, M_DEVBUF);
return (0);
}
static int
emu_memstart(struct emu_mem *mem, void *membuf)
{
struct emu_memblk *blk, *i;
blk = NULL;
SLIST_FOREACH(i, &mem->blocks, link) {
if (i->buf == membuf)
blk = i;
}
if (blk == NULL)
return (-1);
return (blk->pte_start);
}
static uint32_t
emu_rate_to_pitch(uint32_t rate)
{
static uint32_t logMagTable[128] = {
0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
};
static char logSlopeTable[128] = {
0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
};
int i;
if (rate == 0)
return (0);
rate *= 11185; /* Scale 48000 to 0x20002380 */
for (i = 31; i > 0; i--) {
if (rate & 0x80000000) { /* Detect leading "1" */
return (((uint32_t) (i - 15) << 20) +
logMagTable[0x7f & (rate >> 24)] +
(0x7f & (rate >> 17)) *
logSlopeTable[0x7f & (rate >> 24)]);
}
rate <<= 1;
}
/* NOTREACHED */
return (0);
}
static uint32_t
emu_rate_to_linearpitch(uint32_t rate)
{
rate = (rate << 8) / 375;
return ((rate >> 1) + (rate & 1));
}
struct emu_voice *
emu_valloc(struct emu_sc_info *sc)
{
struct emu_voice *v;
int i;
v = NULL;
mtx_lock(&sc->lock);
for (i = 0; i < NUM_G && sc->voice[i].busy; i++);
if (i < NUM_G) {
v = &sc->voice[i];
v->busy = 1;
}
mtx_unlock(&sc->lock);
return (v);
}
void
emu_vfree(struct emu_sc_info *sc, struct emu_voice *v)
{
int i, r;
mtx_lock(&sc->lock);
for (i = 0; i < NUM_G; i++) {
if (v == &sc->voice[i] && sc->voice[i].busy) {
v->busy = 0;
/* XXX What we should do with mono channels?
See -pcm.c emupchan_init for other side of
this problem */
if (v->slave != NULL)
r = emu_memfree(&sc->mem, v->vbuf);
}
}
mtx_unlock(&sc->lock);
}
int
emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s,
uint32_t sz, struct snd_dbuf *b)
{
void *vbuf;
bus_addr_t tmp_addr;
vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit");
if (vbuf == NULL)
return (ENOMEM);
if (b != NULL)
sndbuf_setup(b, vbuf, sz);
m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE;
if (m->start == -1) {
emu_memfree(&sc->mem, vbuf);
return (ENOMEM);
}
m->end = m->start + sz;
m->speed = 0;
m->b16 = 0;
m->stereo = 0;
m->running = 0;
m->ismaster = 1;
m->vol = 0xff;
m->buf = tmp_addr;
m->vbuf = vbuf;
m->slave = s;
if (s != NULL) {
s->start = m->start;
s->end = m->end;
s->speed = 0;
s->b16 = 0;
s->stereo = 0;
s->running = 0;
s->ismaster = 0;
s->vol = m->vol;
s->buf = m->buf;
s->vbuf = NULL;
s->slave = NULL;
}
return (0);
}
void
emu_vsetup(struct emu_voice *v, int fmt, int spd)
{
if (fmt) {
v->b16 = (fmt & AFMT_16BIT) ? 1 : 0;
v->stereo = (fmt & AFMT_STEREO) ? 1 : 0;
if (v->slave != NULL) {
v->slave->b16 = v->b16;
v->slave->stereo = v->stereo;
}
}
if (spd) {
v->speed = spd;
if (v->slave != NULL)
v->slave->speed = v->speed;
}
}
void
emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v)
{
unsigned int routing[8], amounts[8];
int i;
for (i = 0; i < 8; i++) {
routing[i] = rt->routing_left[i];
amounts[i] = rt->amounts_left[i];
}
if ((v->stereo) && (v->ismaster == 0))
for (i = 0; i < 8; i++) {
routing[i] = rt->routing_right[i];
amounts[i] = rt->amounts_right[i];
}
if (sc->is_emu10k1) {
emu_wrptr(sc, v->vnum, FXRT, ((routing[3] << 12) |
(routing[2] << 8) |
(routing[1] << 4) |
(routing[0] << 0)) << 16);
} else {
emu_wrptr(sc, v->vnum, A_FXRT1, (routing[3] << 24) |
(routing[2] << 16) |
(routing[1] << 8) |
(routing[0] << 0));
emu_wrptr(sc, v->vnum, A_FXRT2, (routing[7] << 24) |
(routing[6] << 16) |
(routing[5] << 8) |
(routing[4] << 0));
emu_wrptr(sc, v->vnum, A_SENDAMOUNTS, (amounts[7] << 24) |
(amounts[6] << 26) |
(amounts[5] << 8) |
(amounts[4] << 0));
}
emu_wrptr(sc, v->vnum, PTRX, (amounts[0] << 8) | (amounts[1] << 0));
emu_wrptr(sc, v->vnum, DSL, v->ea | (amounts[3] << 24));
emu_wrptr(sc, v->vnum, PSST, v->sa | (amounts[2] << 24));
if ((v->stereo) && (v->slave != NULL))
emu_vroute(sc, rt, v->slave);
}
void
emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v)
{
int s;
uint32_t am_2, am_3, start, val, silent_page;
s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
v->sa = v->start >> s;
v->ea = v->end >> s;
if (v->stereo) {
emu_wrptr(sc, v->vnum, CPF, CPF_STEREO_MASK);
} else {
emu_wrptr(sc, v->vnum, CPF, 0);
}
val = v->stereo ? 28 : 30;
val *= v->b16 ? 1 : 2;
start = v->sa + val;
am_3 = emu_rdptr(sc, v->vnum, DSL) & 0xff000000;
emu_wrptr(sc, v->vnum, DSL, v->ea | am_3);
am_2 = emu_rdptr(sc, v->vnum, PSST) & 0xff000000;
emu_wrptr(sc, v->vnum, PSST, v->sa | am_2);
emu_wrptr(sc, v->vnum, CCCA, start | (v->b16 ? 0 : CCCA_8BITSELECT));
emu_wrptr(sc, v->vnum, Z1, 0);
emu_wrptr(sc, v->vnum, Z2, 0);
silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | MAP_PTI_MASK;
emu_wrptr(sc, v->vnum, MAPA, silent_page);
emu_wrptr(sc, v->vnum, MAPB, silent_page);
emu_wrptr(sc, v->vnum, CVCF, CVCF_CURRENTFILTER_MASK);
emu_wrptr(sc, v->vnum, VTFT, VTFT_FILTERTARGET_MASK);
emu_wrptr(sc, v->vnum, ATKHLDM, 0);
emu_wrptr(sc, v->vnum, DCYSUSM, DCYSUSM_DECAYTIME_MASK);
emu_wrptr(sc, v->vnum, LFOVAL1, 0x8000);
emu_wrptr(sc, v->vnum, LFOVAL2, 0x8000);
emu_wrptr(sc, v->vnum, FMMOD, 0);
emu_wrptr(sc, v->vnum, TREMFRQ, 0);
emu_wrptr(sc, v->vnum, FM2FRQ2, 0);
emu_wrptr(sc, v->vnum, ENVVAL, 0x8000);
emu_wrptr(sc, v->vnum, ATKHLDV, ATKHLDV_HOLDTIME_MASK | ATKHLDV_ATTACKTIME_MASK);
emu_wrptr(sc, v->vnum, ENVVOL, 0x8000);
emu_wrptr(sc, v->vnum, PEFE_FILTERAMOUNT, 0x7f);
emu_wrptr(sc, v->vnum, PEFE_PITCHAMOUNT, 0);
if ((v->stereo) && (v->slave != NULL))
emu_vwrite(sc, v->slave);
}
static void
emu_vstop(struct emu_sc_info *sc, char channel, int enable)
{
int reg;
reg = (channel & 0x20) ? SOLEH : SOLEL;
channel &= 0x1f;
reg |= 1 << 24;
reg |= channel << 16;
emu_wrptr(sc, 0, reg, enable);
}
void
emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go)
{
uint32_t pitch_target, initial_pitch;
uint32_t cra, cs, ccis;
uint32_t sample, i;
if (go) {
cra = 64;
cs = v->stereo ? 4 : 2;
ccis = v->stereo ? 28 : 30;
ccis *= v->b16 ? 1 : 2;
sample = v->b16 ? 0x00000000 : 0x80808080;
for (i = 0; i < cs; i++)
emu_wrptr(sc, v->vnum, CD0 + i, sample);
emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, 0);
emu_wrptr(sc, v->vnum, CCR_READADDRESS, cra);
emu_wrptr(sc, v->vnum, CCR_CACHEINVALIDSIZE, ccis);
emu_wrptr(sc, v->vnum, IFATN, 0xff00);
emu_wrptr(sc, v->vnum, VTFT, 0xffffffff);
emu_wrptr(sc, v->vnum, CVCF, 0xffffffff);
emu_wrptr(sc, v->vnum, DCYSUSV, 0x00007f7f);
emu_vstop(sc, v->vnum, 0);
pitch_target = emu_rate_to_linearpitch(v->speed);
initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, pitch_target);
emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, pitch_target);
emu_wrptr(sc, v->vnum, IP, initial_pitch);
} else {
emu_wrptr(sc, v->vnum, PTRX_PITCHTARGET, 0);
emu_wrptr(sc, v->vnum, CPF_CURRENTPITCH, 0);
emu_wrptr(sc, v->vnum, IFATN, 0xffff);
emu_wrptr(sc, v->vnum, VTFT, 0x0000ffff);
emu_wrptr(sc, v->vnum, CVCF, 0x0000ffff);
emu_wrptr(sc, v->vnum, IP, 0);
emu_vstop(sc, v->vnum, 1);
}
if ((v->stereo) && (v->slave != NULL))
emu_vtrigger(sc, v->slave, go);
}
int
emu_vpos(struct emu_sc_info *sc, struct emu_voice *v)
{
int s, ptr;
s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
ptr = (emu_rdptr(sc, v->vnum, CCCA_CURRADDR) - (v->start >> s)) << s;
return (ptr & ~0x0000001f);
}
/* fx */
static void
emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data)
{
emu_wrptr(sc, 0, sc->code_base + pc, data);
}
static void
emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc)
{
if ((*pc) + 1 > sc->code_size) {
device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc));
return;
}
emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y);
emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w);
(*pc)++;
}
static int
sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS)
{
struct emu_sc_info *sc;
int mixer_id;
int new_vol;
int err;
sc = arg1;
mixer_id = arg2;
new_vol = emumix_get_volume(sc, mixer_id);
err = sysctl_handle_int(oidp, &new_vol, sizeof(new_vol), req);
if (err || req->newptr == NULL)
return (err);
if (new_vol < 0 || new_vol > 100)
return (EINVAL);
emumix_set_volume(sc, mixer_id, new_vol);
return (0);
}
static int
emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume)
{
int volgpr;
char sysctl_name[32];
volgpr = emu_rm_gpr_alloc(sc->rm, 1);
emumix_set_fxvol(sc, volgpr, defvolume);
/* Mixer controls with NULL mix_name are handled by AC97 emulation
code or PCM mixer. */
if (mix_name != NULL) {
/* Temporary sysctls should start with underscore,
* see freebsd-current mailing list, emu10kx driver
* discussion around 2006-05-24. */
snprintf(sysctl_name, 32, "_%s", mix_name);
SYSCTL_ADD_PROC(sc->ctx,
SYSCTL_CHILDREN(sc->root),
OID_AUTO, sysctl_name,
CTLTYPE_INT | CTLFLAG_RW, sc, mix_id,
sysctl_emu_mixer_control, "I","");
}
return (volgpr);
}
/* allocate cache GPRs that will hold mixed output channels
* and clear it on every DSP run.
*/
#define EFX_CACHE(CACHE_IDX) do { \
sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \
emu_addefxop(sc, ACC3, \
GPR(sc->cache_gpr[CACHE_IDX]), \
DSP_CONST(0), \
DSP_CONST(0), \
DSP_CONST(0), \
&pc); \
} while (0)
/* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */
#define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \
sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \
sc->mixer_volcache[IN_GPR_IDX] = DEF; \
emu_addefxop(sc, MACS, \
GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
INP_NR, \
GPR(sc->mixer_gpr[IN_GPR_IDX]), \
&pc); \
} while (0)
/* allocate GPR, OUT = IN * VOL */
#define EFX_OUTPUT(TITLE,OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \
sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \
sc->mixer_volcache[OUT_GPR_IDX] = DEF; \
emu_addefxop(sc, MACS, \
OUTP(OUTP_NR), \
DSP_CONST(0), \
GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
&pc); \
} while (0)
/* like EFX_OUTPUT, but don't allocate mixer gpr */
#define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do{ \
emu_addefxop(sc, MACS, \
OUTP(OUTP_NR), \
DSP_CONST(0), \
GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
&pc); \
} while(0)
/* mute, if FLAG != 0 */
/* XXX */
#define EFX_MUTEIF(GPR_IDX, FLAG) do { \
} while(0)
/* allocate dummy GPR. It's content will be used somewhere */
#define EFX_DUMMY(DUMMY_IDX, DUMMY_VALUE) do { \
sc->dummy_gpr[DUMMY_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \
emumix_set_gpr(sc, sc->dummy_gpr[DUMMY_IDX], DUMMY_VALUE); \
emu_addefxop(sc, ACC3, \
FX2(DUMMY_IDX), \
GPR(sc->dummy_gpr[DUMMY_IDX]), \
DSP_CONST(0), \
DSP_CONST(0), \
&pc); \
} while (0)
static void
emu_initefx(struct emu_sc_info *sc)
{
unsigned int i;
uint32_t pc;
/* stop DSP */
if (sc->is_emu10k1) {
emu_wrptr(sc, 0, DBG, EMU10K1_DBG_SINGLE_STEP);
} else {
emu_wrptr(sc, 0, A_DBG, A_DBG_SINGLE_STEP);
}
/* code size is in instructions */
pc = 0;
for (i = 0; i < sc->code_size; i++) {
if (sc->is_emu10k1) {
emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc);
} else {
emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc);
}
}
pc = 0;
/*
* DSP code below is not good, because:
* 1. It can be written smaller, if it can use DSP accumulator register
* instead of cache_gpr[].
* 2. It can be more careful when volume is 100%, because in DSP
* x*0x7fffffff may not be equal to x !
*/
/* clean outputs */
for (i = 0; i < 16 ; i++) {
emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc);
}
if (sc->is_emu10k1) {
EFX_CACHE(C_FRONT_L);
EFX_CACHE(C_FRONT_R);
EFX_CACHE(C_REC_L);
EFX_CACHE(C_REC_R);
/* fx0 to front/record, 100%/muted by default */
EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
EFX_ROUTE("pcm_rec_l", FX(0), M_FX0_REC_L, C_REC_L, 0);
EFX_ROUTE("pcm_rec_r", FX(1), M_FX1_REC_R, C_REC_R, 0);
/* in0, from AC97 codec output */
EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
/* in1, from CD S/PDIF */
EFX_ROUTE("cdspdif_front_l", INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
EFX_MUTEIF(M_IN1_FRONT_L, CDSPDIFMUTE);
EFX_ROUTE("cdspdif_front_r", INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
EFX_MUTEIF(M_IN1_FRONT_R, CDSPDIFMUTE);
EFX_ROUTE("cdspdif_rec_l", INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
EFX_MUTEIF(M_IN1_REC_L, CDSPDIFMUTE);
EFX_ROUTE("cdspdif_rec_r", INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
EFX_MUTEIF(M_IN1_REC_L, CDSPDIFMUTE);
#ifdef SND_EMU10KX_DEBUG_OUTPUTS
/* in2, ZoomVide (???) */
EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0);
EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0);
#endif
#ifdef SND_EMU10KX_DEBUG_OUTPUTS
/* in3, TOSLink (???) */
EFX_ROUTE("toslink_front_l", INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("toslink_front_r", INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("toslink_rec_l", INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0);
EFX_ROUTE("toslink_rec_r", INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0);
#endif
/* in4, LineIn */
EFX_ROUTE("linein_front_l", INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("linein_front_r", INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("linein_rec_l", INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0);
EFX_ROUTE("linein_rec_r", INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0);
/* in5, on-card S/PDIF */
EFX_ROUTE("spdif_front_l", INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("spdif_front_r", INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("spdif_rec_l", INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
EFX_ROUTE("spdif_rec_r", INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
/* in6, Line2 on Live!Drive */
EFX_ROUTE("line2_front_l", INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("line2_front_r", INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("line2_rec_l", INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0);
EFX_ROUTE("line2_rec_r", INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0);
#ifdef SND_EMU10KX_DEBUG_OUTPUTS
/* in7, unknown */
EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
#endif
/* front output to hedaphones and both analog and digital */
EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100);
EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100);
EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L);
EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R);
/* rec output to "ADC" */
EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100);
EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100);
#ifdef SND_EMU10KX_MULTICHANNEL
/*
* Additional channel volume is controlled by mixer in
* emu_dspmixer_set() in -pcm.c
*/
/* fx2/3 (pcm1) to rear */
EFX_CACHE(C_REAR_L);
EFX_CACHE(C_REAR_R);
EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100);
EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100);
if (sc->has_51) {
/* fx4 (pcm2) to center */
EFX_CACHE(C_CENTER);
EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
#if 0
/* XXX in digital mode (default) this should be muted because
this output is shared with digital out */
EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
#endif
/* fx5 (pcm3) to sub */
EFX_CACHE(C_SUB);
EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
#if 0
/* XXX in digital mode (default) this should be muted because
this output is shared with digital out */
EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
#endif
}
#ifdef SND_EMU10KX_MCH_RECORDING
/* MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots are used
as outputs and already filled with data */
for(i = (sc->has_51 ? 4 : 0); i < 16; i++) {
/* XXX fill with dummy data */
EFX_DUMMY(i,i*0x10000);
emu_addefxop(sc, ACC3,
FX2(i),
DSP_CONST(0),
DSP_CONST(0),
GPR(sc->dummy_gpr[i]),
&pc);
}
#endif
#else /* !SND_EMU10KX_MULTICHANNEL */
EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_REAR_L);
EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_REAR_R);
#endif
} else /* emu10k2 and later */ {
EFX_CACHE(C_FRONT_L);
EFX_CACHE(C_FRONT_R);
EFX_CACHE(C_REC_L);
EFX_CACHE(C_REC_R);
/* fx0 to front/record, 100%/muted by default */
/*
* FRONT_[L|R] is controlled by AC97 emulation in
* emu_ac97_[read|write]_emulation in -pcm.c
*/
EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
EFX_ROUTE("pcm_rec_l", FX(0), M_FX0_REC_L, C_REC_L, 0);
EFX_ROUTE("pcm_rec_r", FX(1), M_FX1_REC_R, C_REC_R, 0);
/* in0, from AC97 codec output */
EFX_ROUTE("ac97_front_l", INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100);
EFX_ROUTE("ac97_front_r", INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100);
EFX_ROUTE("ac97_rec_l", INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
EFX_ROUTE("ac97_rec_r", INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
/* in1, from CD S/PDIF */
EFX_ROUTE("cdspdif_front_l", INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("cdspdif_front_r", INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("cdspdif_rec_l", INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
EFX_ROUTE("cdspdif_rec_r", INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
/* in2, optical & coax S/PDIF on AudigyDrive*/
/* XXX Should be muted when GPRSCS valid stream == 0 */
EFX_ROUTE("ospdif_front_l", INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("ospdif_front_r", INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("ospdif_rec_l", INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0);
EFX_ROUTE("ospdif_rec_r", INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0);
#ifdef SND_EMU10KX_DEBUG_OUTPUTS
/* in3, unknown */
EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0);
EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0);
#endif
/* in4, LineIn 2 on AudigyDrive */
EFX_ROUTE("linein2_front_l", INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("linein2_front_r", INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("linein2_rec_l", INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0);
EFX_ROUTE("linein2_rec_r", INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0);
/* in5, on-card S/PDIF */
EFX_ROUTE("spdif_front_l", INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("spdif_front_r", INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("spdif_rec_l", INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
EFX_ROUTE("spdif_rec_r", INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
/* in6, AUX2 on AudigyDrive */
EFX_ROUTE("aux2_front_l", INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("aux2_front_r", INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("aux2_rec_l", INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0);
EFX_ROUTE("aux2_rec_r", INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0);
#ifdef SND_EMU10KX_DEBUG_OUTPUTS
/* in7, unknown */
EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
#endif
/* front output to headphones and alog and digital *front */
/* volume controlled by AC97 emulation */
EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100);
EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100);
EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L);
EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R);
EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L);
EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R);
/* rec output to "ADC" */
/* volume controlled by AC97 emulation */
EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100);
EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100);
#ifdef SND_EMU10KX_MULTICHANNEL
/*
* Additional channel volume is controlled by mixer in
* emu_dspmixer_set() in -pcm.c
*/
/* fx2/3 (pcm1) to rear */
EFX_CACHE(C_REAR_L);
EFX_CACHE(C_REAR_R);
EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100);
EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100);
EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L);
EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R);
/* fx4 (pcm2) to center */
EFX_CACHE(C_CENTER);
EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
#if 0
/* XXX in digital mode (default) this should be muted because
this output is shared with digital out */
EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
#endif
/* fx5 (pcm3) to sub */
EFX_CACHE(C_SUB);
EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
#if 0
/* XXX in digital mode (default) this should be muted because
this output is shared with digital out */
EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
#endif
if (sc->has_71) {
/* XXX this will broke headphones on AudigyDrive */
/* fx6/7 (pcm4) to side */
EFX_CACHE(C_SIDE_L);
EFX_CACHE(C_SIDE_R);
EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100);
EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100);
EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100);
EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100);
EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L);
EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R);
}
#ifdef SND_EMU10KX_MCH_RECORDING
/* MCH RECORDING, high 32 slots */
for(i = 0; i < 32; i++) {
/* XXX fill with dummy data */
EFX_DUMMY(i,i*0x10000);
emu_addefxop(sc, ACC3,
FX2(i),
DSP_CONST(0),
DSP_CONST(0),
GPR(sc->dummy_gpr[i]),
&pc);
}
#endif
#else /* !SND_EMU10KX_MULTICHANNEL */
EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L);
EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R);
EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L);
EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R);
#endif
}
sc->routing_code_end = pc;
/* start DSP */
if (sc->is_emu10k1) {
emu_wrptr(sc, 0, DBG, 0);
} else {
emu_wrptr(sc, 0, A_DBG, 0);
}
}
/* /dev/em10kx */
static d_open_t emu10kx_open;
static d_close_t emu10kx_close;
static d_read_t emu10kx_read;
static struct cdevsw emu10kx_cdevsw = {
.d_open = emu10kx_open,
.d_close = emu10kx_close,
.d_read = emu10kx_read,
.d_name = "emu10kx",
.d_version = D_VERSION,
};
static int
emu10kx_open(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
{
int error;
struct emu_sc_info *sc;
sc = i_dev->si_drv1;
mtx_lock(&sc->emu10kx_lock);
if (sc->emu10kx_isopen) {
mtx_unlock(&sc->emu10kx_lock);
return (EBUSY);
}
sc->emu10kx_isopen = 1;
mtx_unlock(&sc->emu10kx_lock);
if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) {
error = ENXIO;
goto out;
}
sc->emu10kx_bufptr = 0;
error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM;
out:
if (error) {
mtx_lock(&sc->emu10kx_lock);
sc->emu10kx_isopen = 0;
mtx_unlock(&sc->emu10kx_lock);
}
return (error);
}
static int
emu10kx_close(struct cdev *i_dev, int flags __unused, int mode __unused, struct thread *td __unused)
{
struct emu_sc_info *sc;
sc = i_dev->si_drv1;
mtx_lock(&sc->emu10kx_lock);
if (!(sc->emu10kx_isopen)) {
mtx_unlock(&sc->emu10kx_lock);
return (EBADF);
}
sbuf_delete(&sc->emu10kx_sbuf);
sc->emu10kx_isopen = 0;
mtx_unlock(&sc->emu10kx_lock);
return (0);
}
static int
emu10kx_read(struct cdev *i_dev, struct uio *buf, int flag __unused)
{
int l, err;
struct emu_sc_info *sc;
sc = i_dev->si_drv1;
mtx_lock(&sc->emu10kx_lock);
if (!(sc->emu10kx_isopen)) {
mtx_unlock(&sc->emu10kx_lock);
return (EBADF);
}
mtx_unlock(&sc->emu10kx_lock);
l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr);
err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0;
sc->emu10kx_bufptr += l;
return (err);
}
static int
emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s)
{
int i;
sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n");
sbuf_printf(s, "\nHardware resource usage:\n");
sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs);
sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size);
sbuf_printf(s, "Card supports");
if (sc->has_ac97) {
sbuf_printf(s, " AC97 codec");
} else {
sbuf_printf(s, " NO AC97 codec");
}
if (sc->has_51) {
if (sc->has_71)
sbuf_printf(s, " and 7.1 output");
else
sbuf_printf(s, " and 5.1 output");
}
if (sc->is_emu10k1)
sbuf_printf(s, ", SBLive! DSP code");
if (sc->is_emu10k2)
sbuf_printf(s, ", Audigy DSP code");
if (sc->is_ca0102)
sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks");
if (sc->is_ca0108)
sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks");
sbuf_printf(s, "\n");
if (sc->broken_digital)
sbuf_printf(s, "Digital mode unsupported\n");
sbuf_printf(s, "\nInstalled devices:\n");
for (i = 0; i < RT_COUNT; i++)
if (sc->pcm[i] != NULL)
if (device_is_attached(sc->pcm[i])) {
sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i]));
}
if (sc->midi[0] != NULL)
if (device_is_attached(sc->midi[0])) {
sbuf_printf(s, "EMU10Kx MIDI Interface\n");
sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0]));
}
if (sc->midi[1] != NULL)
if (device_is_attached(sc->midi[1])) {
sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1]));
}
if (sc->midi[0] != NULL)
if (device_is_attached(sc->midi[0])) {
sbuf_printf(s, "\tIR reciever MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled");
}
sbuf_finish(s);
return (sbuf_len(s));
}
/* INIT & UNINIT */
static int
emu10kx_dev_init(struct emu_sc_info *sc)
{
int unit;
mtx_init(&sc->emu10kx_lock, "kxdevlock", NULL, 0);
unit = device_get_unit(sc->dev);
sc->cdev = make_dev(&emu10kx_cdevsw, unit2minor(unit), UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit);
if (sc->cdev != NULL) {
sc->cdev->si_drv1 = sc;
return (0);
}
return (ENXIO);
}
static int
emu10kx_dev_uninit(struct emu_sc_info *sc)
{
intrmask_t s;
s = spltty();
mtx_lock(&sc->emu10kx_lock);
if (sc->emu10kx_isopen) {
mtx_unlock(&sc->emu10kx_lock);
splx(s);
return (EBUSY);
}
if (sc->cdev)
destroy_dev(sc->cdev);
sc->cdev = 0;
splx(s);
mtx_destroy(&sc->emu10kx_lock);
return (0);
}
/* resource manager */
int
emu_rm_init(struct emu_sc_info *sc)
{
int i;
int maxcount;
struct emu_rm *rm;
rm = malloc(sizeof(struct emu_rm), M_DEVBUF, M_NOWAIT | M_ZERO);
if (rm == NULL) {
return (ENOMEM);
}
sc->rm = rm;
rm->card = sc;
maxcount = sc->num_gprs;
rm->num_used = 0;
mtx_init(&(rm->gpr_lock), "emu10k", "gpr alloc", MTX_DEF);
rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR);
for (i = 0; i < rm->num_gprs; i++)
rm->allocmap[i] = 0;
rm->last_free_gpr = 0;
return (0);
}
int
emu_rm_uninit(struct emu_sc_info *sc)
{
#ifdef SND_EMU10KX_DEBUG
int i;
mtx_lock(&(sc->rm->gpr_lock));
for (i = 0; i < sc->rm->last_free_gpr; i++)
if (sc->rm->allocmap[i] > 0)
device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i);
mtx_unlock(&(sc->rm->gpr_lock));
#endif
mtx_destroy(&(sc->rm->gpr_lock));
free(sc->rm, M_DEVBUF);
return (0);
}
static int
emu_rm_gpr_alloc(struct emu_rm *rm, int count)
{
int i, j;
int allocated_gpr;
allocated_gpr = rm->num_gprs;
/* try fast way first */
mtx_lock(&(rm->gpr_lock));
if (rm->last_free_gpr + count <= rm->num_gprs) {
allocated_gpr = rm->last_free_gpr;
rm->last_free_gpr += count;
rm->allocmap[allocated_gpr] = count;
for (i = 1; i < count; i++)
rm->allocmap[allocated_gpr + i] = -(count - i);
} else {
/* longer */
i = 0;
allocated_gpr = rm->num_gprs;
while (i < rm->last_free_gpr - count) {
if (rm->allocmap[i] > 0) {
i += rm->allocmap[i];
} else {
allocated_gpr = i;
for (j = 1; j < count; j++) {
if (rm->allocmap[i + j] != 0)
allocated_gpr = rm->num_gprs;
}
if (allocated_gpr == i)
break;
}
}
if (allocated_gpr + count < rm->last_free_gpr) {
rm->allocmap[allocated_gpr] = count;
for (i = 1; i < count; i++)
rm->allocmap[allocated_gpr + i] = -(count - i);
}
}
if (allocated_gpr == rm->num_gprs)
allocated_gpr = (-1);
if (allocated_gpr >= 0)
rm->num_used += count;
mtx_unlock(&(rm->gpr_lock));
return (allocated_gpr);
}
/* mixer */
void
emumix_set_mode(struct emu_sc_info *sc, int mode)
{
uint32_t a_iocfg;
uint32_t hcfg;
uint32_t tmp;
switch (mode) {
case MODE_DIGITAL:
/* FALLTHROUGH */
case MODE_ANALOG:
break;
default:
return;
}
hcfg = HCFG_AUDIOENABLE | HCFG_AUTOMUTE;
a_iocfg = 0;
if (sc->rev >= 6)
hcfg |= HCFG_JOYENABLE;
if (sc->is_emu10k1)
hcfg |= HCFG_LOCKTANKCACHE_MASK;
else
hcfg |= HCFG_CODECFORMAT_I2S | HCFG_JOYENABLE;
if (mode == MODE_DIGITAL) {
if (sc->broken_digital) {
device_printf(sc->dev, "Digital mode is reported as broken on this card,\n");
}
a_iocfg |= A_IOCFG_ENABLE_DIGITAL;
hcfg |= HCFG_GPOUT0;
}
if (mode == MODE_ANALOG)
emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
if (sc->is_emu10k2)
a_iocfg |= 0x80; /* XXX */
if ((sc->is_ca0102) || (sc->is_ca0108))
a_iocfg |= A_IOCFG_DISABLE_ANALOG; /* means "don't disable"
on this two cards. Means "disable" on emu10k2. */
if (sc->is_ca0108)
a_iocfg |= 0x20; /* XXX */
emu_wr(sc, HCFG, hcfg, 4);
if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
tmp = emu_rd(sc, A_IOCFG, 2);
tmp = a_iocfg;
emu_wr(sc, A_IOCFG, tmp, 2);
}
/*
* XXX Mute center/sub if we go digital on Audigy or later card.
* Route to analog center / sub in emu_initef should be disabled
* until this problem is fixed.
*/
}
void
emumix_set_spdif_mode(struct emu_sc_info *sc, int mode)
{
uint32_t spcs;
switch (mode) {
case SPDIF_MODE_PCM:
break;
case SPDIF_MODE_AC3:
device_printf(sc->dev, "AC3 mode does not work and disabled\n");
return;
default:
return;
}
spcs = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
mode = SPDIF_MODE_PCM;
emu_wrptr(sc, 0, SPCS0, spcs);
emu_wrptr(sc, 0, SPCS1, spcs);
emu_wrptr(sc, 0, SPCS2, spcs);
}
#define L2L_POINTS 10
static int l2l_df[L2L_POINTS] = {
0x572C5CA, /* 100..90 */
0x3211625, /* 90..80 */
0x1CC1A76, /* 80..70 */
0x108428F, /* 70..60 */
0x097C70A, /* 60..50 */
0x0572C5C, /* 50..40 */
0x0321162, /* 40..30 */
0x01CC1A7, /* 30..20 */
0x0108428, /* 20..10 */
0x016493D /* 10..0 */
};
static int l2l_f[L2L_POINTS] = {
0x4984461A, /* 90 */
0x2A3968A7, /* 80 */
0x18406003, /* 70 */
0x0DEDC66D, /* 60 */
0x07FFFFFF, /* 50 */
0x04984461, /* 40 */
0x02A3968A, /* 30 */
0x01840600, /* 20 */
0x00DEDC66, /* 10 */
0x00000000 /* 0 */
};
static int
log2lin(int log_t)
{
int lin_t;
int idx, lin;
if (log_t <= 0) {
lin_t = 0x00000000;
return (lin_t);
}
if (log_t >= 100) {
lin_t = 0x7fffffff;
return (lin_t);
}
idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS);
lin = log_t % (L2L_POINTS);
lin_t = l2l_df[idx] * lin + l2l_f[idx];
return (lin_t);
}
void
emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol)
{
vol = log2lin(vol);
emumix_set_gpr(sc, gpr, vol);
}
void
emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
{
emu_wrptr(sc, 0, GPR(gpr), val);
}
void
emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume)
{
RANGE(volume, 0, 100);
if (mixer_idx < NUM_MIXERS) {
sc->mixer_volcache[mixer_idx] = volume;
emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume);
}
}
int
emumix_get_volume(struct emu_sc_info *sc, int mixer_idx)
{
if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0))
return (sc->mixer_volcache[mixer_idx]);
return (-1);
}
/* Init CardBus part */
static int
emu_cardbus_init(struct emu_sc_info *sc)
{
/*
* XXX May not need this if we have IPR3 handler.
* Is it a real init calls, or IPR3 interrupt acknowledgments?
* Looks much like "(data << 16) | register".
*/
emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001);
emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f);
emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f);
emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f);
return (0);
}
/* Probe and attach the card */
static int
emu_init(struct emu_sc_info *sc)
{
uint32_t ch, tmp;
uint32_t spdif_sr;
uint32_t ac97slot;
int def_mode;
int i;
/* disable audio and lock cache */
emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
/* reset recording buffers */
emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
emu_wrptr(sc, 0, MICBA, 0);
emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
emu_wrptr(sc, 0, FXBA, 0);
emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
emu_wrptr(sc, 0, ADCBA, 0);
/* disable channel interrupt */
emu_wr(sc, INTE, INTE_INTERVALTIMERENB | INTE_SAMPLERATETRACKER | INTE_PCIERRORENABLE, 4);
emu_wrptr(sc, 0, CLIEL, 0);
emu_wrptr(sc, 0, CLIEH, 0);
emu_wrptr(sc, 0, SOLEL, 0);
emu_wrptr(sc, 0, SOLEH, 0);
/* disable P16V and S/PDIF interrupts */
if ((sc->is_ca0102) || (sc->is_ca0108))
emu_wr(sc, INTE2, 0, 4);
if (sc->is_ca0102)
emu_wr(sc, INTE3, 0, 4);
/* init phys inputs and outputs */
ac97slot = 0;
if (sc->has_51)
ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE;
if (sc->has_71)
ac97slot = AC97SLOT_CNTR | AC97SLOT_LFE | AC97SLOT_REAR_LEFT | AC97SLOT_REAR_RIGHT;
if (sc->is_emu10k2)
ac97slot |= 0x40;
emu_wrptr(sc, 0, AC97SLOT, ac97slot);
if (sc->is_emu10k2) /* XXX for later cards? */
emu_wrptr(sc, 0, SPBYPASS, 0xf00); /* What will happen if
* we write 1 here? */
if (bus_dma_tag_create( /* parent */ NULL, /* alignment */ 2, /* boundary */ 0,
/* lowaddr */ 1 << 31, /* can only access 0-2gb */
/* highaddr */ BUS_SPACE_MAXADDR,
/* filter */ NULL, /* filterarg */ NULL,
/* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff,
/* flags */ 0, /* lockfunc */ busdma_lock_mutex,
/* lockarg */ &Giant, &(sc->mem.dmat)) != 0) {
device_printf(sc->dev, "unable to create dma tag\n");
bus_dma_tag_destroy(sc->mem.dmat);
return (ENOMEM);
}
SLIST_INIT(&sc->mem.blocks);
sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr);
if (sc->mem.ptb_pages == NULL)
return (ENOMEM);
sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr);
if (sc->mem.silent_page == NULL) {
emu_free(&sc->mem, sc->mem.ptb_pages);
return (ENOMEM);
}
/* Clear page with silence & setup all pointers to this page */
bzero(sc->mem.silent_page, EMUPAGESIZE);
tmp = (uint32_t) (sc->mem.silent_page_addr) << 1;
for (i = 0; i < EMU_MAXPAGES; i++)
sc->mem.ptb_pages[i] = tmp | i;
for (ch = 0; ch < NUM_G; ch++) {
emu_wrptr(sc, ch, MAPA, tmp | MAP_PTI_MASK);
emu_wrptr(sc, ch, MAPB, tmp | MAP_PTI_MASK);
}
emu_wrptr(sc, 0, PTB, (sc->mem.ptb_pages_addr));
emu_wrptr(sc, 0, TCB, 0); /* taken from original driver */
emu_wrptr(sc, 0, TCBS, 0); /* taken from original driver */
/* init envelope engine */
for (ch = 0; ch < NUM_G; ch++) {
emu_wrptr(sc, ch, DCYSUSV, 0);
emu_wrptr(sc, ch, IP, 0);
emu_wrptr(sc, ch, VTFT, 0xffff);
emu_wrptr(sc, ch, CVCF, 0xffff);
emu_wrptr(sc, ch, PTRX, 0);
emu_wrptr(sc, ch, CPF, 0);
emu_wrptr(sc, ch, CCR, 0);
emu_wrptr(sc, ch, PSST, 0);
emu_wrptr(sc, ch, DSL, 0x10);
emu_wrptr(sc, ch, CCCA, 0);
emu_wrptr(sc, ch, Z1, 0);
emu_wrptr(sc, ch, Z2, 0);
emu_wrptr(sc, ch, FXRT, 0xd01c0000);
emu_wrptr(sc, ch, ATKHLDM, 0);
emu_wrptr(sc, ch, DCYSUSM, 0);
emu_wrptr(sc, ch, IFATN, 0xffff);
emu_wrptr(sc, ch, PEFE, 0);
emu_wrptr(sc, ch, FMMOD, 0);
emu_wrptr(sc, ch, TREMFRQ, 24); /* 1 Hz */
emu_wrptr(sc, ch, FM2FRQ2, 24); /* 1 Hz */
emu_wrptr(sc, ch, TEMPENV, 0);
/*** these are last so OFF prevents writing ***/
emu_wrptr(sc, ch, LFOVAL2, 0);
emu_wrptr(sc, ch, LFOVAL1, 0);
emu_wrptr(sc, ch, ATKHLDV, 0);
emu_wrptr(sc, ch, ENVVOL, 0);
emu_wrptr(sc, ch, ENVVAL, 0);
if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
emu_wrptr(sc, ch, 0x4c, 0x0);
emu_wrptr(sc, ch, 0x4d, 0x0);
emu_wrptr(sc, ch, 0x4e, 0x0);
emu_wrptr(sc, ch, 0x4f, 0x0);
emu_wrptr(sc, ch, A_FXRT1, 0x3f3f3f3f);
emu_wrptr(sc, ch, A_FXRT2, 0x3f3f3f3f);
emu_wrptr(sc, ch, A_SENDAMOUNTS, 0x0);
}
}
emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, A_SPDIF_48000);
/*
* CAxxxx cards needs additional setup:
* 1. Set I2S capture sample rate to 96000
* 2. Disable P16v / P17v proceesing
* 3. Allow EMU10K DSP inputs
*/
if ((sc->is_ca0102) || (sc->is_ca0108)) {
spdif_sr = emu_rdptr(sc, 0, A_SPDIF_SAMPLERATE);
spdif_sr &= 0xfffff1ff;
spdif_sr |= A_I2S_CAPTURE_96000;
emu_wrptr(sc, 0, A_SPDIF_SAMPLERATE, spdif_sr);
/* Disable P16v processing */
emu_wr_p16vptr(sc, 0, SRCSel, 0x14);
/* Setup P16v/P17v sound routing */
if (sc->is_ca0102)
emu_wr_p16vptr(sc, 0, SRCMULTI_ENABLE, 0xFF00FF00);
else {
emu_wr_p16vptr(sc, 0, P17V_MIXER_I2S_ENABLE, 0xFF000000);
emu_wr_p16vptr(sc, 0, P17V_MIXER_SPDIF_ENABLE, 0xFF000000);
tmp = emu_rd(sc, A_IOCFG, 2);
emu_wr(sc, A_IOCFG, tmp & ~0x8, 2);
}
}
emu_initefx(sc);
def_mode = MODE_ANALOG;
if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
def_mode = MODE_DIGITAL;
if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) {
device_printf(sc->dev, "Audigy card initialized in analog mode.\n");
def_mode = MODE_ANALOG;
}
emumix_set_mode(sc, def_mode);
if (bootverbose) {
tmp = emu_rd(sc, HCFG, 4);
device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp);
device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n",
(tmp & 0x80000000 ? "[Legacy MPIC] " : ""),
(tmp & 0x40000000 ? "[0x40] " : ""),
(tmp & 0x20000000 ? "[0x20] " : ""),
(tmp & 0x10000000 ? "[0x10] " : ""),
(tmp & 0x08000000 ? "[0x08] " : ""),
(tmp & 0x04000000 ? "[0x04] " : ""),
(tmp & 0x02000000 ? "[0x02] " : ""),
(tmp & 0x01000000 ? "[0x01]" : " "));
device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n",
(tmp & 0x00800000 ? "[0x80] " : ""),
(tmp & 0x00400000 ? "[0x40] " : ""),
(tmp & 0x00200000 ? "[Legacy INT] " : ""),
(tmp & 0x00100000 ? "[0x10] " : ""),
(tmp & 0x00080000 ? "[0x08] " : ""),
(tmp & 0x00040000 ? "[Codec4] " : ""),
(tmp & 0x00020000 ? "[Codec2] " : ""),
(tmp & 0x00010000 ? "[I2S Codec]" : " "));
device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n",
(tmp & 0x00008000 ? "[0x80] " : ""),
(tmp & 0x00004000 ? "[GPINPUT0] " : ""),
(tmp & 0x00002000 ? "[GPINPUT1] " : ""),
(tmp & 0x00001000 ? "[GPOUT0] " : ""),
(tmp & 0x00000800 ? "[GPOUT1] " : ""),
(tmp & 0x00000400 ? "[GPOUT2] " : ""),
(tmp & 0x00000200 ? "[Joystick] " : ""),
(tmp & 0x00000100 ? "[0x01]" : " "));
device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n",
(tmp & 0x00000080 ? "[0x80] " : ""),
(tmp & 0x00000040 ? "[0x40] " : ""),
(tmp & 0x00000020 ? "[0x20] " : ""),
(tmp & 0x00000010 ? "[AUTOMUTE] " : ""),
(tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""),
(tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""),
(tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""),
(tmp & 0x00000001 ? "[AUDIOENABLE]" : " "));
if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
tmp = emu_rd(sc, A_IOCFG, 2);
device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp);
device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )");
printf(" : %s%s%s%s%s%s%s%s\n",
(tmp & 0x8000 ? "[Rear Speakers] " : ""),
(tmp & 0x4000 ? "[Front Speakers] " : ""),
(tmp & 0x2000 ? "[0x20] " : ""),
(tmp & 0x1000 ? "[0x10] " : ""),
(tmp & 0x0800 ? "[0x08] " : ""),
(tmp & 0x0400 ? "[0x04] " : ""),
(tmp & 0x0200 ? "[0x02] " : ""),
(tmp & 0x0100 ? "[AudigyDrive Phones]" : " "));
device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )");
printf(" : %s%s%s%s%s%s%s%s\n",
(tmp & 0x0080 ? "[0x80] " : ""),
(tmp & 0x0040 ? "[Mute AnalogOut] " : ""),
(tmp & 0x0020 ? "[0x20] " : ""),
(tmp & 0x0010 ? "[0x10] " : ""),
(tmp & 0x0008 ? "[0x08] " : ""),
(tmp & 0x0004 ? "[GPOUT0] " : ""),
(tmp & 0x0002 ? "[GPOUT1] " : ""),
(tmp & 0x0001 ? "[GPOUT2]" : " "));
} /* is_emu10k2 or ca* */
} /* bootverbose */
return (0);
}
static int
emu_uninit(struct emu_sc_info *sc)
{
uint32_t ch;
struct emu_memblk *blk;
emu_wr(sc, INTE, 0, 4);
for (ch = 0; ch < NUM_G; ch++)
emu_wrptr(sc, ch, DCYSUSV, 0);
for (ch = 0; ch < NUM_G; ch++) {
emu_wrptr(sc, ch, VTFT, 0);
emu_wrptr(sc, ch, CVCF, 0);
emu_wrptr(sc, ch, PTRX, 0);
emu_wrptr(sc, ch, CPF, 0);
}
/* disable audio and lock cache */
emu_wr(sc, HCFG, HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 4);
emu_wrptr(sc, 0, PTB, 0);
/* reset recording buffers */
emu_wrptr(sc, 0, MICBS, ADCBS_BUFSIZE_NONE);
emu_wrptr(sc, 0, MICBA, 0);
emu_wrptr(sc, 0, FXBS, ADCBS_BUFSIZE_NONE);
emu_wrptr(sc, 0, FXBA, 0);
emu_wrptr(sc, 0, FXWC, 0);
emu_wrptr(sc, 0, ADCBS, ADCBS_BUFSIZE_NONE);
emu_wrptr(sc, 0, ADCBA, 0);
emu_wrptr(sc, 0, TCB, 0);
emu_wrptr(sc, 0, TCBS, 0);
/* disable channel interrupt */
emu_wrptr(sc, 0, CLIEL, 0);
emu_wrptr(sc, 0, CLIEH, 0);
emu_wrptr(sc, 0, SOLEL, 0);
emu_wrptr(sc, 0, SOLEH, 0);
if (sc->mem.dmat)
bus_dma_tag_destroy(sc->mem.dmat);
if (!SLIST_EMPTY(&sc->mem.blocks))
device_printf(sc->dev, "warning: memblock list not empty\n");
SLIST_FOREACH(blk, &sc->mem.blocks, link)
if (blk != NULL)
device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner);
emu_free(&sc->mem, sc->mem.ptb_pages);
emu_free(&sc->mem, sc->mem.silent_page);
return (0);
}
static int
emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result)
{
struct sndcard_func *func = device_get_ivars(dev);
struct emu_sc_info *sc = device_get_softc(bus);
switch (ivar_index) {
case EMU_VAR_FUNC:
*result = func->func;
break;
case EMU_VAR_ROUTE:
*result = ((struct emu_pcminfo *)func->varinfo)->route;
break;
case EMU_VAR_ISEMU10K1:
*result = sc->is_emu10k1;
break;
default:
return (ENOENT);
}
return (0);
}
static int
emu_write_ivar(device_t bus __unused, device_t dev __unused,
int ivar_index, uintptr_t value __unused)
{
switch (ivar_index) {
case 0:
return (EINVAL);
default:
return (ENOENT);
}
}
static int
emu_pci_probe(device_t dev)
{
struct sbuf *s;
unsigned int thiscard = 0;
uint16_t vendor;
vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2);
if (vendor != 0x1102)
return (ENXIO); /* Not Creative */
thiscard = emu_getcard(dev);
if (thiscard == 0)
return (ENXIO);
s = sbuf_new(NULL, NULL, 4096, 0);
if (s == NULL)
return (ENOMEM);
sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode);
sbuf_finish(s);
device_set_desc_copy(dev, sbuf_data(s));
return (BUS_PROBE_DEFAULT);
}
static int
emu_pci_attach(device_t dev)
{
struct sndcard_func *func;
struct emu_sc_info *sc;
struct emu_pcminfo *pcminfo;
struct emu_midiinfo *midiinfo[3];
uint32_t data;
int i;
int device_flags;
char status[255];
int error = ENXIO;
sc = device_get_softc(dev);
/* Fill in the softc. */
mtx_init(&sc->lock, "emu10kx", "bridge conf", MTX_DEF);
mtx_init(&sc->rw, "emu10kx", "atomic op", MTX_DEF);
sc->dev = dev;
sc->type = pci_get_devid(dev);
sc->rev = pci_get_revid(dev);
sc->enable_ir = 0;
sc->enable_debug = 0;
sc->has_ac97 = 0;
sc->has_51 = 0;
sc->has_71 = 0;
sc->broken_digital = 0;
sc->is_emu10k1 = 0;
sc->is_emu10k2 = 0;
sc->is_ca0102 = 0;
sc->is_ca0108 = 0;
sc->is_cardbus = 0;
device_flags = emu_cards[emu_getcard(dev)].flags;
if (device_flags & HAS_51)
sc->has_51 = 1;
if (device_flags & HAS_71) {
sc->has_51 = 1;
sc->has_71 = 1;
}
if (device_flags & IS_EMU10K1)
sc->is_emu10k1 = 1;
if (device_flags & IS_EMU10K2)
sc->is_emu10k2 = 1;
if (device_flags & IS_CA0102)
sc->is_ca0102 = 1;
if (device_flags & IS_CA0108)
sc->is_ca0108 = 1;
if ((sc->is_emu10k2) && (sc->rev == 4)) {
sc->is_emu10k2 = 0;
sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */
}
if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1))
if (device_flags & IS_CARDBUS)
sc->is_cardbus = 1;
if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) {
device_printf(sc->dev, "Unable to detect HW chipset\n");
goto bad;
}
if (device_flags & BROKEN_DIGITAL)
sc->broken_digital = 1;
if (device_flags & HAS_AC97)
sc->has_ac97 = 1;
sc->opcode_shift = 0;
if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
sc->opcode_shift = 24;
sc->high_operand_shift = 12;
/* DSP map */
/* sc->fx_base = 0x0 */
sc->input_base = 0x40;
/* sc->p16vinput_base = 0x50; */
sc->output_base = 0x60;
sc->efxc_base = 0x80;
/* sc->output32h_base = 0xa0; */
/* sc->output32l_base = 0xb0; */
sc->dsp_zero = 0xc0;
/* 0xe0...0x100 are unknown */
/* sc->tram_base = 0x200 */
/* sc->tram_addr_base = 0x300 */
sc->gpr_base = A_FXGPREGBASE;
sc->num_gprs = 0x200;
sc->code_base = A_MICROCODEBASE;
sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words,
* 1024 instructions */
sc->mchannel_fx = 8;
sc->num_fxbuses = 16;
sc->num_inputs = 8;
sc->num_outputs = 16;
sc->address_mask = A_PTR_ADDRESS_MASK;
}
if (sc->is_emu10k1) {
sc->has_51 = 0; /* We don't support 5.1 sound Live! 5.1 */
sc->opcode_shift = 20;
sc->high_operand_shift = 10;
sc->code_base = MICROCODEBASE;
sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words,
* 512 instructions */
sc->gpr_base = FXGPREGBASE;
sc->num_gprs = 0x100;
sc->input_base = 0x10;
sc->output_base = 0x20;
/*
* XXX 5.1 Analog outputs are inside efxc address space!
* They use ouput+0x11/+0x12 (=efxc+1/+2).
* Don't use this efx registers for recording on SB Live! 5.1!
*/
sc->efxc_base = 0x30;
sc->dsp_zero = 0x40;
sc->mchannel_fx = 0;
sc->num_fxbuses = 8;
sc->num_inputs = 8;
sc->num_outputs = 16;
sc->address_mask = PTR_ADDRESS_MASK;
}
if (sc->opcode_shift == 0)
goto bad;
data = pci_read_config(dev, PCIR_COMMAND, 2);
data |= (PCIM_CMD_PORTEN | PCIM_CMD_BUSMASTEREN);
pci_write_config(dev, PCIR_COMMAND, data, 2);
data = pci_read_config(dev, PCIR_COMMAND, 2);
pci_enable_busmaster(dev);
i = PCIR_BAR(0);
sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
if (sc->reg == NULL) {
device_printf(dev, "unable to map register space\n");
goto bad;
}
sc->st = rman_get_bustag(sc->reg);
sc->sh = rman_get_bushandle(sc->reg);
for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
sc->timer[i] = 0; /* disable it */
i = 0;
sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE);
if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV, emu_intr, sc, &sc->ih)) {
device_printf(dev, "unable to map interrupt\n");
goto bad;
}
if (emu_rm_init(sc) != 0) {
device_printf(dev, "unable to create resource manager\n");
goto bad;
}
if (sc->is_cardbus)
if (emu_cardbus_init(sc) != 0) {
device_printf(dev, "unable to initialize CardBus interface\n");
goto bad;
}
sc->ctx = device_get_sysctl_ctx(dev);
if (sc->ctx == NULL)
goto bad;
sc->root = device_get_sysctl_tree(dev);
if (sc->root == NULL)
goto bad;
if (emu_init(sc) == -1) {
device_printf(dev, "unable to initialize the card\n");
goto bad;
}
if (emu10kx_dev_init(sc) == ENXIO) {
device_printf(dev, "unable to create control device\n");
goto bad;
}
snprintf(status, 255, "rev %d at io 0x%lx irq %ld", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq));
/* Voices */
for (i = 0; i < NUM_G; i++) {
sc->voice[i].vnum = i;
sc->voice[i].slave = NULL;
sc->voice[i].busy = 0;
sc->voice[i].ismaster = 0;
sc->voice[i].running = 0;
sc->voice[i].b16 = 0;
sc->voice[i].stereo = 0;
sc->voice[i].speed = 0;
sc->voice[i].start = 0;
sc->voice[i].end = 0;
}
/* PCM Audio */
/* FRONT */
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (pcminfo == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo->card = sc;
pcminfo->route = RT_FRONT;
func->func = SCF_PCM;
func->varinfo = pcminfo;
sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1);
device_set_ivars(sc->pcm[RT_FRONT], func);
#ifdef SND_EMU10KX_MULTICHANNEL
/* REAR */
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (pcminfo == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo->card = sc;
pcminfo->route = RT_REAR;
func->func = SCF_PCM;
func->varinfo = pcminfo;
sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1);
device_set_ivars(sc->pcm[RT_REAR], func);
if (sc->has_51) {
/* CENTER */
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (pcminfo == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo->card = sc;
pcminfo->route = RT_CENTER;
func->func = SCF_PCM;
func->varinfo = pcminfo;
sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1);
device_set_ivars(sc->pcm[RT_CENTER], func);
/* SUB */
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (pcminfo == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo->card = sc;
pcminfo->route = RT_SUB;
func->func = SCF_PCM;
func->varinfo = pcminfo;
sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1);
device_set_ivars(sc->pcm[RT_SUB], func);
}
if (sc->has_71) {
/* SIDE */
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (pcminfo == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo->card = sc;
pcminfo->route = RT_SIDE;
func->func = SCF_PCM;
func->varinfo = pcminfo;
sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1);
device_set_ivars(sc->pcm[RT_SIDE], func);
};
#ifdef SND_EMU10KX_MCH_RECORDING
/* MULTICHANNEL RECORDING */
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo = malloc(sizeof(struct emu_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (pcminfo == NULL) {
error = ENOMEM;
goto bad;
}
pcminfo->card = sc;
pcminfo->route = RT_MCHRECORD;
func->func = SCF_PCM;
func->varinfo = pcminfo;
sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1);
device_set_ivars(sc->pcm[RT_MCHRECORD], func);
#endif /* SMD_EMU10KX_MCH_RECORDING */
#endif /* SND_EMU10KX_MULTICHANNEL */
/* Midi Interface 1: Live!, Audigy, Audigy 2 */
if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) {
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
midiinfo[0] = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (midiinfo[0] == NULL) {
error = ENOMEM;
goto bad;
}
midiinfo[0]->card = sc;
if (sc->is_emu10k2 || (sc->is_ca0102)) {
midiinfo[0]->port = A_MUDATA1;
midiinfo[0]->portnr = 1;
}
if (sc->is_emu10k1) {
midiinfo[0]->port = MUDATA;
midiinfo[0]->portnr = 1;
}
func->func = SCF_MIDI;
func->varinfo = midiinfo[0];
sc->midi[0] = device_add_child(dev, "midi", -1);
device_set_ivars(sc->midi[0], func);
}
/* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */
if (sc->is_emu10k2 || (sc->is_ca0102)) {
func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_NOWAIT | M_ZERO);
if (func == NULL) {
error = ENOMEM;
goto bad;
}
midiinfo[1] = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
if (midiinfo[1] == NULL) {
error = ENOMEM;
goto bad;
}
midiinfo[1]->card = sc;
midiinfo[1]->port = A_MUDATA2;
midiinfo[1]->portnr = 2;
func->func = SCF_MIDI;
func->varinfo = midiinfo[1];
sc->midi[1] = device_add_child(dev, "midi", -1);
device_set_ivars(sc->midi[1], func);
}
return (bus_generic_attach(dev));
bad:
/* XXX can we just call emu_pci_detach here? */
if (sc->cdev)
emu10kx_dev_uninit(sc);
if (sc->rm != NULL)
emu_rm_uninit(sc);
if (sc->reg)
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
if (sc->ih)
bus_teardown_intr(dev, sc->irq, sc->ih);
if (sc->irq)
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
mtx_destroy(&sc->lock);
mtx_destroy(&sc->rw);
return (error);
}
static int
emu_pci_detach(device_t dev)
{
struct emu_sc_info *sc;
int devcount, i;
device_t *childlist;
int r = 0;
sc = device_get_softc(dev);
for (i = 0; i < RT_COUNT; i++) {
if (sc->pcm[i] != NULL)
r = device_delete_child(dev, sc->pcm[i]);
if (r)
return (r);
}
if (sc->midi[0] != NULL)
r = device_delete_child(dev, sc->midi[0]);
if (r)
return (r);
if (sc->midi[1] != NULL)
r = device_delete_child(dev, sc->midi[1]);
if (r)
return (r);
(void)device_get_children(dev, &childlist, &devcount);
for (i = 0; i < devcount - 1; i++) {
device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i]));
device_delete_child(dev, childlist[i]);
}
free(childlist, M_TEMP);
/* shutdown chip */
emu_uninit(sc);
r = emu10kx_dev_uninit(sc);
if (r)
return (r);
emu_rm_uninit(sc);
if (sc->reg)
bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
bus_teardown_intr(dev, sc->irq, sc->ih);
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
mtx_destroy(&sc->lock);
mtx_destroy(&sc->rw);
return (bus_generic_detach(dev));
}
/* add suspend, resume */
static device_method_t emu_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, emu_pci_probe),
DEVMETHOD(device_attach, emu_pci_attach),
DEVMETHOD(device_detach, emu_pci_detach),
/* Bus methods */
DEVMETHOD(bus_read_ivar, emu_read_ivar),
DEVMETHOD(bus_write_ivar, emu_write_ivar),
{0, 0}
};
static driver_t emu_driver = {
"emu10kx",
emu_methods,
sizeof(struct emu_sc_info),
NULL,
0,
NULL
};
static int
emu_modevent(module_t mod __unused, int cmd, void *data __unused)
{
int err = 0;
switch (cmd) {
case MOD_LOAD:
break; /* Success */
case MOD_UNLOAD:
case MOD_SHUTDOWN:
/* XXX Should we check state of pcm & midi subdevices here? */
break; /* Success */
default:
err = EINVAL;
break;
}
return (err);
}
static devclass_t emu_devclass;
DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL);
DRIVER_MODULE(snd_emu10kx, cardbus, emu_driver, emu_devclass, emu_modevent, NULL);
MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER);
|