1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
|
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from: @(#)comreg.h 7.2 (Berkeley) 5/9/91
* $FreeBSD$
*/
/* 16 bit baud rate divisor (lower byte in dca_data, upper in dca_ier) */
#define COMBRD(x) (1843200 / (16*(x)))
#ifdef PC98
#define COMBRD_RSA(x) (14745600 / (16*(x)))
#endif
/* interrupt enable register */
#define IER_ERXRDY 0x1
#define IER_ETXRDY 0x2
#define IER_ERLS 0x4
#define IER_EMSC 0x8
/* interrupt identification register */
#define IIR_IMASK 0xf
#define IIR_RXTOUT 0xc
#define IIR_RLS 0x6
#define IIR_RXRDY 0x4
#define IIR_TXRDY 0x2
#define IIR_NOPEND 0x1
#define IIR_MLSC 0x0
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
/* fifo control register */
#define FIFO_ENABLE 0x01
#define FIFO_RCV_RST 0x02
#define FIFO_XMT_RST 0x04
#define FIFO_DMA_MODE 0x08
#define FIFO_RX_LOW 0x00
#define FIFO_RX_MEDL 0x40
#define FIFO_RX_MEDH 0x80
#define FIFO_RX_HIGH 0xc0
/* character format control register */
#define CFCR_DLAB 0x80
#define CFCR_SBREAK 0x40
#define CFCR_PZERO 0x30
#define CFCR_PONE 0x20
#define CFCR_PEVEN 0x10
#define CFCR_PODD 0x00
#define CFCR_PENAB 0x08
#define CFCR_STOPB 0x04
#define CFCR_8BITS 0x03
#define CFCR_7BITS 0x02
#define CFCR_6BITS 0x01
#define CFCR_5BITS 0x00
/* modem control register */
#define MCR_LOOPBACK 0x10
#define MCR_IENABLE 0x08
#define MCR_DRS 0x04
#define MCR_RTS 0x02
#define MCR_DTR 0x01
/* line status register */
#define LSR_RCV_FIFO 0x80
#define LSR_TSRE 0x40
#define LSR_TXRDY 0x20
#define LSR_BI 0x10
#define LSR_FE 0x08
#define LSR_PE 0x04
#define LSR_OE 0x02
#define LSR_RXRDY 0x01
#define LSR_RCV_MASK 0x1f
/* modem status register */
#define MSR_DCD 0x80
#define MSR_RI 0x40
#define MSR_DSR 0x20
#define MSR_CTS 0x10
#define MSR_DDCD 0x08
#define MSR_TERI 0x04
#define MSR_DDSR 0x02
#define MSR_DCTS 0x01
#ifdef PC98
/* Hardware extension mode register for RSB-2000/3000. */
#define EMR_EXBUFF 0x04
#define EMR_CTSFLW 0x08
#define EMR_DSRFLW 0x10
#define EMR_RTSFLW 0x20
#define EMR_DTRFLW 0x40
#define EMR_EFMODE 0x80
#endif
/* speed to initialize to during chip tests */
#define SIO_TEST_SPEED 9600
/* default serial console speed if not set with sysctl or probed from boot */
#ifndef CONSPEED
#define CONSPEED 9600
#endif
#define IO_COMSIZE 8 /* 8250, 16x50 com controllers */
|