1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
|
/*-
* ichsmb.c
*
* Author: Archie Cobbs <archie@freebsd.org>
* Copyright (c) 2000 Whistle Communications, Inc.
* All rights reserved.
*
* Subject to the following obligations and disclaimer of warranty, use and
* redistribution of this software, in source or object code forms, with or
* without modifications are expressly permitted by Whistle Communications;
* provided, however, that:
* 1. Any and all reproductions of the source or object code must include the
* copyright notice above and the following disclaimer of warranties; and
* 2. No rights are granted, in any manner or form, to use Whistle
* Communications, Inc. trademarks, including the mark "WHISTLE
* COMMUNICATIONS" on advertising, endorsements, or otherwise except as
* such appears in the above copyright notice or in the software.
*
* THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
* TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
* INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
* WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
* REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
* SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
* IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
* RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
* WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
* PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/*
* Support for the SMBus controller logical device which is part of the
* Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
*
* This driver assumes that the generic SMBus code will ensure that
* at most one process at a time calls into the SMBus methods below.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/errno.h>
#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/syslog.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <dev/smbus/smbconf.h>
#include <dev/ichsmb/ichsmb_var.h>
#include <dev/ichsmb/ichsmb_reg.h>
/*
* Enable debugging by defining ICHSMB_DEBUG to a non-zero value.
*/
#define ICHSMB_DEBUG 0
#if ICHSMB_DEBUG != 0 && defined(__CC_SUPPORTS___FUNC__)
#define DBG(fmt, args...) \
do { log(LOG_DEBUG, "%s: " fmt, __func__ , ## args); } while (0)
#else
#define DBG(fmt, args...) do { } while (0)
#endif
/*
* Our child device driver name
*/
#define DRIVER_SMBUS "smbus"
/*
* Internal functions
*/
static int ichsmb_wait(sc_p sc);
/********************************************************************
BUS-INDEPENDENT BUS METHODS
********************************************************************/
/*
* Handle probe-time duties that are independent of the bus
* our device lives on.
*/
int
ichsmb_probe(device_t dev)
{
device_t smb;
/* Add child: an instance of the "smbus" device */
if ((smb = device_add_child(dev, DRIVER_SMBUS, -1)) == NULL) {
log(LOG_ERR, "%s: no \"%s\" child found\n",
device_get_nameunit(dev), DRIVER_SMBUS);
return (ENXIO);
}
return (0);
}
/*
* Handle attach-time duties that are independent of the bus
* our device lives on.
*/
int
ichsmb_attach(device_t dev)
{
const sc_p sc = device_get_softc(dev);
int error;
/* Clear interrupt conditions */
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, 0xff);
/* Add "smbus" child */
if ((error = bus_generic_attach(dev)) != 0) {
log(LOG_ERR, "%s: failed to attach child: %d\n",
device_get_nameunit(dev), error);
return (ENXIO);
}
/* Create mutex */
mtx_init(&sc->mutex, device_get_nameunit(dev), "ichsmb", MTX_DEF);
return (0);
}
/********************************************************************
SMBUS METHODS
********************************************************************/
int
ichsmb_callback(device_t dev, int index, caddr_t data)
{
int smb_error = 0;
DBG("index=%d how=%d\n", index, data ? *(int *)data : -1);
switch (index) {
case SMB_REQUEST_BUS:
break;
case SMB_RELEASE_BUS:
break;
default:
smb_error = SMB_EABORT; /* XXX */
break;
}
DBG("smb_error=%d\n", smb_error);
return (smb_error);
}
int
ichsmb_quick(device_t dev, u_char slave, int how)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x how=%d\n", slave, how);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
switch (how) {
case SMB_QREAD:
case SMB_QWRITE:
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | (how == SMB_QREAD ?
ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
smb_error = ichsmb_wait(sc);
mtx_unlock(&sc->mutex);
break;
default:
smb_error = SMB_ENOTSUPP;
}
DBG("smb_error=%d\n", smb_error);
return (smb_error);
}
int
ichsmb_sendb(device_t dev, u_char slave, char byte)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, byte);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
smb_error = ichsmb_wait(sc);
mtx_unlock(&sc->mutex);
DBG("smb_error=%d\n", smb_error);
return (smb_error);
}
int
ichsmb_recvb(device_t dev, u_char slave, char *byte)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x\n", slave);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
*byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
mtx_unlock(&sc->mutex);
DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
return (smb_error);
}
int
ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
slave, (u_char)cmd, (u_char)byte);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, byte);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
smb_error = ichsmb_wait(sc);
mtx_unlock(&sc->mutex);
DBG("smb_error=%d\n", smb_error);
return (smb_error);
}
int
ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
slave, (u_char)cmd, (u_int16_t)word);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, word & 0xff);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, word >> 8);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
smb_error = ichsmb_wait(sc);
mtx_unlock(&sc->mutex);
DBG("smb_error=%d\n", smb_error);
return (smb_error);
}
int
ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
*byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
mtx_unlock(&sc->mutex);
DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
return (smb_error);
}
int
ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
*word = (bus_space_read_1(sc->io_bst,
sc->io_bsh, ICH_D0) & 0xff)
| (bus_space_read_1(sc->io_bst,
sc->io_bsh, ICH_D1) << 8);
}
mtx_unlock(&sc->mutex);
DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
return (smb_error);
}
int
ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
slave, (u_char)cmd, (u_int16_t)sdata);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, sdata & 0xff);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, sdata >> 8);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
*rdata = (bus_space_read_1(sc->io_bst,
sc->io_bsh, ICH_D0) & 0xff)
| (bus_space_read_1(sc->io_bst,
sc->io_bsh, ICH_D1) << 8);
}
mtx_unlock(&sc->mutex);
DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
return (smb_error);
}
int
ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
#if ICHSMB_DEBUG
#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
{
u_char *p;
for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
" %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
}
}
#undef DISP
#endif
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
if (count < 1 || count > 32)
return (EINVAL);
bcopy(buf, sc->block_data, count);
sc->block_count = count;
sc->block_index = 1;
sc->block_write = 1;
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_WRITE);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_BLOCK_DB, buf[0]);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
smb_error = ichsmb_wait(sc);
mtx_unlock(&sc->mutex);
DBG("smb_error=%d\n", smb_error);
return (smb_error);
}
int
ichsmb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
{
const sc_p sc = device_get_softc(dev);
int smb_error;
DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
KASSERT(sc->ich_cmd == -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
if (count < 1 || count > 32)
return (EINVAL);
bzero(sc->block_data, sizeof(sc->block_data));
sc->block_count = count;
sc->block_index = 0;
sc->block_write = 0;
mtx_lock(&sc->mutex);
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
(slave << 1) | ICH_XMIT_SLVA_READ);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count); /* XXX? */
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
bcopy(sc->block_data, buf, sc->block_count);
mtx_unlock(&sc->mutex);
DBG("smb_error=%d\n", smb_error);
#if ICHSMB_DEBUG
#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
{
u_char *p;
for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
" %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
}
}
#undef DISP
#endif
return (smb_error);
}
/********************************************************************
OTHER FUNCTIONS
********************************************************************/
/*
* This table describes what interrupts we should ever expect to
* see after each ICH command, not including the SMBALERT interrupt.
*/
static const u_int8_t ichsmb_state_irqs[] = {
/* quick */
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
/* byte */
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
/* byte data */
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
/* word data */
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
/* process call */
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
/* block */
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
| ICH_HST_STA_BYTE_DONE_STS),
/* i2c read (not used) */
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
| ICH_HST_STA_BYTE_DONE_STS)
};
/*
* Interrupt handler. This handler is bus-independent. Note that our
* interrupt may be shared, so we must handle "false" interrupts.
*/
void
ichsmb_device_intr(void *cookie)
{
const sc_p sc = cookie;
const device_t dev = sc->dev;
const int maxloops = 16;
u_int8_t status;
u_int8_t ok_bits;
int cmd_index;
int count;
mtx_lock(&sc->mutex);
for (count = 0; count < maxloops; count++) {
/* Get and reset status bits */
status = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA);
#if ICHSMB_DEBUG
if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
|| count > 0) {
DBG("%d stat=0x%02x\n", count, status);
}
#endif
status &= ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY);
if (status == 0)
break;
/* Check for unexpected interrupt */
ok_bits = ICH_HST_STA_SMBALERT_STS;
cmd_index = sc->ich_cmd >> 2;
if (sc->ich_cmd != -1) {
KASSERT(cmd_index < sizeof(ichsmb_state_irqs),
("%s: ich_cmd=%d", device_get_nameunit(dev),
sc->ich_cmd));
ok_bits |= ichsmb_state_irqs[cmd_index];
}
if ((status & ~ok_bits) != 0) {
log(LOG_ERR, "%s: irq 0x%02x during %d\n",
device_get_nameunit(dev), status, cmd_index);
bus_space_write_1(sc->io_bst, sc->io_bsh,
ICH_HST_STA, (status & ~ok_bits));
continue;
}
/* Handle SMBALERT interrupt */
if (status & ICH_HST_STA_SMBALERT_STS) {
static int smbalert_count = 16;
if (smbalert_count > 0) {
log(LOG_WARNING, "%s: SMBALERT# rec'd\n",
device_get_nameunit(dev));
if (--smbalert_count == 0) {
log(LOG_WARNING,
"%s: not logging anymore\n",
device_get_nameunit(dev));
}
}
}
/* Check for bus error */
if (status & ICH_HST_STA_BUS_ERR) {
sc->smb_error = SMB_ECOLLI; /* XXX SMB_EBUSERR? */
goto finished;
}
/* Check for device error */
if (status & ICH_HST_STA_DEV_ERR) {
sc->smb_error = SMB_ENOACK; /* or SMB_ETIMEOUT? */
goto finished;
}
/* Check for byte completion in block transfer */
if (status & ICH_HST_STA_BYTE_DONE_STS) {
if (sc->block_write) {
if (sc->block_index < sc->block_count) {
/* Write next byte */
bus_space_write_1(sc->io_bst,
sc->io_bsh, ICH_BLOCK_DB,
sc->block_data[sc->block_index++]);
}
} else {
/* First interrupt, get the count also */
if (sc->block_index == 0) {
sc->block_count = bus_space_read_1(
sc->io_bst, sc->io_bsh, ICH_D0);
}
/* Get next byte, if any */
if (sc->block_index < sc->block_count) {
/* Read next byte */
sc->block_data[sc->block_index++] =
bus_space_read_1(sc->io_bst,
sc->io_bsh, ICH_BLOCK_DB);
/* Set "LAST_BYTE" bit before reading
the last byte of block data */
if (sc->block_index
>= sc->block_count - 1) {
bus_space_write_1(sc->io_bst,
sc->io_bsh, ICH_HST_CNT,
ICH_HST_CNT_LAST_BYTE
| ICH_HST_CNT_INTREN
| sc->ich_cmd);
}
}
}
}
/* Check command completion */
if (status & ICH_HST_STA_INTR) {
sc->smb_error = SMB_ENOERR;
finished:
sc->ich_cmd = -1;
bus_space_write_1(sc->io_bst, sc->io_bsh,
ICH_HST_STA, status);
wakeup(sc);
break;
}
/* Clear status bits and try again */
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, status);
}
mtx_unlock(&sc->mutex);
/* Too many loops? */
if (count == maxloops) {
log(LOG_ERR, "%s: interrupt loop, status=0x%02x\n",
device_get_nameunit(dev),
bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
}
}
/*
* Wait for command completion. Assumes mutex is held.
* Returns an SMB_* error code.
*/
static int
ichsmb_wait(sc_p sc)
{
const device_t dev = sc->dev;
int error, smb_error;
KASSERT(sc->ich_cmd != -1,
("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
mtx_assert(&sc->mutex, MA_OWNED);
sleep:
error = msleep(sc, &sc->mutex, PZERO | PCATCH, "ichsmb", hz / 4);
DBG("msleep -> %d\n", error);
switch (error) {
case ERESTART:
if (sc->ich_cmd != -1)
goto sleep;
/* FALLTHROUGH */
case 0:
smb_error = sc->smb_error;
break;
case EWOULDBLOCK:
log(LOG_ERR, "%s: device timeout, status=0x%02x\n",
device_get_nameunit(dev),
bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
sc->ich_cmd = -1;
smb_error = SMB_ETIMEOUT;
break;
default:
smb_error = SMB_EABORT;
break;
}
return (smb_error);
}
/*
* Release resources associated with device.
*/
void
ichsmb_release_resources(sc_p sc)
{
const device_t dev = sc->dev;
if (sc->irq_handle != NULL) {
bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
sc->irq_handle = NULL;
}
if (sc->irq_res != NULL) {
bus_release_resource(dev,
SYS_RES_IRQ, sc->irq_rid, sc->irq_res);
sc->irq_res = NULL;
}
if (sc->io_res != NULL) {
bus_release_resource(dev,
SYS_RES_IOPORT, sc->io_rid, sc->io_res);
sc->io_res = NULL;
}
}
|