1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
|
/*-
* Copyright (c) 2003-2005 Nate Lawson (SDG)
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_acpi.h"
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/proc.h>
#include <sys/sched.h>
#include <sys/bus.h>
#include <sys/cpu.h>
#include <sys/power.h>
#include <sys/malloc.h>
#include <sys/module.h>
#include <sys/sbuf.h>
#include <sys/pcpu.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <contrib/dev/acpica/acpi.h>
#include <dev/acpica/acpivar.h>
#include "cpufreq_if.h"
/*
* Support for ACPI processor performance states (Px) according to
* section 8.3.3 of the ACPI 2.0c specification.
*/
struct acpi_px {
uint32_t core_freq;
uint32_t power;
uint32_t trans_lat;
uint32_t bm_lat;
uint32_t ctrl_val;
uint32_t sts_val;
};
/* Offsets in struct cf_setting array for storing driver-specific values. */
#define PX_SPEC_CONTROL 0
#define PX_SPEC_STATUS 1
#define MAX_PX_STATES 16
struct acpi_perf_softc {
device_t dev;
ACPI_HANDLE handle;
struct resource *perf_ctrl; /* Set new performance state. */
int perf_ctrl_type; /* Resource type for perf_ctrl. */
struct resource *perf_status; /* Check that transition succeeded. */
int perf_sts_type; /* Resource type for perf_status. */
struct acpi_px *px_states; /* ACPI perf states. */
uint32_t px_count; /* Total number of perf states. */
uint32_t px_max_avail; /* Lowest index state available. */
int px_curr_state; /* Active state index. */
int px_rid;
int info_only; /* Can we set new states? */
};
#define PX_GET_REG(reg) \
(bus_space_read_4(rman_get_bustag((reg)), \
rman_get_bushandle((reg)), 0))
#define PX_SET_REG(reg, val) \
(bus_space_write_4(rman_get_bustag((reg)), \
rman_get_bushandle((reg)), 0, (val)))
#define ACPI_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */
static void acpi_perf_identify(driver_t *driver, device_t parent);
static int acpi_perf_probe(device_t dev);
static int acpi_perf_attach(device_t dev);
static int acpi_perf_detach(device_t dev);
static int acpi_perf_evaluate(device_t dev);
static int acpi_px_to_set(device_t dev, struct acpi_px *px,
struct cf_setting *set);
static void acpi_px_available(struct acpi_perf_softc *sc);
static void acpi_px_startup(void *arg);
static void acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context);
static int acpi_px_settings(device_t dev, struct cf_setting *sets,
int *count);
static int acpi_px_set(device_t dev, const struct cf_setting *set);
static int acpi_px_get(device_t dev, struct cf_setting *set);
static int acpi_px_type(device_t dev, int *type);
static device_method_t acpi_perf_methods[] = {
/* Device interface */
DEVMETHOD(device_identify, acpi_perf_identify),
DEVMETHOD(device_probe, acpi_perf_probe),
DEVMETHOD(device_attach, acpi_perf_attach),
DEVMETHOD(device_detach, acpi_perf_detach),
/* cpufreq interface */
DEVMETHOD(cpufreq_drv_set, acpi_px_set),
DEVMETHOD(cpufreq_drv_get, acpi_px_get),
DEVMETHOD(cpufreq_drv_type, acpi_px_type),
DEVMETHOD(cpufreq_drv_settings, acpi_px_settings),
{0, 0}
};
static driver_t acpi_perf_driver = {
"acpi_perf",
acpi_perf_methods,
sizeof(struct acpi_perf_softc),
};
static devclass_t acpi_perf_devclass;
DRIVER_MODULE(acpi_perf, cpu, acpi_perf_driver, acpi_perf_devclass, 0, 0);
MODULE_DEPEND(acpi_perf, acpi, 1, 1, 1);
MALLOC_DEFINE(M_ACPIPERF, "acpi_perf", "ACPI Performance states");
static void
acpi_perf_identify(driver_t *driver, device_t parent)
{
ACPI_HANDLE handle;
device_t dev;
/* Make sure we're not being doubly invoked. */
if (device_find_child(parent, "acpi_perf", -1) != NULL)
return;
/* Get the handle for the Processor object and check for perf states. */
handle = acpi_get_handle(parent);
if (handle == NULL)
return;
if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PSS", NULL, NULL)))
return;
/*
* Add a child to every CPU that has the right methods. In future
* versions of the ACPI spec, CPUs can have different settings.
* We probe this child now so that other devices that depend
* on it (i.e., for info about supported states) will see it.
*/
if ((dev = BUS_ADD_CHILD(parent, 0, "acpi_perf", -1)) != NULL)
device_probe_and_attach(dev);
else
device_printf(parent, "add acpi_perf child failed\n");
}
static int
acpi_perf_probe(device_t dev)
{
ACPI_HANDLE handle;
ACPI_OBJECT *pkg;
struct resource *res;
ACPI_BUFFER buf;
int error, rid, type;
if (resource_disabled("acpi_perf", 0))
return (ENXIO);
/*
* Check the performance state registers. If they are of type
* "functional fixed hardware", we attach quietly since we will
* only be providing information on settings to other drivers.
*/
error = ENXIO;
handle = acpi_get_handle(dev);
buf.Pointer = NULL;
buf.Length = ACPI_ALLOCATE_BUFFER;
if (ACPI_FAILURE(AcpiEvaluateObject(handle, "_PCT", NULL, &buf)))
return (error);
pkg = (ACPI_OBJECT *)buf.Pointer;
if (ACPI_PKG_VALID(pkg, 2)) {
rid = 0;
error = acpi_PkgGas(dev, pkg, 0, &type, &rid, &res);
switch (error) {
case 0:
bus_release_resource(dev, type, rid, res);
bus_delete_resource(dev, type, rid);
device_set_desc(dev, "ACPI CPU Frequency Control");
break;
case EOPNOTSUPP:
device_quiet(dev);
error = 0;
break;
}
}
AcpiOsFree(buf.Pointer);
return (error);
}
static int
acpi_perf_attach(device_t dev)
{
struct acpi_perf_softc *sc;
sc = device_get_softc(dev);
sc->dev = dev;
sc->handle = acpi_get_handle(dev);
sc->px_max_avail = 0;
sc->px_curr_state = CPUFREQ_VAL_UNKNOWN;
if (acpi_perf_evaluate(dev) != 0)
return (ENXIO);
AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_px_startup, NULL);
if (!sc->info_only)
cpufreq_register(dev);
return (0);
}
static int
acpi_perf_detach(device_t dev)
{
/* TODO: teardown registers, remove notify handler. */
return (ENXIO);
}
/* Probe and setup any valid performance states (Px). */
static int
acpi_perf_evaluate(device_t dev)
{
struct acpi_perf_softc *sc;
ACPI_BUFFER buf;
ACPI_OBJECT *pkg, *res;
ACPI_STATUS status;
int count, error, i, j;
static int once = 1;
uint32_t *p;
/* Get the control values and parameters for each state. */
error = ENXIO;
sc = device_get_softc(dev);
buf.Pointer = NULL;
buf.Length = ACPI_ALLOCATE_BUFFER;
status = AcpiEvaluateObject(sc->handle, "_PSS", NULL, &buf);
if (ACPI_FAILURE(status))
return (ENXIO);
pkg = (ACPI_OBJECT *)buf.Pointer;
if (!ACPI_PKG_VALID(pkg, 1)) {
device_printf(dev, "invalid top level _PSS package\n");
goto out;
}
sc->px_count = pkg->Package.Count;
sc->px_states = malloc(sc->px_count * sizeof(struct acpi_px),
M_ACPIPERF, M_WAITOK | M_ZERO);
if (sc->px_states == NULL)
goto out;
/*
* Each state is a package of {CoreFreq, Power, TransitionLatency,
* BusMasterLatency, ControlVal, StatusVal}, sorted from highest
* performance to lowest.
*/
count = 0;
for (i = 0; i < sc->px_count; i++) {
res = &pkg->Package.Elements[i];
if (!ACPI_PKG_VALID(res, 6)) {
if (once) {
once = 0;
device_printf(dev, "invalid _PSS package\n");
}
continue;
}
/* Parse the rest of the package into the struct. */
p = &sc->px_states[count].core_freq;
for (j = 0; j < 6; j++, p++)
acpi_PkgInt32(res, j, p);
/*
* Check for some impossible frequencies that some systems
* use to indicate they don't actually support this Px state.
*/
if (sc->px_states[count].core_freq == 0 ||
sc->px_states[count].core_freq == 9999 ||
sc->px_states[count].core_freq == 0x9999 ||
sc->px_states[count].core_freq >= 0xffff)
continue;
count++;
}
sc->px_count = count;
/* No valid Px state found so give up. */
if (count == 0)
goto out;
AcpiOsFree(buf.Pointer);
/* Get the control and status registers (one of each). */
buf.Pointer = NULL;
buf.Length = ACPI_ALLOCATE_BUFFER;
status = AcpiEvaluateObject(sc->handle, "_PCT", NULL, &buf);
if (ACPI_FAILURE(status))
goto out;
/* Check the package of two registers, each a Buffer in GAS format. */
pkg = (ACPI_OBJECT *)buf.Pointer;
if (!ACPI_PKG_VALID(pkg, 2)) {
device_printf(dev, "invalid perf register package\n");
goto out;
}
error = acpi_PkgGas(sc->dev, pkg, 0, &sc->perf_ctrl_type, &sc->px_rid,
&sc->perf_ctrl);
if (error) {
/*
* If the register is of type FFixedHW, we can only return
* info, we can't get or set new settings.
*/
if (error == EOPNOTSUPP) {
sc->info_only = TRUE;
error = 0;
} else
device_printf(dev, "failed in PERF_CTL attach\n");
goto out;
}
sc->px_rid++;
error = acpi_PkgGas(sc->dev, pkg, 1, &sc->perf_sts_type, &sc->px_rid,
&sc->perf_status);
if (error) {
if (error == EOPNOTSUPP) {
sc->info_only = TRUE;
error = 0;
} else
device_printf(dev, "failed in PERF_STATUS attach\n");
goto out;
}
sc->px_rid++;
/* Get our current limit and register for notifies. */
acpi_px_available(sc);
AcpiInstallNotifyHandler(sc->handle, ACPI_DEVICE_NOTIFY,
acpi_px_notify, sc);
error = 0;
out:
if (error) {
if (sc->px_states) {
free(sc->px_states, M_ACPIPERF);
sc->px_states = NULL;
}
if (sc->perf_ctrl) {
bus_release_resource(sc->dev, sc->perf_ctrl_type, 0,
sc->perf_ctrl);
bus_delete_resource(sc->dev, sc->perf_ctrl_type, 0);
sc->perf_ctrl = NULL;
}
if (sc->perf_status) {
bus_release_resource(sc->dev, sc->perf_sts_type, 1,
sc->perf_status);
bus_delete_resource(sc->dev, sc->perf_sts_type, 1);
sc->perf_status = NULL;
}
sc->px_rid = 0;
sc->px_count = 0;
}
if (buf.Pointer)
AcpiOsFree(buf.Pointer);
return (error);
}
static void
acpi_px_startup(void *arg)
{
/* Signal to the platform that we are taking over CPU control. */
if (AcpiGbl_FADT->PstateCnt == 0)
return;
ACPI_LOCK(acpi);
AcpiOsWritePort(AcpiGbl_FADT->SmiCmd, AcpiGbl_FADT->PstateCnt, 8);
ACPI_UNLOCK(acpi);
}
static void
acpi_px_notify(ACPI_HANDLE h, UINT32 notify, void *context)
{
struct acpi_perf_softc *sc;
sc = context;
if (notify != ACPI_NOTIFY_PERF_STATES)
return;
acpi_px_available(sc);
/* TODO: Implement notification when frequency changes. */
}
/*
* Find the highest currently-supported performance state.
* This can be called at runtime (e.g., due to a docking event) at
* the request of a Notify on the processor object.
*/
static void
acpi_px_available(struct acpi_perf_softc *sc)
{
ACPI_STATUS status;
struct cf_setting set;
status = acpi_GetInteger(sc->handle, "_PPC", &sc->px_max_avail);
/* If the old state is too high, set current state to the new max. */
if (ACPI_SUCCESS(status)) {
if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN &&
sc->px_curr_state > sc->px_max_avail) {
acpi_px_to_set(sc->dev,
&sc->px_states[sc->px_max_avail], &set);
acpi_px_set(sc->dev, &set);
}
} else
sc->px_max_avail = 0;
}
static int
acpi_px_to_set(device_t dev, struct acpi_px *px, struct cf_setting *set)
{
if (px == NULL || set == NULL)
return (EINVAL);
set->freq = px->core_freq;
set->power = px->power;
/* XXX Include BM latency too? */
set->lat = px->trans_lat;
set->volts = CPUFREQ_VAL_UNKNOWN;
set->dev = dev;
set->spec[PX_SPEC_CONTROL] = px->ctrl_val;
set->spec[PX_SPEC_STATUS] = px->sts_val;
return (0);
}
static int
acpi_px_settings(device_t dev, struct cf_setting *sets, int *count)
{
struct acpi_perf_softc *sc;
int x, y;
sc = device_get_softc(dev);
if (sets == NULL || count == NULL)
return (EINVAL);
if (*count < sc->px_count - sc->px_max_avail)
return (E2BIG);
/* Return a list of settings that are currently valid. */
y = 0;
for (x = sc->px_max_avail; x < sc->px_count; x++, y++)
acpi_px_to_set(dev, &sc->px_states[x], &sets[y]);
*count = sc->px_count - sc->px_max_avail;
return (0);
}
static int
acpi_px_set(device_t dev, const struct cf_setting *set)
{
struct acpi_perf_softc *sc;
int i, status, sts_val, tries;
if (set == NULL)
return (EINVAL);
sc = device_get_softc(dev);
/* If we can't set new states, return immediately. */
if (sc->info_only)
return (ENXIO);
/* Look up appropriate state, based on frequency. */
for (i = sc->px_max_avail; i < sc->px_count; i++) {
if (CPUFREQ_CMP(set->freq, sc->px_states[i].core_freq))
break;
}
if (i == sc->px_count)
return (EINVAL);
/* Write the appropriate value to the register. */
PX_SET_REG(sc->perf_ctrl, sc->px_states[i].ctrl_val);
/*
* Try for up to 10 ms to verify the desired state was selected.
* This is longer than the standard says (1 ms) but in some modes,
* systems may take longer to respond.
*/
sts_val = sc->px_states[i].sts_val;
for (tries = 0; tries < 1000; tries++) {
status = PX_GET_REG(sc->perf_status);
/*
* If we match the status or the desired status is 8 bits
* and matches the relevant bits, assume we succeeded. It
* appears some systems (IBM R32) expect byte-wide access
* even though the standard says the register is 32-bit.
*/
if (status == sts_val ||
((sts_val & ~0xff) == 0 && (status & 0xff) == sts_val))
break;
DELAY(10);
}
if (tries == 1000) {
device_printf(dev, "Px transition to %d failed\n",
sc->px_states[i].core_freq);
return (ENXIO);
}
sc->px_curr_state = i;
return (0);
}
static int
acpi_px_get(device_t dev, struct cf_setting *set)
{
struct acpi_perf_softc *sc;
uint64_t rate;
int i;
struct pcpu *pc;
if (set == NULL)
return (EINVAL);
sc = device_get_softc(dev);
/* If we can't get new states, return immediately. */
if (sc->info_only)
return (ENXIO);
/* If we've set the rate before, use the cached value. */
if (sc->px_curr_state != CPUFREQ_VAL_UNKNOWN) {
acpi_px_to_set(dev, &sc->px_states[sc->px_curr_state], set);
return (0);
}
/* Otherwise, estimate and try to match against our settings. */
pc = cpu_get_pcpu(dev);
if (pc == NULL)
return (ENXIO);
cpu_est_clockrate(pc->pc_cpuid, &rate);
rate /= 1000000;
for (i = 0; i < sc->px_count; i++) {
if (CPUFREQ_CMP(sc->px_states[i].core_freq, rate)) {
sc->px_curr_state = i;
acpi_px_to_set(dev, &sc->px_states[i], set);
break;
}
}
/* No match, give up. */
if (i == sc->px_count) {
sc->px_curr_state = CPUFREQ_VAL_UNKNOWN;
set->freq = CPUFREQ_VAL_UNKNOWN;
}
return (0);
}
static int
acpi_px_type(device_t dev, int *type)
{
struct acpi_perf_softc *sc;
if (type == NULL)
return (EINVAL);
sc = device_get_softc(dev);
*type = CPUFREQ_TYPE_ABSOLUTE;
if (sc->info_only)
*type |= CPUFREQ_FLAG_INFO_ONLY;
return (0);
}
|