1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
|
/*-
* Copyright (c) 2010 Jakub Wojciech Klama <jceel@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/malloc.h>
#include <sys/rman.h>
#include <sys/timetc.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <dev/fdt/fdt_common.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <arm/lpc/lpcreg.h>
struct lpc_intc_softc {
struct resource * li_res;
bus_space_tag_t li_bst;
bus_space_handle_t li_bsh;
};
static int lpc_intc_probe(device_t);
static int lpc_intc_attach(device_t);
static void lpc_intc_eoi(void *);
static struct lpc_intc_softc *intc_softc = NULL;
#define intc_read_4(_sc, _reg) \
bus_space_read_4((_sc)->li_bst, (_sc)->li_bsh, (_reg))
#define intc_write_4(_sc, _reg, _val) \
bus_space_write_4((_sc)->li_bst, (_sc)->li_bsh, (_reg), (_val))
static int
lpc_intc_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (!ofw_bus_is_compatible(dev, "lpc,pic"))
return (ENXIO);
device_set_desc(dev, "LPC32x0 Interrupt Controller");
return (BUS_PROBE_DEFAULT);
}
static int
lpc_intc_attach(device_t dev)
{
struct lpc_intc_softc *sc = device_get_softc(dev);
int rid = 0;
if (intc_softc)
return (ENXIO);
sc->li_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (!sc->li_res) {
device_printf(dev, "could not alloc resources\n");
return (ENXIO);
}
sc->li_bst = rman_get_bustag(sc->li_res);
sc->li_bsh = rman_get_bushandle(sc->li_res);
intc_softc = sc;
arm_post_filter = lpc_intc_eoi;
/* Clear interrupt status registers and disable all interrupts */
intc_write_4(sc, LPC_INTC_MIC_ER, 0);
intc_write_4(sc, LPC_INTC_SIC1_ER, 0);
intc_write_4(sc, LPC_INTC_SIC2_ER, 0);
intc_write_4(sc, LPC_INTC_MIC_RSR, ~0);
intc_write_4(sc, LPC_INTC_SIC1_RSR, ~0);
intc_write_4(sc, LPC_INTC_SIC2_RSR, ~0);
return (0);
}
static device_method_t lpc_intc_methods[] = {
DEVMETHOD(device_probe, lpc_intc_probe),
DEVMETHOD(device_attach, lpc_intc_attach),
{ 0, 0 }
};
static driver_t lpc_intc_driver = {
"pic",
lpc_intc_methods,
sizeof(struct lpc_intc_softc),
};
static devclass_t lpc_intc_devclass;
DRIVER_MODULE(pic, simplebus, lpc_intc_driver, lpc_intc_devclass, 0, 0);
int
arm_get_next_irq(int last)
{
struct lpc_intc_softc *sc = intc_softc;
uint32_t value;
int i;
/* IRQs 0-31 are mapped to LPC_INTC_MIC_SR */
value = intc_read_4(sc, LPC_INTC_MIC_SR);
for (i = 0; i < 32; i++) {
if (value & (1 << i))
return (i);
}
/* IRQs 32-63 are mapped to LPC_INTC_SIC1_SR */
value = intc_read_4(sc, LPC_INTC_SIC1_SR);
for (i = 0; i < 32; i++) {
if (value & (1 << i))
return (i + 32);
}
/* IRQs 64-95 are mapped to LPC_INTC_SIC2_SR */
value = intc_read_4(sc, LPC_INTC_SIC2_SR);
for (i = 0; i < 32; i++) {
if (value & (1 << i))
return (i + 64);
}
return (-1);
}
void
arm_mask_irq(uintptr_t nb)
{
struct lpc_intc_softc *sc = intc_softc;
int reg;
uint32_t value;
/* Make sure that interrupt isn't active already */
lpc_intc_eoi((void *)nb);
if (nb > 63) {
nb -= 64;
reg = LPC_INTC_SIC2_ER;
} else if (nb > 31) {
nb -= 32;
reg = LPC_INTC_SIC1_ER;
} else
reg = LPC_INTC_MIC_ER;
/* Clear bit in ER register */
value = intc_read_4(sc, reg);
value &= ~(1 << nb);
intc_write_4(sc, reg, value);
}
void
arm_unmask_irq(uintptr_t nb)
{
struct lpc_intc_softc *sc = intc_softc;
int reg;
uint32_t value;
if (nb > 63) {
nb -= 64;
reg = LPC_INTC_SIC2_ER;
} else if (nb > 31) {
nb -= 32;
reg = LPC_INTC_SIC1_ER;
} else
reg = LPC_INTC_MIC_ER;
/* Set bit in ER register */
value = intc_read_4(sc, reg);
value |= (1 << nb);
intc_write_4(sc, reg, value);
}
static void
lpc_intc_eoi(void *data)
{
struct lpc_intc_softc *sc = intc_softc;
int reg;
int nb = (int)data;
uint32_t value;
if (nb > 63) {
nb -= 64;
reg = LPC_INTC_SIC2_RSR;
} else if (nb > 31) {
nb -= 32;
reg = LPC_INTC_SIC1_RSR;
} else
reg = LPC_INTC_MIC_RSR;
/* Set bit in RSR register */
value = intc_read_4(sc, reg);
value |= (1 << nb);
intc_write_4(sc, reg, value);
}
#ifndef INTRNG
static int
fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
int *pol)
{
if (!ofw_bus_node_is_compatible(node, "lpc,pic"))
return (ENXIO);
*interrupt = fdt32_to_cpu(intr[0]);
*trig = INTR_TRIGGER_CONFORM;
*pol = INTR_POLARITY_CONFORM;
return (0);
}
fdt_pic_decode_t fdt_pic_table[] = {
&fdt_pic_decode_ic,
NULL
};
#endif
|
