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.\"
.\" Copyright (c) 1997 Jamil J. Weatherbee
.\" All rights reserved.
.\"
.\" 
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\"    notice, this list of conditions and the following disclaimer
.\"    in this position and unchanged.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\"    notice, this list of conditions and the following disclaimer in the
.\"    documentation and/or other materials provided with the distribution.
.\" 3. The name of the author may not be used to endorse or promote products
.\"    derived from this software without specific prior written permission
.\" 
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
.\" Industrial Computer Source model AIO8-P
.\" 8 channel, moderate speed analog to digital converter board with
.\" 128 channel MUX capability via daisy-chained AT-16P units
.\" alog.c, character device driver, last revised December 9 1997
.\" See http://www.indcompsrc.com/products/data/html/aio8g-p.html
.\"
.\" Written by: Jamil J. Weatherbee <jamil@freebsd.org>
.\"
.\"
.Dd December 9, 1997
.Dt ALOG 4 i386
.Os FreeBSD
.Sh NAME
.Nm alog
.Nd
Industrial Computer Source AIO8-P driver
.Sh SYNOPSIS
.Cd "device alog0 at isa? port 0x260 tty irq 5 vector alogintr"
.Sh DESCRIPTION
This driver supports the Industrial Computer Source \fIAIO8-P 8-Channel
12-Bit Analog Input board\fP.
.Pp
This board provides 8 12 bit, single-ended analog input ports.
The driver also directly provides support for up to 8 daisy chained 
\fIAT16-P Programmable Analog Multiplexers with 16 Differential Inputs\fP.
This makes it possible to sample up to 128 differential channels with a single
interface board.  
Use of at least one \fIAT16-P\fP is highly recommended as the \fIAIO8-P\fP
offers no signal conditioning options and only operates in a -5 to +5 Volt
input range.  However, if you wish to use the \fIAIO8-P\fP standalone,
insert the following into your kernel
.Xr config 8
file:
.Bd -literal -offset indent
options  ALOG_CHANNELS=8
.Ed
.Pp
Selection of the input port is through the minor number:
.Pp
.Bd -literal -offset indent
The 8 bit minor number format is UCCCCMMM, where
   U: board unit (0-1)
CCCC: external multiplexer channel (0-15) (on AT-16P units) 
 MMM: internal multiplexer channel (0-7) (on AIO8-P card)
.Ed
.Pp
.Xr devfs 5
device node names are of the form: alog[0-1][a-p][0-7] 
.Pp
.Sh IOCTL
The following
.Xr ioctl 2
calls apply to
.Nm
devices.  Their declaration can be found in the header files
.Pa <sys/alogio.h>
and
.Pa <sys/dataacq.h>
.Bl -tag -width AD_MICRO_PERIOD_SET
.It Dv AD_MICRO_PERIOD_SET
Takes a pointer to a long argument specifying the number of microseconds
between samples.  Half of this is used as the external multiplexer
settling time and the other half as conversion time.
.It Dv AD_MICRO_PERIOD_GET
Takes a pointer to a long argument and returns the current number of
microseconds between samples.
.It Dv AD_NCHANS_GET
Takes a pointer to an integer and returns the number of channels the board
supports.  This should be 8 for a standalone \fIAIO8-P\fP or 128 for any
other setup.
.It Dv AD_FIFOSIZE_GET
Takes a pointer to an integer and returns the size of the fifo in
entries.  The compile time option ALOG_FIFOSIZE is by default set to 64.
.It Dv AD_FIFO_TRIGGER_GET
Takes a pointer to an integer and returns the minimum number of entries a
fifo must contain to cause
.Xr poll 2
to return.  This by default is set to 1.
.It Dv AD_FIFO_TRIGGER_SET
Takes a pointer to an integer specifying the minimum number of entries a
fifo must contain to cause
.Xr poll 2
to return.
.It Dv AD_START
Starts the clocked accumulation of sample values into a channel's driver fifo.
When a channel is first opened its software fifo is initialized in the
stopped state.  This is to prevent high sample clocks from overrunning the
fifos before the user is ready to read from the channel.  The driver
automatically performs an AD_START when the user issues the first read,
except for channels opened with the O_NONBLOCK flag which must explicitly
have an AD_START issued.
.It Dv AD_STOP
Stops the clocked accumulation of sample values into a channel's driver fifo.
.Sh BUGS
On the \fIAIO8-P\fP, interrupt driven conversion (the only type
supported by the
.Nm
driver) is facilitated through 8253 timer #2.  In order for interrrupts to
be generated you must connect line 6 to line 24 (counter 2 output to
interrupt input) and line 23 to line 29 (counter 2 gate to +5VDC).
The design of the \fIAIO8-P\fP precludes the use of programmable
gain control.    
.Pp
Use the combination of non-blocking i/o, 
.Xr poll 2
and a custom fifo trigger
wherever possible, especially with large numbers of open channels.
Using this method, multichannel sample rates as high as 16,000 samples/sec
have been observed.
.Pp
Sample rates lower than 32 Hz are not supported.
.Sh SEE ALSO
.Bd -literal
http://www.indcompsrc.com/products/data/html/aio8g-p.html
http://www.indcompsrc.com/products/data/html/at16-p.html
.Ed
.Sh AUTHOR
Jamil J. Weatherbee <jamil@freebsd.org>.
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