/***********************license start***************
 * Copyright (c) 2003-2012  Cavium Inc. (support@cavium.com). All rights
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 ***********************license end**************************************/


/**
 * cvmx-smi-defs.h
 *
 * Configuration and status register (CSR) type definitions for
 * Octeon smi.
 *
 * This file is auto generated. Do not edit.
 *
 * <hr>$Revision$<hr>
 *
 */
#ifndef __CVMX_SMI_DEFS_H__
#define __CVMX_SMI_DEFS_H__

#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
#define CVMX_SMI_DRV_CTL CVMX_SMI_DRV_CTL_FUNC()
static inline uint64_t CVMX_SMI_DRV_CTL_FUNC(void)
{
	if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
		cvmx_warn("CVMX_SMI_DRV_CTL not supported on this chip\n");
	return CVMX_ADD_IO_SEG(0x0001180000001828ull);
}
#else
#define CVMX_SMI_DRV_CTL (CVMX_ADD_IO_SEG(0x0001180000001828ull))
#endif

/**
 * cvmx_smi_drv_ctl
 *
 * SMI_DRV_CTL = SMI Drive Strength Control
 *
 */
union cvmx_smi_drv_ctl {
	uint64_t u64;
	struct cvmx_smi_drv_ctl_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_14_63               : 50;
	uint64_t pctl                         : 6;  /**< PCTL Drive strength control bits
                                                         Assuming a 50ohm termination
                                                         3.3v supply = 19
                                                         2.5v supply = TBD */
	uint64_t reserved_6_7                 : 2;
	uint64_t nctl                         : 6;  /**< NCTL Drive strength control bits
                                                         Assuming a 50ohm termination
                                                         3.3v supply = 15
                                                         2.5v supply = TBD */
#else
	uint64_t nctl                         : 6;
	uint64_t reserved_6_7                 : 2;
	uint64_t pctl                         : 6;
	uint64_t reserved_14_63               : 50;
#endif
	} s;
	struct cvmx_smi_drv_ctl_s             cn61xx;
	struct cvmx_smi_drv_ctl_s             cn63xx;
	struct cvmx_smi_drv_ctl_s             cn63xxp1;
	struct cvmx_smi_drv_ctl_s             cn66xx;
	struct cvmx_smi_drv_ctl_s             cn68xx;
	struct cvmx_smi_drv_ctl_s             cn68xxp1;
	struct cvmx_smi_drv_ctl_s             cnf71xx;
};
typedef union cvmx_smi_drv_ctl cvmx_smi_drv_ctl_t;

#endif