From d2e985fd323c167e20f77b045a1d99ad166e65db Mon Sep 17 00:00:00 2001
From: rdivacky <rdivacky@FreeBSD.org>
Date: Wed, 18 Nov 2009 14:58:34 +0000
Subject: Update LLVM to r89205.
---
utils/TableGen/AsmWriterEmitter.cpp | 3 +--
utils/TableGen/CodeGenTarget.h | 2 +-
utils/TableGen/DAGISelEmitter.cpp | 11 +++++------
utils/TableGen/RegisterInfoEmitter.cpp | 18 ++++++++++++++++++
utils/TableGen/SubtargetEmitter.cpp | 4 ++++
5 files changed, 29 insertions(+), 9 deletions(-)
(limited to 'utils/TableGen')
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index ff348e8..ff83c76 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -695,7 +695,6 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
O << "\n#ifndef NO_ASM_WRITER_BOILERPLATE\n";
O << " if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
- << " O << \"\\t\";\n"
<< " printInlineAsm(MI);\n"
<< " return;\n"
<< " } else if (MI->isLabel()) {\n"
@@ -705,6 +704,7 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
<< " printImplicitDef(MI);\n"
<< " return;\n"
<< " } else if (MI->getOpcode() == TargetInstrInfo::KILL) {\n"
+ << " printKill(MI);\n"
<< " return;\n"
<< " }\n\n";
@@ -786,7 +786,6 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
O << " return;\n";
}
- O << " return;\n";
O << "}\n";
}
diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h
index e763795..da4b1cc 100644
--- a/utils/TableGen/CodeGenTarget.h
+++ b/utils/TableGen/CodeGenTarget.h
@@ -229,7 +229,7 @@ class ComplexPattern {
unsigned Properties; // Node properties
unsigned Attributes; // Pattern attributes
public:
- ComplexPattern() : NumOperands(0) {};
+ ComplexPattern() : NumOperands(0) {}
ComplexPattern(Record *R);
MVT::SimpleValueType getValueType() const { return Ty; }
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index c3520c1..0c78f56 100644
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -1359,7 +1359,7 @@ public:
Pat->setTypes(Other->getExtTypes());
// The top level node type is checked outside of the select function.
if (!isRoot)
- emitCheck(Prefix + ".getNode()->getValueType(0) == " +
+ emitCheck(Prefix + ".getValueType() == " +
getName(Pat->getTypeNum(0)));
return true;
}
@@ -1786,11 +1786,7 @@ void DAGISelEmitter::EmitInstructionSelector(raw_ostream &OS) {
}
CallerCode += ");";
- CalleeCode += ") ";
- // Prevent emission routines from being inlined to reduce selection
- // routines stack frame sizes.
- CalleeCode += "DISABLE_INLINE ";
- CalleeCode += "{\n";
+ CalleeCode += ") {\n";
for (std::vector<std::string>::const_reverse_iterator
I = AddedInits.rbegin(), E = AddedInits.rend(); I != E; ++I)
@@ -1811,6 +1807,9 @@ void DAGISelEmitter::EmitInstructionSelector(raw_ostream &OS) {
} else {
EmitFuncNum = EmitFunctions.size();
EmitFunctions.insert(std::make_pair(CalleeCode, EmitFuncNum));
+ // Prevent emission routines from being inlined to reduce selection
+ // routines stack frame sizes.
+ OS << "DISABLE_INLINE ";
OS << "SDNode *Emit_" << utostr(EmitFuncNum) << CalleeCode;
}
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 3c7b44a..bf0721e 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -66,6 +66,7 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) {
<< " virtual bool needsStackRealignment(const MachineFunction &) const\n"
<< " { return false; }\n"
<< " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
+ << " unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;\n"
<< "};\n\n";
const std::vector<CodeGenRegisterClass> &RegisterClasses =
@@ -831,6 +832,23 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
OS << " };\n";
OS << " return 0;\n";
OS << "}\n\n";
+
+ OS << "unsigned " << ClassName
+ << "::getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {\n"
+ << " switch (RegNo) {\n"
+ << " default:\n return 0;\n";
+ for (std::map<Record*, std::vector<std::pair<int, Record*> > >::iterator
+ I = SubRegVectors.begin(), E = SubRegVectors.end(); I != E; ++I) {
+ OS << " case " << getQualifiedName(I->first) << ":\n";
+ for (unsigned i = 0, e = I->second.size(); i != e; ++i)
+ OS << " if (SubRegNo == "
+ << getQualifiedName((I->second)[i].second)
+ << ") return " << (I->second)[i].first << ";\n";
+ OS << " return 0;\n";
+ }
+ OS << " };\n";
+ OS << " return 0;\n";
+ OS << "}\n\n";
// Emit the constructor of the class...
OS << ClassName << "::" << ClassName
diff --git a/utils/TableGen/SubtargetEmitter.cpp b/utils/TableGen/SubtargetEmitter.cpp
index c8cf234..0dbfcbe 100644
--- a/utils/TableGen/SubtargetEmitter.cpp
+++ b/utils/TableGen/SubtargetEmitter.cpp
@@ -519,6 +519,8 @@ void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS) {
OS << Target;
OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
<< " const std::string &CPU) {\n"
+ << " DEBUG(errs() << \"\\nFeatures:\" << FS);\n"
+ << " DEBUG(errs() << \"\\nCPU:\" << CPU);\n"
<< " SubtargetFeatures Features(FS);\n"
<< " Features.setCPUIfNone(CPU);\n"
<< " uint32_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
@@ -558,6 +560,8 @@ void SubtargetEmitter::run(raw_ostream &OS) {
EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
+ OS << "#include \"llvm/Support/Debug.h\"\n";
+ OS << "#include \"llvm/Support/raw_ostream.h\"\n";
OS << "#include \"llvm/Target/SubtargetFeature.h\"\n";
OS << "#include \"llvm/Target/TargetInstrItineraries.h\"\n\n";
--
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