From 721c201bd55ffb73cb2ba8d39e0570fa38c44e15 Mon Sep 17 00:00:00 2001 From: dim Date: Wed, 15 Aug 2012 19:34:23 +0000 Subject: Vendor import of llvm trunk r161861: http://llvm.org/svn/llvm-project/llvm/trunk@161861 --- test/CodeGen/ARM/2007-03-13-InstrSched.ll | 2 +- test/CodeGen/ARM/2007-04-03-PEIBug.ll | 2 +- test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll | 2 +- test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll | 2 +- test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll | 2 +- test/CodeGen/ARM/2009-04-06-AsmModifier.ll | 2 +- test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll | 2 +- test/CodeGen/ARM/2011-12-14-machine-sink.ll | 2 +- .../CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll | 8 + test/CodeGen/ARM/2012-04-24-SplitEHCriticalEdge.ll | 71 ++++ test/CodeGen/ARM/2012-05-29-TailDupBug.ll | 140 ++++++++ test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll | 41 +++ test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll | 174 +++++++++ test/CodeGen/ARM/2012-08-08-legalize-unaligned.ll | 12 + test/CodeGen/ARM/2012-08-09-neon-extload.ll | 102 ++++++ test/CodeGen/ARM/2012-08-13-bfi.ll | 17 + test/CodeGen/ARM/addrmode.ll | 2 +- test/CodeGen/ARM/aliases.ll | 2 +- test/CodeGen/ARM/arm-modifier.ll | 9 + test/CodeGen/ARM/bicZext.ll | 19 + test/CodeGen/ARM/call_nolink.ll | 2 +- test/CodeGen/ARM/cmn.ll | 22 ++ test/CodeGen/ARM/coalesce-subregs.ll | 68 ++++ test/CodeGen/ARM/crash-greedy.ll | 46 +++ test/CodeGen/ARM/cse-libcalls.ll | 2 +- test/CodeGen/ARM/data-in-code-annotations.ll | 42 +++ test/CodeGen/ARM/debug-info-branch-folding.ll | 13 +- test/CodeGen/ARM/divmod.ll | 16 +- test/CodeGen/ARM/fabss.ll | 10 +- .../CodeGen/ARM/fast-isel-call-multi-reg-return.ll | 17 + test/CodeGen/ARM/fast-isel-call.ll | 95 +++++ test/CodeGen/ARM/fast-isel-frameaddr.ll | 100 ++++++ test/CodeGen/ARM/fast-isel-intrinsic.ll | 32 ++ test/CodeGen/ARM/fast-isel-shifter.ll | 50 +++ test/CodeGen/ARM/fast-isel.ll | 12 + test/CodeGen/ARM/fcopysign.ll | 6 +- test/CodeGen/ARM/floorf.ll | 29 ++ test/CodeGen/ARM/fmuls.ll | 9 + test/CodeGen/ARM/fparith.ll | 6 +- test/CodeGen/ARM/fusedMAC.ll | 47 ++- test/CodeGen/ARM/iabs.ll | 20 +- test/CodeGen/ARM/ldrd.ll | 5 +- test/CodeGen/ARM/lsr-scale-addr-mode.ll | 2 +- test/CodeGen/ARM/movt-movw-global.ll | 8 +- test/CodeGen/ARM/neon_div.ll | 6 +- test/CodeGen/ARM/opt-shuff-tstore.ll | 2 +- test/CodeGen/ARM/pr13249.ll | 27 ++ test/CodeGen/ARM/select.ll | 26 ++ test/CodeGen/ARM/smml.ll | 13 + test/CodeGen/ARM/str_pre-2.ll | 9 +- test/CodeGen/ARM/str_pre.ll | 2 +- test/CodeGen/ARM/struct_byval.ll | 46 +++ test/CodeGen/ARM/sub-cmp-peephole.ll | 65 ++++ test/CodeGen/ARM/sub.ll | 12 + test/CodeGen/ARM/thread_pointer.ll | 2 +- test/CodeGen/ARM/thumb2-it-block.ll | 4 +- test/CodeGen/ARM/tls-models.ll | 117 +++++++ test/CodeGen/ARM/tls1.ll | 6 +- test/CodeGen/ARM/tls3.ll | 2 +- test/CodeGen/ARM/twoaddrinstr.ll | 21 ++ test/CodeGen/ARM/unsafe-fsub.ll | 18 + test/CodeGen/ARM/vcnt.ll | 49 +-- test/CodeGen/ARM/vector-extend-narrow.ll | 8 +- test/CodeGen/ARM/vfp.ll | 8 +- test/CodeGen/ARM/vlddup.ll | 32 +- test/CodeGen/ARM/vmul.ll | 74 ++++ test/CodeGen/ARM/vst3.ll | 2 +- test/CodeGen/CPP/2007-06-16-Funcname.ll | 1 + test/CodeGen/CellSPU/fcmp32.ll | 6 +- test/CodeGen/CellSPU/fneg-fabs.ll | 4 +- test/CodeGen/CellSPU/icmp16.ll | 246 ++++++++++++- test/CodeGen/CellSPU/icmp32.ll | 247 ++++++++++++- test/CodeGen/CellSPU/icmp8.ll | 180 +++++++++- test/CodeGen/CellSPU/shift_ops.ll | 32 +- test/CodeGen/CellSPU/stores.ll | 6 +- test/CodeGen/CellSPU/trunc.ll | 28 +- test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll | 2 +- .../Generic/2009-06-03-UnreachableSplitPad.ll | 19 - test/CodeGen/Generic/2012-06-08-APIntCrash.ll | 9 + .../Generic/2012-07-15-BuildVectorPromote.ll | 8 + test/CodeGen/Generic/asm-large-immediate.ll | 6 +- test/CodeGen/Generic/donothing.ll | 31 ++ test/CodeGen/Generic/edge-bundles-blockIDs.ll | 2 +- test/CodeGen/Generic/print-after.ll | 6 + test/CodeGen/Generic/print-machineinstrs.ll | 14 + test/CodeGen/Generic/stop-after.ll | 10 + test/CodeGen/Generic/undef-phi.ll | 26 ++ test/CodeGen/Hexagon/args.ll | 3 +- test/CodeGen/Hexagon/combine.ll | 3 +- test/CodeGen/Hexagon/convertdptoint.ll | 26 ++ test/CodeGen/Hexagon/convertdptoll.ll | 27 ++ test/CodeGen/Hexagon/convertsptoint.ll | 26 ++ test/CodeGen/Hexagon/convertsptoll.ll | 27 ++ test/CodeGen/Hexagon/dadd.ll | 19 + test/CodeGen/Hexagon/dmul.ll | 18 + test/CodeGen/Hexagon/double.ll | 3 +- .../CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll | 26 ++ test/CodeGen/Hexagon/dsub.ll | 18 + test/CodeGen/Hexagon/dualstore.ll | 17 + test/CodeGen/Hexagon/fadd.ll | 18 + test/CodeGen/Hexagon/fcmp.ll | 37 ++ test/CodeGen/Hexagon/float.ll | 3 +- test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll | 22 ++ test/CodeGen/Hexagon/fmul.ll | 19 + test/CodeGen/Hexagon/frame.ll | 3 +- test/CodeGen/Hexagon/fsub.ll | 18 + test/CodeGen/Hexagon/fusedandshift.ll | 16 + test/CodeGen/Hexagon/macint.ll | 14 + test/CodeGen/Hexagon/mpy.ll | 3 +- test/CodeGen/Hexagon/newvaluejump.ll | 33 ++ test/CodeGen/Hexagon/newvaluejump2.ll | 30 ++ test/CodeGen/Hexagon/newvaluestore.ll | 22 ++ test/CodeGen/Hexagon/opt-fabs.ll | 15 + test/CodeGen/Hexagon/opt-fneg.ll | 26 ++ test/CodeGen/Hexagon/simpletailcall.ll | 14 + test/CodeGen/Hexagon/static.ll | 9 +- test/CodeGen/Hexagon/struct_args.ll | 6 +- test/CodeGen/Hexagon/struct_args_large.ll | 7 +- test/CodeGen/Hexagon/vaddh.ll | 3 +- test/CodeGen/MSP430/2009-12-21-FrameAddr.ll | 6 +- test/CodeGen/MSP430/Inst8rr.ll | 2 +- test/CodeGen/Mips/2008-07-23-fpcmp.ll | 4 +- test/CodeGen/Mips/2008-07-29-icmp.ll | 2 +- test/CodeGen/Mips/2010-07-20-Switch.ll | 30 +- test/CodeGen/Mips/alloca.ll | 21 +- test/CodeGen/Mips/analyzebranch.ll | 6 +- test/CodeGen/Mips/and1.ll | 17 + test/CodeGen/Mips/asm-large-immediate.ll | 10 + test/CodeGen/Mips/atomic.ll | 34 +- test/CodeGen/Mips/cmov.ll | 38 +- test/CodeGen/Mips/cprestore.ll | 4 +- test/CodeGen/Mips/eh.ll | 2 - test/CodeGen/Mips/fabs.ll | 10 +- test/CodeGen/Mips/fastcc.ll | 253 ++++++++++++++ test/CodeGen/Mips/fp-indexed-ls.ll | 12 +- test/CodeGen/Mips/fp-spill-reload.ll | 39 +++ test/CodeGen/Mips/global-pointer-reg.ll | 4 +- test/CodeGen/Mips/gprestore.ll | 4 +- test/CodeGen/Mips/helloworld.ll | 34 ++ test/CodeGen/Mips/inlineasm-cnstrnt-bad-I-1.ll | 15 + test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll | 16 + test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll | 16 + test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll | 16 + test/CodeGen/Mips/inlineasm-cnstrnt-bad-N.ll | 17 + test/CodeGen/Mips/inlineasm-cnstrnt-bad-O.ll | 16 + test/CodeGen/Mips/inlineasm-cnstrnt-bad-P.ll | 16 + test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll | 44 +++ test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll | 20 ++ test/CodeGen/Mips/inlineasm-operand-code.ll | 153 ++++++++ test/CodeGen/Mips/inlineasm_constraint.ll | 55 +++ test/CodeGen/Mips/inlineasmmemop.ll | 2 +- test/CodeGen/Mips/internalfunc.ll | 8 +- test/CodeGen/Mips/largeimmprinting.ll | 5 +- test/CodeGen/Mips/lb1.ll | 18 + test/CodeGen/Mips/lbu1.ll | 19 + test/CodeGen/Mips/lh1.ll | 18 + test/CodeGen/Mips/lhu1.ll | 19 + test/CodeGen/Mips/load-store-left-right.ll | 29 ++ test/CodeGen/Mips/longbranch.ll | 25 ++ test/CodeGen/Mips/machineverifier.ll | 21 ++ test/CodeGen/Mips/memcpy.ll | 19 + test/CodeGen/Mips/mips64-fp-indexed-ls.ll | 12 +- test/CodeGen/Mips/mips64load-store-left-right.ll | 73 ++++ test/CodeGen/Mips/neg1.ll | 15 + test/CodeGen/Mips/not1.ll | 16 + test/CodeGen/Mips/null.ll | 13 + test/CodeGen/Mips/o32_cc_byval.ll | 60 ++-- test/CodeGen/Mips/o32_cc_vararg.ll | 1 - test/CodeGen/Mips/or1.ll | 17 + test/CodeGen/Mips/ra-allocatable.ll | 288 +++++++++++++++ test/CodeGen/Mips/rdhwr-directives.ll | 15 + test/CodeGen/Mips/return_address.ll | 23 ++ test/CodeGen/Mips/sb1.ll | 20 ++ test/CodeGen/Mips/selectcc.ll | 27 ++ test/CodeGen/Mips/sh1.ll | 20 ++ test/CodeGen/Mips/shift-parts.ll | 29 ++ test/CodeGen/Mips/sitofp-selectcc-opt.ll | 22 ++ test/CodeGen/Mips/sll1.ll | 19 + test/CodeGen/Mips/sll2.ll | 19 + test/CodeGen/Mips/sra1.ll | 15 + test/CodeGen/Mips/sra2.ll | 17 + test/CodeGen/Mips/srl1.ll | 18 + test/CodeGen/Mips/srl2.ll | 20 ++ test/CodeGen/Mips/stacksize.ll | 9 + test/CodeGen/Mips/sub1.ll | 15 + test/CodeGen/Mips/sub2.ll | 17 + test/CodeGen/Mips/swzero.ll | 3 +- test/CodeGen/Mips/tls-alias.ll | 10 + test/CodeGen/Mips/tls-models.ll | 113 ++++++ test/CodeGen/Mips/tls.ll | 18 +- test/CodeGen/Mips/unalignedload.ll | 30 +- test/CodeGen/Mips/xor1.ll | 17 + test/CodeGen/Mips/zeroreg.ll | 6 +- test/CodeGen/NVPTX/annotations.ll | 55 +++ test/CodeGen/NVPTX/arithmetic-fp-sm10.ll | 72 ++++ test/CodeGen/NVPTX/arithmetic-fp-sm20.ll | 72 ++++ test/CodeGen/NVPTX/arithmetic-int.ll | 295 ++++++++++++++++ test/CodeGen/NVPTX/calling-conv.ll | 32 ++ test/CodeGen/NVPTX/compare-int.ll | 389 +++++++++++++++++++++ test/CodeGen/NVPTX/convert-fp.ll | 146 ++++++++ test/CodeGen/NVPTX/convert-int-sm10.ll | 55 +++ test/CodeGen/NVPTX/convert-int-sm20.ll | 64 ++++ test/CodeGen/NVPTX/fma-disable.ll | 24 ++ test/CodeGen/NVPTX/fma.ll | 17 + test/CodeGen/NVPTX/intrinsic-old.ll | 284 +++++++++++++++ test/CodeGen/NVPTX/intrinsics.ll | 21 ++ test/CodeGen/NVPTX/ld-addrspace.ll | 173 +++++++++ test/CodeGen/NVPTX/ld-generic.ll | 63 ++++ test/CodeGen/NVPTX/lit.local.cfg | 5 + test/CodeGen/NVPTX/simple-call.ll | 26 ++ test/CodeGen/NVPTX/st-addrspace.ll | 179 ++++++++++ test/CodeGen/NVPTX/st-generic.ll | 69 ++++ test/CodeGen/PTX/20110926-sitofp.ll | 24 -- test/CodeGen/PTX/add.ll | 71 ---- test/CodeGen/PTX/aggregates.ll | 24 -- test/CodeGen/PTX/bitwise.ll | 24 -- test/CodeGen/PTX/bra.ll | 24 -- test/CodeGen/PTX/cvt.ll | 290 --------------- test/CodeGen/PTX/exit.ll | 14 - test/CodeGen/PTX/fdiv-sm10.ll | 15 - test/CodeGen/PTX/fdiv-sm13.ll | 15 - test/CodeGen/PTX/fneg.ll | 15 - test/CodeGen/PTX/intrinsic.ll | 281 --------------- test/CodeGen/PTX/ld.ll | 382 -------------------- test/CodeGen/PTX/lit.local.cfg | 6 - test/CodeGen/PTX/llvm-intrinsic.ll | 56 --- test/CodeGen/PTX/mad-disabling.ll | 24 -- test/CodeGen/PTX/mad.ll | 17 - test/CodeGen/PTX/mov.ll | 62 ---- test/CodeGen/PTX/mul.ll | 39 --- test/CodeGen/PTX/options.ll | 13 - test/CodeGen/PTX/parameter-order.ll | 8 - test/CodeGen/PTX/printf.ll | 25 -- test/CodeGen/PTX/ret.ll | 7 - test/CodeGen/PTX/selp.ll | 25 -- test/CodeGen/PTX/setp.ll | 206 ----------- test/CodeGen/PTX/shl.ll | 22 -- test/CodeGen/PTX/shr.ll | 43 --- test/CodeGen/PTX/simple-call.ll | 27 -- test/CodeGen/PTX/st.ll | 337 ------------------ test/CodeGen/PTX/stack-object.ll | 19 - test/CodeGen/PTX/sub.ll | 71 ---- .../PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll | 2 +- .../PowerPC/2006-01-11-darwin-fp-argument.ll | 2 +- test/CodeGen/PowerPC/2006-04-05-splat-ish.ll | 2 +- .../PowerPC/2007-04-24-InlineAsm-I-Modifier.ll | 4 +- .../PowerPC/2007-04-30-InlineAsmEarlyClobber.ll | 2 +- test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll | 10 +- .../PowerPC/2007-05-30-dagcombine-miscomp.ll | 2 +- .../PowerPC/2007-10-21-LocalRegAllocAssert.ll | 2 +- .../PowerPC/2007-10-21-LocalRegAllocAssert2.ll | 2 +- .../PowerPC/2008-02-09-LocalRegAllocAssert.ll | 2 +- .../2009-08-17-inline-asm-addr-mode-breakage.ll | 2 +- test/CodeGen/PowerPC/2010-03-09-indirect-call.ll | 6 +- test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll | 4 +- test/CodeGen/PowerPC/Frames-leaf.ll | 32 +- test/CodeGen/PowerPC/Frames-small.ll | 32 +- test/CodeGen/PowerPC/LargeAbsoluteAddr.ll | 6 +- test/CodeGen/PowerPC/a2-fp-basic.ll | 2 +- test/CodeGen/PowerPC/and-imm.ll | 2 +- test/CodeGen/PowerPC/big-endian-actual-args.ll | 4 +- test/CodeGen/PowerPC/big-endian-call-result.ll | 4 +- test/CodeGen/PowerPC/branch-opt.ll | 2 +- test/CodeGen/PowerPC/calls.ll | 6 +- test/CodeGen/PowerPC/coalesce-ext.ll | 17 + test/CodeGen/PowerPC/compare-simm.ll | 2 +- test/CodeGen/PowerPC/constants.ll | 2 +- test/CodeGen/PowerPC/ctrloop-reg.ll | 87 +++++ test/CodeGen/PowerPC/ctrloop-s000.ll | 156 +++++++++ test/CodeGen/PowerPC/ctrloop-sums.ll | 134 +++++++ test/CodeGen/PowerPC/ctrloops.ll | 79 +++++ test/CodeGen/PowerPC/darwin-labels.ll | 2 +- test/CodeGen/PowerPC/fabs.ll | 4 +- test/CodeGen/PowerPC/fma.ll | 4 +- test/CodeGen/PowerPC/fnabs.ll | 2 +- test/CodeGen/PowerPC/fsqrt.ll | 8 +- test/CodeGen/PowerPC/iabs.ll | 4 +- test/CodeGen/PowerPC/isel.ll | 23 ++ test/CodeGen/PowerPC/ispositive.ll | 2 +- test/CodeGen/PowerPC/lbzux.ll | 49 +++ test/CodeGen/PowerPC/long-compare.ll | 4 +- test/CodeGen/PowerPC/lsr-postinc-pos.ll | 2 +- test/CodeGen/PowerPC/mem_update.ll | 4 +- test/CodeGen/PowerPC/no-dead-strip.ll | 2 +- test/CodeGen/PowerPC/ppc440-fp-basic.ll | 2 +- test/CodeGen/PowerPC/ppc64-cyclecounter.ll | 15 + test/CodeGen/PowerPC/retaddr.ll | 2 +- test/CodeGen/PowerPC/rlwimi-commute.ll | 2 +- test/CodeGen/PowerPC/rlwimi3.ll | 4 +- test/CodeGen/PowerPC/seteq-0.ll | 2 +- test/CodeGen/PowerPC/small-arguments.ll | 2 +- test/CodeGen/PowerPC/stack-protector.ll | 4 +- test/CodeGen/PowerPC/stwu-gta.ll | 22 ++ test/CodeGen/PowerPC/stwu8.ll | 28 ++ test/CodeGen/PowerPC/stwux.ll | 47 +++ test/CodeGen/PowerPC/tls.ll | 16 + test/CodeGen/PowerPC/trampoline.ll | 2 +- test/CodeGen/PowerPC/vec_buildvector_loadstore.ll | 2 +- test/CodeGen/SPARC/2012-05-01-LowerArguments.ll | 13 + test/CodeGen/SPARC/private.ll | 12 +- test/CodeGen/Thumb/2012-04-26-M0ISelBug.ll | 12 + test/CodeGen/Thumb/asmprinter-bug.ll | 2 +- test/CodeGen/Thumb/frame_thumb.ll | 4 +- test/CodeGen/Thumb/iabs.ll | 4 +- .../Thumb2/2010-01-06-TailDuplicateLabels.ll | 2 +- test/CodeGen/Thumb2/constant-islands.ll | 4 +- test/CodeGen/Thumb2/inflate-regs.ll | 49 +++ test/CodeGen/Thumb2/inlineasm.ll | 9 + test/CodeGen/Thumb2/large-call.ll | 9 +- test/CodeGen/Thumb2/thumb2-cmn.ll | 32 +- test/CodeGen/Thumb2/thumb2-cmp.ll | 18 +- test/CodeGen/Thumb2/thumb2-cmp2.ll | 18 +- test/CodeGen/Thumb2/thumb2-jtb.ll | 8 +- test/CodeGen/Thumb2/thumb2-ldr_post.ll | 2 +- test/CodeGen/Thumb2/thumb2-ldr_pre.ll | 4 +- test/CodeGen/Thumb2/thumb2-rev16.ll | 2 +- test/CodeGen/Thumb2/thumb2-ror.ll | 6 +- test/CodeGen/Thumb2/thumb2-tbb.ll | 4 +- test/CodeGen/Thumb2/thumb2-teq.ll | 16 +- test/CodeGen/Thumb2/thumb2-teq2.ll | 18 +- test/CodeGen/Thumb2/thumb2-tst.ll | 16 +- test/CodeGen/Thumb2/thumb2-tst2.ll | 18 +- test/CodeGen/Thumb2/thumb2-uxt_rot.ll | 21 +- test/CodeGen/Thumb2/tls1.ll | 6 +- test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll | 2 +- test/CodeGen/X86/2003-11-03-GlobalBool.ll | 2 +- test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll | 6 +- test/CodeGen/X86/2004-03-30-Select-Max.ll | 3 +- test/CodeGen/X86/2006-03-01-InstrSchedBug.ll | 2 +- test/CodeGen/X86/2006-03-02-InstrSchedBug.ll | 2 +- test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll | 4 +- test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll | 4 +- test/CodeGen/X86/2006-05-02-InstrSched1.ll | 2 +- test/CodeGen/X86/2006-05-02-InstrSched2.ll | 2 +- test/CodeGen/X86/2006-05-08-InstrSched.ll | 2 +- test/CodeGen/X86/2006-05-11-InstrSched.ll | 4 +- test/CodeGen/X86/2006-07-31-SingleRegClass.ll | 4 +- test/CodeGen/X86/2006-08-21-ExtraMovInst.ll | 2 +- test/CodeGen/X86/2006-11-12-CSRetCC.ll | 4 +- test/CodeGen/X86/2006-11-17-IllegalMove.ll | 4 +- test/CodeGen/X86/2007-01-13-StackPtrIndex.ll | 2 +- test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll | 2 +- test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll | 2 +- .../X86/2007-04-27-InlineAsm-IntMemInput.ll | 2 +- test/CodeGen/X86/2007-05-07-InvokeSRet.ll | 2 +- test/CodeGen/X86/2007-08-10-SignExtSubreg.ll | 2 +- test/CodeGen/X86/2007-09-05-InvalidAsm.ll | 3 +- .../X86/2007-11-04-rip-immediate-constant.ll | 2 +- test/CodeGen/X86/2007-12-18-LoadCSEBug.ll | 2 +- test/CodeGen/X86/2008-01-08-SchedulerCrash.ll | 6 +- test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll | 2 +- test/CodeGen/X86/2008-02-18-TailMergingBug.ll | 2 +- test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll | 4 +- test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll | 2 +- test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll | 2 +- test/CodeGen/X86/2008-04-16-ReMatBug.ll | 2 +- test/CodeGen/X86/2008-04-17-CoalescerBug.ll | 2 +- test/CodeGen/X86/2008-04-28-CoalescerBug.ll | 6 +- test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll | 2 +- test/CodeGen/X86/2008-08-06-CmpStride.ll | 2 +- test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll | 18 - test/CodeGen/X86/2008-08-31-EH_RETURN32.ll | 27 +- test/CodeGen/X86/2008-09-17-inline-asm-1.ll | 2 +- test/CodeGen/X86/2008-09-18-inline-asm-2.ll | 2 +- test/CodeGen/X86/2008-10-24-FlippedCompare.ll | 2 +- test/CodeGen/X86/2008-10-27-CoalescerBug.ll | 5 +- test/CodeGen/X86/2008-12-23-crazy-address.ll | 2 +- test/CodeGen/X86/2009-01-31-BigShift2.ll | 2 +- test/CodeGen/X86/2009-02-25-CommuteBug.ll | 2 +- test/CodeGen/X86/2009-02-26-MachineLICMBug.ll | 4 +- test/CodeGen/X86/2009-03-12-CPAlignBug.ll | 2 +- test/CodeGen/X86/2009-03-23-MultiUseSched.ll | 4 +- test/CodeGen/X86/2009-04-16-SpillerUnfold.ll | 2 +- test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll | 2 +- test/CodeGen/X86/2009-04-24.ll | 6 +- .../CodeGen/X86/2009-04-29-IndirectDestOperands.ll | 2 +- test/CodeGen/X86/2009-05-30-ISelBug.ll | 2 +- test/CodeGen/X86/20090313-signext.ll | 4 +- test/CodeGen/X86/2010-01-19-OptExtBug.ll | 2 +- .../X86/2010-05-06-LocalInlineAsmClobber.ll | 2 +- test/CodeGen/X86/2010-05-12-FastAllocKills.ll | 2 +- .../X86/2010-06-15-FastAllocEarlyCLobber.ll | 2 +- test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll | 4 +- test/CodeGen/X86/2011-04-19-sclr-bb.ll | 21 ++ test/CodeGen/X86/2011-06-03-x87chain.ll | 2 +- test/CodeGen/X86/2011-06-12-FastAllocSpill.ll | 2 +- test/CodeGen/X86/2011-09-18-sse2cmp.ll | 2 +- test/CodeGen/X86/2011-09-21-setcc-bug.ll | 2 +- test/CodeGen/X86/2011-10-11-srl.ll | 2 +- test/CodeGen/X86/2011-12-15-vec_shift.ll | 4 +- test/CodeGen/X86/2012-02-20-MachineCPBug.ll | 2 +- test/CodeGen/X86/2012-03-26-PostRALICMBug.ll | 4 +- test/CodeGen/X86/2012-04-26-sdglue.ll | 3 +- test/CodeGen/X86/2012-05-17-TwoAddressBug.ll | 16 + test/CodeGen/X86/2012-05-19-CoalescerCrash.ll | 122 +++++++ test/CodeGen/X86/2012-05-19-avx2-store.ll | 13 + test/CodeGen/X86/2012-07-10-extload64.ll | 32 ++ test/CodeGen/X86/2012-07-10-shufnorm.ll | 17 + test/CodeGen/X86/2012-07-15-broadcastfold.ll | 23 ++ test/CodeGen/X86/2012-07-15-tconst_shl.ll | 9 + test/CodeGen/X86/2012-07-15-vshl.ll | 31 ++ test/CodeGen/X86/2012-07-16-LeaUndef.ll | 16 + test/CodeGen/X86/2012-07-16-fp2ui-i1.ll | 12 + test/CodeGen/X86/2012-07-17-vtrunc.ll | 16 + test/CodeGen/X86/2012-07-23-select_cc.ll | 19 + test/CodeGen/X86/2012-08-07-CmpISelBug.ll | 36 ++ test/CodeGen/X86/4char-promote.ll | 9 +- test/CodeGen/X86/MachineSink-PHIUse.ll | 2 +- test/CodeGen/X86/add.ll | 10 +- test/CodeGen/X86/addr-label-difference.ll | 2 +- test/CodeGen/X86/aligned-comm.ll | 4 +- test/CodeGen/X86/alignment-2.ll | 4 +- test/CodeGen/X86/alloca-align-rounding-32.ll | 7 +- test/CodeGen/X86/alloca-align-rounding.ll | 7 +- test/CodeGen/X86/andimm8.ll | 2 +- test/CodeGen/X86/asm-reg-type-mismatch.ll | 31 ++ test/CodeGen/X86/atom-lea-sp.ll | 26 +- test/CodeGen/X86/atom-sched.ll | 3 - test/CodeGen/X86/atomic_op.ll | 2 +- test/CodeGen/X86/avx-blend.ll | 2 +- test/CodeGen/X86/avx-intrinsics-x86.ll | 57 ++- test/CodeGen/X86/avx-minmax.ll | 2 +- test/CodeGen/X86/avx-shuffle-x86_32.ll | 2 +- test/CodeGen/X86/avx-shuffle.ll | 62 +++- test/CodeGen/X86/avx-vbroadcast.ll | 29 ++ test/CodeGen/X86/avx2-conversions.ll | 68 ++++ test/CodeGen/X86/avx2-intrinsics-x86.ll | 179 ++++++++++ test/CodeGen/X86/avx2-shuffle.ll | 28 ++ test/CodeGen/X86/avx2-vbroadcast.ll | 178 +++++++++- test/CodeGen/X86/basic-promote-integers.ll | 4 +- test/CodeGen/X86/bigstructret.ll | 29 +- test/CodeGen/X86/blend-msb.ll | 2 +- test/CodeGen/X86/block-placement.ll | 10 +- test/CodeGen/X86/bool-simplify.ll | 42 +++ test/CodeGen/X86/br-fold.ll | 2 +- test/CodeGen/X86/break-anti-dependencies.ll | 14 +- test/CodeGen/X86/break-sse-dep.ll | 7 +- test/CodeGen/X86/call-imm.ll | 8 +- test/CodeGen/X86/cfstring.ll | 2 +- test/CodeGen/X86/cmov-into-branch.ll | 63 ++++ test/CodeGen/X86/cmov.ll | 10 +- test/CodeGen/X86/cmp.ll | 61 ++++ test/CodeGen/X86/coalesce-esp.ll | 2 +- test/CodeGen/X86/coalescer-commute2.ll | 13 +- test/CodeGen/X86/coalescer-dce2.ll | 118 +++++++ test/CodeGen/X86/coalescer-identity.ll | 82 +++++ test/CodeGen/X86/constant-pool-sharing.ll | 4 +- test/CodeGen/X86/constructor.ll | 27 ++ test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll | 4 +- test/CodeGen/X86/crash.ll | 55 ++- test/CodeGen/X86/ctpop-combine.ll | 2 +- test/CodeGen/X86/dagcombine-cse.ll | 2 +- test/CodeGen/X86/dbg-merge-loc-entry.ll | 2 +- test/CodeGen/X86/dbg-value-range.ll | 1 - test/CodeGen/X86/divide-by-constant.ll | 21 ++ test/CodeGen/X86/dynamic-allocas-VLAs.ll | 237 +++++++++++++ test/CodeGen/X86/early-ifcvt.ll | 69 ++++ test/CodeGen/X86/epilogue.ll | 6 +- test/CodeGen/X86/extractps.ll | 4 +- test/CodeGen/X86/fabs.ll | 40 ++- test/CodeGen/X86/fast-cc-merge-stack-adj.ll | 2 +- test/CodeGen/X86/fast-isel-constpool.ll | 2 +- test/CodeGen/X86/fast-isel-gv.ll | 2 +- test/CodeGen/X86/fast-isel-mem.ll | 14 +- test/CodeGen/X86/fast-isel-x86.ll | 14 + test/CodeGen/X86/fast-isel.ll | 12 +- test/CodeGen/X86/fastcc-byval.ll | 2 +- test/CodeGen/X86/fma.ll | 12 +- test/CodeGen/X86/fma3-intrinsics.ll | 132 +++++++ test/CodeGen/X86/fma4-intrinsics-x86_64.ll | 224 ++++++------ test/CodeGen/X86/fma_patterns.ll | 139 ++++++++ test/CodeGen/X86/fold-load.ll | 26 ++ test/CodeGen/X86/fold-pcmpeqd-1.ll | 13 +- test/CodeGen/X86/force-align-stack-alloca.ll | 70 ++++ test/CodeGen/X86/fp-immediate-shorten.ll | 2 +- test/CodeGen/X86/fp-in-intregs.ll | 2 +- test/CodeGen/X86/fp-stack-compare-cmov.ll | 12 + test/CodeGen/X86/fp-stack-compare.ll | 7 +- test/CodeGen/X86/fp-stack-ret.ll | 2 +- test/CodeGen/X86/fp_load_fold.ll | 2 +- test/CodeGen/X86/full-lsr.ll | 16 +- test/CodeGen/X86/gather-addresses.ll | 4 +- test/CodeGen/X86/gs-fold.ll | 20 ++ test/CodeGen/X86/h-register-addressing-32.ll | 2 +- test/CodeGen/X86/h-register-addressing-64.ll | 2 +- test/CodeGen/X86/h-registers-1.ll | 4 +- test/CodeGen/X86/hoist-invariant-load.ll | 2 +- test/CodeGen/X86/iabs.ll | 16 +- test/CodeGen/X86/illegal-vector-args-return.ll | 8 +- test/CodeGen/X86/inline-asm-error.ll | 2 +- test/CodeGen/X86/inline-asm-modifier-n.ll | 2 +- test/CodeGen/X86/inline-asm.ll | 9 + test/CodeGen/X86/inreg.ll | 46 +++ test/CodeGen/X86/isel-sink2.ll | 2 +- test/CodeGen/X86/ispositive.ll | 2 +- test/CodeGen/X86/jump_sign.ll | 221 ++++++++++++ test/CodeGen/X86/label-redefinition.ll | 2 +- test/CodeGen/X86/large-global.ll | 11 + test/CodeGen/X86/lea-2.ll | 2 +- test/CodeGen/X86/liveness-local-regalloc.ll | 34 +- test/CodeGen/X86/loop-blocks.ll | 4 +- test/CodeGen/X86/lsr-loop-exit-cond.ll | 17 +- test/CodeGen/X86/lsr-reuse-trunc.ll | 4 +- test/CodeGen/X86/lsr-static-addr.ll | 12 +- test/CodeGen/X86/machine-cse.ll | 57 +++ test/CodeGen/X86/mem-promote-integers.ll | 4 +- test/CodeGen/X86/memcmp.ll | 3 + test/CodeGen/X86/mmx-punpckhdq.ll | 2 +- test/CodeGen/X86/movgs.ll | 16 + test/CodeGen/X86/multiple-loop-post-inc.ll | 10 +- test/CodeGen/X86/neg_cmp.ll | 22 ++ test/CodeGen/X86/opt-shuff-tstore.ll | 2 +- test/CodeGen/X86/overlap-shift.ll | 2 +- test/CodeGen/X86/pass-three.ll | 16 + test/CodeGen/X86/peep-vector-extract-insert.ll | 2 +- test/CodeGen/X86/phi-immediate-factoring.ll | 2 +- test/CodeGen/X86/phielim-split.ll | 30 ++ test/CodeGen/X86/phys-reg-local-regalloc.ll | 20 +- test/CodeGen/X86/phys_subreg_coalesce-3.ll | 6 +- test/CodeGen/X86/pmul.ll | 4 +- test/CodeGen/X86/pointer-vector.ll | 3 +- test/CodeGen/X86/pr11415.ll | 2 +- test/CodeGen/X86/pr11468.ll | 33 ++ test/CodeGen/X86/pr12889.ll | 18 + test/CodeGen/X86/pr13209.ll | 74 ++++ test/CodeGen/X86/pr13220.ll | 20 ++ test/CodeGen/X86/pr13577.ll | 8 + test/CodeGen/X86/pr2656.ll | 2 +- test/CodeGen/X86/pr3522.ll | 2 +- test/CodeGen/X86/promote-trunc.ll | 2 +- test/CodeGen/X86/rd-mod-wr-eflags.ll | 46 +++ test/CodeGen/X86/rdrand.ll | 85 +++++ test/CodeGen/X86/regpressure.ll | 4 +- test/CodeGen/X86/remat-fold-load.ll | 143 ++++++++ test/CodeGen/X86/remat-scalar-zero.ll | 2 +- test/CodeGen/X86/reverse_branches.ll | 104 ++++++ test/CodeGen/X86/rotate.ll | 2 +- test/CodeGen/X86/rounding-ops.ll | 4 +- test/CodeGen/X86/segmented-stacks-dynamic.ll | 12 +- test/CodeGen/X86/select.ll | 132 ++++++- test/CodeGen/X86/selectiondag-cse.ll | 69 ++++ test/CodeGen/X86/sext-setcc-self.ll | 55 +++ test/CodeGen/X86/shift-and.ll | 46 ++- test/CodeGen/X86/shift-coalesce.ll | 4 +- test/CodeGen/X86/shift-double.ll | 2 +- test/CodeGen/X86/shift-folding.ll | 2 +- test/CodeGen/X86/shl_elim.ll | 6 +- test/CodeGen/X86/sincos.ll | 26 +- test/CodeGen/X86/sink-hoist.ll | 2 +- test/CodeGen/X86/sink-out-of-loop.ll | 54 +++ test/CodeGen/X86/splat-scalar-load.ll | 2 +- test/CodeGen/X86/sse-align-12.ll | 2 +- test/CodeGen/X86/sse-domains.ll | 2 +- test/CodeGen/X86/sse-minmax.ll | 285 ++++++++------- test/CodeGen/X86/sse3.ll | 7 +- test/CodeGen/X86/sse41-blend.ll | 2 +- test/CodeGen/X86/sse41.ll | 4 +- test/CodeGen/X86/sse4a.ll | 56 +++ test/CodeGen/X86/sse_reload_fold.ll | 2 +- test/CodeGen/X86/stack-align.ll | 4 +- test/CodeGen/X86/stack-protector-linux.ll | 28 -- test/CodeGen/X86/stack-protector.ll | 28 ++ test/CodeGen/X86/store_op_load_fold2.ll | 4 +- test/CodeGen/X86/subreg-to-reg-1.ll | 2 +- test/CodeGen/X86/subreg-to-reg-4.ll | 2 +- test/CodeGen/X86/switch-order-weight.ll | 37 ++ test/CodeGen/X86/tailcall-64.ll | 96 +++++ test/CodeGen/X86/tailcall-cgp-dup.ll | 87 +++++ test/CodeGen/X86/tailcall-i1.ll | 6 - test/CodeGen/X86/tailcall-largecode.ll | 10 +- test/CodeGen/X86/tailcall-void.ll | 6 - test/CodeGen/X86/tailcall.ll | 52 +++ test/CodeGen/X86/tailcall1.ll | 40 --- test/CodeGen/X86/tailcallbyval.ll | 2 +- test/CodeGen/X86/targetLoweringGeneric.ll | 38 ++ test/CodeGen/X86/thiscall-struct-return.ll | 4 +- test/CodeGen/X86/tls-local-dynamic.ll | 59 ++++ test/CodeGen/X86/tls-models.ll | 166 +++++++++ test/CodeGen/X86/tls-pic.ll | 20 ++ test/CodeGen/X86/tls-pie.ll | 20 +- test/CodeGen/X86/trap.ll | 16 +- test/CodeGen/X86/trunc-ext-ld-st.ll | 2 +- test/CodeGen/X86/twoaddr-coalesce-2.ll | 4 +- test/CodeGen/X86/twoaddr-pass-sink.ll | 2 +- test/CodeGen/X86/uint_to_fp.ll | 2 +- test/CodeGen/X86/umul-with-carry.ll | 2 +- test/CodeGen/X86/unwindraise.ll | 252 +++++++++++++ test/CodeGen/X86/v-binop-widen2.ll | 9 +- test/CodeGen/X86/vec_call.ll | 4 +- test/CodeGen/X86/vec_cast2.ll | 49 +++ test/CodeGen/X86/vec_compare-2.ll | 3 +- test/CodeGen/X86/vec_compare.ll | 2 +- test/CodeGen/X86/vec_ins_extract-1.ll | 2 +- test/CodeGen/X86/vec_insert-6.ll | 4 +- test/CodeGen/X86/vec_set-3.ll | 2 +- test/CodeGen/X86/vec_set-9.ll | 2 +- test/CodeGen/X86/vec_shuffle-16.ll | 4 +- test/CodeGen/X86/vec_shuffle-19.ll | 2 +- test/CodeGen/X86/vec_shuffle-27.ll | 4 +- test/CodeGen/X86/vec_shuffle-35.ll | 4 +- test/CodeGen/X86/vec_shuffle-36.ll | 2 +- test/CodeGen/X86/vec_shuffle-37.ll | 4 +- test/CodeGen/X86/vec_shuffle-38.ll | 2 +- test/CodeGen/X86/vec_shuffle-39.ll | 2 +- test/CodeGen/X86/vec_splat-2.ll | 2 +- test/CodeGen/X86/vec_splat-3.ll | 2 +- test/CodeGen/X86/vec_splat-4.ll | 2 +- test/CodeGen/X86/vec_splat.ll | 4 +- test/CodeGen/X86/vec_ss_load_fold.ll | 14 + test/CodeGen/X86/vshift-1.ll | 4 +- test/CodeGen/X86/vshift-2.ll | 6 +- test/CodeGen/X86/vshift-3.ll | 4 +- test/CodeGen/X86/vshift-5.ll | 8 +- test/CodeGen/X86/widen_arith-3.ll | 1 - test/CodeGen/X86/widen_cast-1.ll | 13 +- test/CodeGen/X86/widen_cast-2.ll | 2 +- test/CodeGen/X86/widen_cast-5.ll | 3 +- test/CodeGen/X86/widen_conv-4.ll | 2 +- test/CodeGen/X86/widen_extract-1.ll | 2 +- test/CodeGen/X86/widen_load-0.ll | 14 +- test/CodeGen/X86/win64_alloca_dynalloca.ll | 15 +- test/CodeGen/X86/x86-64-arg.ll | 2 +- test/CodeGen/X86/x86-64-dead-stack-adjust.ll | 4 +- test/CodeGen/X86/x86-64-pic-1.ll | 2 +- test/CodeGen/X86/x86-64-pic-10.ll | 2 +- test/CodeGen/X86/x86-64-pic-11.ll | 2 +- test/CodeGen/X86/x86-64-pic-2.ll | 4 +- test/CodeGen/X86/x86-64-pic-3.ll | 4 +- test/CodeGen/X86/x86-64-pic-4.ll | 2 +- test/CodeGen/X86/x86-64-pic-5.ll | 2 +- test/CodeGen/X86/x86-64-pic-6.ll | 2 +- test/CodeGen/X86/x86-64-pic-7.ll | 2 +- test/CodeGen/X86/x86-64-pic-8.ll | 2 +- test/CodeGen/X86/x86-64-pic-9.ll | 2 +- test/CodeGen/X86/xop-intrinsics-x86_64.ll | 80 ++++- test/CodeGen/X86/xor.ll | 8 +- test/CodeGen/XCore/mkmsk.ll | 11 + 637 files changed, 13409 insertions(+), 3576 deletions(-) create mode 100644 test/CodeGen/ARM/2012-04-24-SplitEHCriticalEdge.ll create mode 100644 test/CodeGen/ARM/2012-05-29-TailDupBug.ll create mode 100644 test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll create mode 100644 test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll create mode 100644 test/CodeGen/ARM/2012-08-08-legalize-unaligned.ll create mode 100644 test/CodeGen/ARM/2012-08-09-neon-extload.ll create mode 100644 test/CodeGen/ARM/2012-08-13-bfi.ll create mode 100644 test/CodeGen/ARM/bicZext.ll create mode 100644 test/CodeGen/ARM/cmn.ll create mode 100644 test/CodeGen/ARM/coalesce-subregs.ll create mode 100644 test/CodeGen/ARM/data-in-code-annotations.ll create mode 100644 test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll create mode 100644 test/CodeGen/ARM/fast-isel-frameaddr.ll create mode 100644 test/CodeGen/ARM/fast-isel-shifter.ll create mode 100644 test/CodeGen/ARM/floorf.ll create mode 100644 test/CodeGen/ARM/pr13249.ll create mode 100644 test/CodeGen/ARM/smml.ll create mode 100644 test/CodeGen/ARM/struct_byval.ll create mode 100644 test/CodeGen/ARM/sub-cmp-peephole.ll create mode 100644 test/CodeGen/ARM/tls-models.ll create mode 100644 test/CodeGen/ARM/twoaddrinstr.ll create mode 100644 test/CodeGen/ARM/unsafe-fsub.ll delete mode 100644 test/CodeGen/Generic/2009-06-03-UnreachableSplitPad.ll create mode 100644 test/CodeGen/Generic/2012-06-08-APIntCrash.ll create mode 100644 test/CodeGen/Generic/2012-07-15-BuildVectorPromote.ll create mode 100644 test/CodeGen/Generic/donothing.ll create mode 100644 test/CodeGen/Generic/print-after.ll create mode 100644 test/CodeGen/Generic/print-machineinstrs.ll create mode 100644 test/CodeGen/Generic/stop-after.ll create mode 100644 test/CodeGen/Generic/undef-phi.ll create mode 100644 test/CodeGen/Hexagon/convertdptoint.ll create mode 100644 test/CodeGen/Hexagon/convertdptoll.ll create mode 100644 test/CodeGen/Hexagon/convertsptoint.ll create mode 100644 test/CodeGen/Hexagon/convertsptoll.ll create mode 100644 test/CodeGen/Hexagon/dadd.ll create mode 100644 test/CodeGen/Hexagon/dmul.ll create mode 100644 test/CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll create mode 100644 test/CodeGen/Hexagon/dsub.ll create mode 100644 test/CodeGen/Hexagon/dualstore.ll create mode 100644 test/CodeGen/Hexagon/fadd.ll create mode 100644 test/CodeGen/Hexagon/fcmp.ll create mode 100644 test/CodeGen/Hexagon/floatconvert-ieee-rnd-near.ll create mode 100644 test/CodeGen/Hexagon/fmul.ll create mode 100644 test/CodeGen/Hexagon/fsub.ll create mode 100644 test/CodeGen/Hexagon/fusedandshift.ll create mode 100644 test/CodeGen/Hexagon/macint.ll create mode 100644 test/CodeGen/Hexagon/newvaluejump.ll create mode 100644 test/CodeGen/Hexagon/newvaluejump2.ll create mode 100644 test/CodeGen/Hexagon/newvaluestore.ll create mode 100644 test/CodeGen/Hexagon/opt-fabs.ll create mode 100644 test/CodeGen/Hexagon/opt-fneg.ll create mode 100644 test/CodeGen/Hexagon/simpletailcall.ll create mode 100644 test/CodeGen/Mips/and1.ll create mode 100644 test/CodeGen/Mips/asm-large-immediate.ll create mode 100644 test/CodeGen/Mips/fastcc.ll create mode 100644 test/CodeGen/Mips/fp-spill-reload.ll create mode 100644 test/CodeGen/Mips/helloworld.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-I-1.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-K.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-N.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-O.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-bad-P.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll create mode 100644 test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll create mode 100644 test/CodeGen/Mips/inlineasm-operand-code.ll create mode 100644 test/CodeGen/Mips/inlineasm_constraint.ll create mode 100644 test/CodeGen/Mips/lb1.ll create mode 100644 test/CodeGen/Mips/lbu1.ll create mode 100644 test/CodeGen/Mips/lh1.ll create mode 100644 test/CodeGen/Mips/lhu1.ll create mode 100644 test/CodeGen/Mips/load-store-left-right.ll create mode 100644 test/CodeGen/Mips/longbranch.ll create mode 100644 test/CodeGen/Mips/machineverifier.ll create mode 100644 test/CodeGen/Mips/memcpy.ll create mode 100644 test/CodeGen/Mips/mips64load-store-left-right.ll create mode 100644 test/CodeGen/Mips/neg1.ll create mode 100644 test/CodeGen/Mips/not1.ll create mode 100644 test/CodeGen/Mips/null.ll create mode 100644 test/CodeGen/Mips/or1.ll create mode 100644 test/CodeGen/Mips/ra-allocatable.ll create mode 100644 test/CodeGen/Mips/rdhwr-directives.ll create mode 100644 test/CodeGen/Mips/return_address.ll create mode 100644 test/CodeGen/Mips/sb1.ll create mode 100644 test/CodeGen/Mips/selectcc.ll create mode 100644 test/CodeGen/Mips/sh1.ll create mode 100644 test/CodeGen/Mips/shift-parts.ll create mode 100644 test/CodeGen/Mips/sitofp-selectcc-opt.ll create mode 100644 test/CodeGen/Mips/sll1.ll create mode 100644 test/CodeGen/Mips/sll2.ll create mode 100644 test/CodeGen/Mips/sra1.ll create mode 100644 test/CodeGen/Mips/sra2.ll create mode 100644 test/CodeGen/Mips/srl1.ll create mode 100644 test/CodeGen/Mips/srl2.ll create mode 100644 test/CodeGen/Mips/stacksize.ll create mode 100644 test/CodeGen/Mips/sub1.ll create mode 100644 test/CodeGen/Mips/sub2.ll create mode 100644 test/CodeGen/Mips/tls-alias.ll create mode 100644 test/CodeGen/Mips/tls-models.ll create mode 100644 test/CodeGen/Mips/xor1.ll create mode 100644 test/CodeGen/NVPTX/annotations.ll create mode 100644 test/CodeGen/NVPTX/arithmetic-fp-sm10.ll create mode 100644 test/CodeGen/NVPTX/arithmetic-fp-sm20.ll create mode 100644 test/CodeGen/NVPTX/arithmetic-int.ll create mode 100644 test/CodeGen/NVPTX/calling-conv.ll create mode 100644 test/CodeGen/NVPTX/compare-int.ll create mode 100644 test/CodeGen/NVPTX/convert-fp.ll create mode 100644 test/CodeGen/NVPTX/convert-int-sm10.ll create mode 100644 test/CodeGen/NVPTX/convert-int-sm20.ll create mode 100644 test/CodeGen/NVPTX/fma-disable.ll create mode 100644 test/CodeGen/NVPTX/fma.ll create mode 100644 test/CodeGen/NVPTX/intrinsic-old.ll create mode 100644 test/CodeGen/NVPTX/intrinsics.ll create mode 100644 test/CodeGen/NVPTX/ld-addrspace.ll create mode 100644 test/CodeGen/NVPTX/ld-generic.ll create mode 100644 test/CodeGen/NVPTX/lit.local.cfg create mode 100644 test/CodeGen/NVPTX/simple-call.ll create mode 100644 test/CodeGen/NVPTX/st-addrspace.ll create mode 100644 test/CodeGen/NVPTX/st-generic.ll delete mode 100644 test/CodeGen/PTX/20110926-sitofp.ll delete mode 100644 test/CodeGen/PTX/add.ll delete mode 100644 test/CodeGen/PTX/aggregates.ll delete mode 100644 test/CodeGen/PTX/bitwise.ll delete mode 100644 test/CodeGen/PTX/bra.ll delete mode 100644 test/CodeGen/PTX/cvt.ll delete mode 100644 test/CodeGen/PTX/exit.ll delete mode 100644 test/CodeGen/PTX/fdiv-sm10.ll delete mode 100644 test/CodeGen/PTX/fdiv-sm13.ll delete mode 100644 test/CodeGen/PTX/fneg.ll delete mode 100644 test/CodeGen/PTX/intrinsic.ll delete mode 100644 test/CodeGen/PTX/ld.ll delete mode 100644 test/CodeGen/PTX/lit.local.cfg delete mode 100644 test/CodeGen/PTX/llvm-intrinsic.ll delete mode 100644 test/CodeGen/PTX/mad-disabling.ll delete mode 100644 test/CodeGen/PTX/mad.ll delete mode 100644 test/CodeGen/PTX/mov.ll delete mode 100644 test/CodeGen/PTX/mul.ll delete mode 100644 test/CodeGen/PTX/options.ll delete mode 100644 test/CodeGen/PTX/parameter-order.ll delete mode 100644 test/CodeGen/PTX/printf.ll delete mode 100644 test/CodeGen/PTX/ret.ll delete mode 100644 test/CodeGen/PTX/selp.ll delete mode 100644 test/CodeGen/PTX/setp.ll delete mode 100644 test/CodeGen/PTX/shl.ll delete mode 100644 test/CodeGen/PTX/shr.ll delete mode 100644 test/CodeGen/PTX/simple-call.ll delete mode 100644 test/CodeGen/PTX/st.ll delete mode 100644 test/CodeGen/PTX/stack-object.ll delete mode 100644 test/CodeGen/PTX/sub.ll create mode 100644 test/CodeGen/PowerPC/coalesce-ext.ll create mode 100644 test/CodeGen/PowerPC/ctrloop-reg.ll create mode 100644 test/CodeGen/PowerPC/ctrloop-s000.ll create mode 100644 test/CodeGen/PowerPC/ctrloop-sums.ll create mode 100644 test/CodeGen/PowerPC/ctrloops.ll create mode 100644 test/CodeGen/PowerPC/isel.ll create mode 100644 test/CodeGen/PowerPC/lbzux.ll create mode 100644 test/CodeGen/PowerPC/ppc64-cyclecounter.ll create mode 100644 test/CodeGen/PowerPC/stwu-gta.ll create mode 100644 test/CodeGen/PowerPC/stwu8.ll create mode 100644 test/CodeGen/PowerPC/stwux.ll create mode 100644 test/CodeGen/PowerPC/tls.ll create mode 100644 test/CodeGen/SPARC/2012-05-01-LowerArguments.ll create mode 100644 test/CodeGen/Thumb/2012-04-26-M0ISelBug.ll create mode 100644 test/CodeGen/Thumb2/inflate-regs.ll create mode 100644 test/CodeGen/Thumb2/inlineasm.ll delete mode 100644 test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll create mode 100644 test/CodeGen/X86/2011-04-19-sclr-bb.ll create mode 100644 test/CodeGen/X86/2012-05-17-TwoAddressBug.ll create mode 100644 test/CodeGen/X86/2012-05-19-CoalescerCrash.ll create mode 100644 test/CodeGen/X86/2012-05-19-avx2-store.ll create mode 100644 test/CodeGen/X86/2012-07-10-extload64.ll create mode 100644 test/CodeGen/X86/2012-07-10-shufnorm.ll create mode 100644 test/CodeGen/X86/2012-07-15-broadcastfold.ll create mode 100644 test/CodeGen/X86/2012-07-15-tconst_shl.ll create mode 100644 test/CodeGen/X86/2012-07-15-vshl.ll create mode 100644 test/CodeGen/X86/2012-07-16-LeaUndef.ll create mode 100644 test/CodeGen/X86/2012-07-16-fp2ui-i1.ll create mode 100644 test/CodeGen/X86/2012-07-17-vtrunc.ll create mode 100644 test/CodeGen/X86/2012-07-23-select_cc.ll create mode 100644 test/CodeGen/X86/2012-08-07-CmpISelBug.ll create mode 100644 test/CodeGen/X86/asm-reg-type-mismatch.ll create mode 100755 test/CodeGen/X86/avx2-conversions.ll create mode 100644 test/CodeGen/X86/avx2-shuffle.ll create mode 100644 test/CodeGen/X86/bool-simplify.ll create mode 100644 test/CodeGen/X86/cmov-into-branch.ll create mode 100644 test/CodeGen/X86/coalescer-dce2.ll create mode 100644 test/CodeGen/X86/coalescer-identity.ll create mode 100644 test/CodeGen/X86/constructor.ll create mode 100644 test/CodeGen/X86/dynamic-allocas-VLAs.ll create mode 100644 test/CodeGen/X86/early-ifcvt.ll create mode 100755 test/CodeGen/X86/fma3-intrinsics.ll create mode 100644 test/CodeGen/X86/fma_patterns.ll create mode 100644 test/CodeGen/X86/force-align-stack-alloca.ll create mode 100644 test/CodeGen/X86/fp-stack-compare-cmov.ll create mode 100644 test/CodeGen/X86/gs-fold.ll create mode 100644 test/CodeGen/X86/inreg.ll create mode 100644 test/CodeGen/X86/large-global.ll create mode 100644 test/CodeGen/X86/neg_cmp.ll create mode 100644 test/CodeGen/X86/pass-three.ll create mode 100644 test/CodeGen/X86/phielim-split.ll create mode 100644 test/CodeGen/X86/pr11468.ll create mode 100644 test/CodeGen/X86/pr12889.ll create mode 100644 test/CodeGen/X86/pr13209.ll create mode 100644 test/CodeGen/X86/pr13220.ll create mode 100644 test/CodeGen/X86/pr13577.ll create mode 100644 test/CodeGen/X86/rdrand.ll create mode 100644 test/CodeGen/X86/remat-fold-load.ll create mode 100644 test/CodeGen/X86/reverse_branches.ll create mode 100644 test/CodeGen/X86/selectiondag-cse.ll create mode 100644 test/CodeGen/X86/sext-setcc-self.ll create mode 100644 test/CodeGen/X86/sink-out-of-loop.ll create mode 100644 test/CodeGen/X86/sse4a.ll delete mode 100644 test/CodeGen/X86/stack-protector-linux.ll create mode 100644 test/CodeGen/X86/stack-protector.ll create mode 100644 test/CodeGen/X86/switch-order-weight.ll create mode 100644 test/CodeGen/X86/tailcall-64.ll create mode 100644 test/CodeGen/X86/tailcall-cgp-dup.ll delete mode 100644 test/CodeGen/X86/tailcall-i1.ll delete mode 100644 test/CodeGen/X86/tailcall-void.ll create mode 100644 test/CodeGen/X86/tailcall.ll delete mode 100644 test/CodeGen/X86/tailcall1.ll create mode 100644 test/CodeGen/X86/targetLoweringGeneric.ll create mode 100644 test/CodeGen/X86/tls-local-dynamic.ll create mode 100644 test/CodeGen/X86/tls-models.ll create mode 100644 test/CodeGen/X86/unwindraise.ll create mode 100644 test/CodeGen/X86/vec_cast2.ll create mode 100644 test/CodeGen/XCore/mkmsk.ll (limited to 'test/CodeGen') diff --git a/test/CodeGen/ARM/2007-03-13-InstrSched.ll b/test/CodeGen/ARM/2007-03-13-InstrSched.ll index 33f935e..a63cdd4 100644 --- a/test/CodeGen/ARM/2007-03-13-InstrSched.ll +++ b/test/CodeGen/ARM/2007-03-13-InstrSched.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \ ; RUN: -mattr=+v6 | grep r9 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \ -; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats |& grep asm-printer +; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats 2>&1 | grep asm-printer ; | grep 35 define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) { diff --git a/test/CodeGen/ARM/2007-04-03-PEIBug.ll b/test/CodeGen/ARM/2007-04-03-PEIBug.ll index b543c57..8d3337c 100644 --- a/test/CodeGen/ARM/2007-04-03-PEIBug.ll +++ b/test/CodeGen/ARM/2007-04-03-PEIBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | not grep {add.*#0} +; RUN: llc < %s -march=arm | not grep "add.*#0" define i32 @foo() { entry: diff --git a/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll index d2eb85d..670048b 100644 --- a/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll +++ b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | not grep {str.*\\!} +; RUN: llc < %s -march=arm | not grep "str.*\!" %struct.shape_edge_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32 } %struct.shape_path_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll b/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll index fd2f462..3754db0 100644 --- a/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll +++ b/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=fast +; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=fast -optimize-regalloc=0 ; PR1925 %struct.encode_aux_nearestmatch = type { i32*, i32*, i32*, i32*, i32, i32 } diff --git a/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll b/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll index 44da8e7..5fbed0d 100644 --- a/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll +++ b/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=fast +; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=fast -optimize-regalloc=0 ; PR1925 %"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" } diff --git a/test/CodeGen/ARM/2009-04-06-AsmModifier.ll b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll index 3526722..7342f69 100644 --- a/test/CodeGen/ARM/2009-04-06-AsmModifier.ll +++ b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | grep {swi 107} +; RUN: llc < %s -march=arm | grep "swi 107" define i32 @_swilseek(i32) nounwind { entry: diff --git a/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll b/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll index 813bf3c..7d4cc6e 100644 --- a/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll +++ b/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -regalloc=fast -verify-machineinstrs +; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs target triple = "arm-pc-linux-gnu" ; This test case would accidentally use the same physreg for two virtregs diff --git a/test/CodeGen/ARM/2011-12-14-machine-sink.ll b/test/CodeGen/ARM/2011-12-14-machine-sink.ll index 5ce600d..b21bb00 100644 --- a/test/CodeGen/ARM/2011-12-14-machine-sink.ll +++ b/test/CodeGen/ARM/2011-12-14-machine-sink.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -o /dev/null -stats |& FileCheck %s -check-prefix=STATS +; RUN: llc < %s -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS ; Radar 10266272 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" target triple = "thumbv7-apple-ios4.0.0" diff --git a/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll b/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll index 872eca3..f1c85f1 100644 --- a/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll +++ b/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll @@ -60,8 +60,16 @@ for.end: ; preds = %entry ret void } +; Check that pseudo-expansion preserves flags. +define void @foo3(i8* %p) nounwind ssp { +entry: + tail call void @llvm.arm.neon.vst2.v4f32(i8* %p, <4 x float> undef, <4 x float> undef, i32 4) + ret void +} + declare arm_aapcs_vfpcc void @bar(i8*, float, float, float) declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind +declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind !0 = metadata !{metadata !"omnipotent char", metadata !1} !1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/2012-04-24-SplitEHCriticalEdge.ll b/test/CodeGen/ARM/2012-04-24-SplitEHCriticalEdge.ll new file mode 100644 index 0000000..b3a7e34 --- /dev/null +++ b/test/CodeGen/ARM/2012-04-24-SplitEHCriticalEdge.ll @@ -0,0 +1,71 @@ +; RUN: llc -mtriple=thumbv7-apple-ios -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 < %s + +; CodeGen SplitCriticalEdge() shouldn't try to break edge to a landing pad. +; rdar://11300144 + +%0 = type opaque +%class.FunctionInterpreter.3.15.31 = type { %class.Parser.1.13.29, %class.Parser.1.13.29*, %struct.ParserVariable.2.14.30*, i32 } +%class.Parser.1.13.29 = type { i32 (...)**, %class.Parser.1.13.29* } +%struct.ParserVariable.2.14.30 = type opaque +%struct.ParseErrorMsg.0.12.28 = type { i32, i32, i32 } + +@_ZTI13ParseErrorMsg = external hidden unnamed_addr constant { i8*, i8* } +@"OBJC_IVAR_$_MUMathExpressionDoubleBased.mInterpreter" = external hidden global i32, section "__DATA, __objc_ivar", align 4 +@"\01L_OBJC_SELECTOR_REFERENCES_14" = external hidden global i8*, section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip" + +declare i8* @objc_msgSend(i8*, i8*, ...) + +declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone + +declare i8* @__cxa_begin_catch(i8*) + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + +declare void @__cxa_end_catch() + +declare void @_ZSt9terminatev() + +define hidden double @t(%0* %self, i8* nocapture %_cmd) optsize ssp { +entry: + %call = invoke double undef(%class.FunctionInterpreter.3.15.31* undef) optsize + to label %try.cont unwind label %lpad + +lpad: ; preds = %entry + %0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*) + catch i8* bitcast ({ i8*, i8* }* @_ZTI13ParseErrorMsg to i8*) + br i1 undef, label %catch, label %eh.resume + +catch: ; preds = %lpad + invoke void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.ParseErrorMsg.0.12.28*)*)(i8* undef, i8* undef, %struct.ParseErrorMsg.0.12.28* undef) optsize + to label %invoke.cont2 unwind label %lpad1 + +invoke.cont2: ; preds = %catch + br label %try.cont + +try.cont: ; preds = %invoke.cont2, %entry + %value.0 = phi double [ 0x7FF8000000000000, %invoke.cont2 ], [ %call, %entry ] + ret double %value.0 + +lpad1: ; preds = %catch + %1 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*) + cleanup + invoke void @__cxa_end_catch() + to label %eh.resume unwind label %terminate.lpad + +eh.resume: ; preds = %lpad1, %lpad + resume { i8*, i32 } undef + +terminate.lpad: ; preds = %lpad1 + %2 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*) + catch i8* null + unreachable +} + +declare i32 @__gxx_personality_sj0(...) + +!llvm.module.flags = !{!0, !1, !2, !3} + +!0 = metadata !{i32 1, metadata !"Objective-C Version", i32 2} +!1 = metadata !{i32 1, metadata !"Objective-C Image Info Version", i32 0} +!2 = metadata !{i32 1, metadata !"Objective-C Image Info Section", metadata !"__DATA, __objc_imageinfo, regular, no_dead_strip"} +!3 = metadata !{i32 4, metadata !"Objective-C Garbage Collection", i32 0} diff --git a/test/CodeGen/ARM/2012-05-29-TailDupBug.ll b/test/CodeGen/ARM/2012-05-29-TailDupBug.ll new file mode 100644 index 0000000..1a57f04 --- /dev/null +++ b/test/CodeGen/ARM/2012-05-29-TailDupBug.ll @@ -0,0 +1,140 @@ +; RUN: llc -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -verify-machineinstrs < %s + +; Teach taildup to update livein set to appease verifier. +; rdar://11538365 + +%struct.__CFString.2 = type opaque + +declare void @CFRelease(i8*) + +define hidden fastcc i32 @t() ssp { +entry: + %mylocale.i.i = alloca [256 x i8], align 1 + br i1 undef, label %return, label %CFStringIsHyphenationAvailableForLocale.exit + +CFStringIsHyphenationAvailableForLocale.exit: ; preds = %entry + br i1 undef, label %return, label %if.end + +if.end: ; preds = %CFStringIsHyphenationAvailableForLocale.exit + br i1 undef, label %if.end8.thread.i, label %if.then.i + +if.then.i: ; preds = %if.end + br i1 undef, label %if.end8.thread.i, label %if.end8.i + +if.end8.thread.i: ; preds = %if.then.i, %if.end + unreachable + +if.end8.i: ; preds = %if.then.i + br i1 undef, label %if.then11.i, label %__CFHyphenationPullTokenizer.exit + +if.then11.i: ; preds = %if.end8.i + unreachable + +__CFHyphenationPullTokenizer.exit: ; preds = %if.end8.i + br i1 undef, label %if.end68, label %if.then3 + +if.then3: ; preds = %__CFHyphenationPullTokenizer.exit + br i1 undef, label %cond.end, label %cond.false + +cond.false: ; preds = %if.then3 + br label %cond.end + +cond.end: ; preds = %cond.false, %if.then3 + br i1 undef, label %while.end, label %while.body + +while.body: ; preds = %cond.end + unreachable + +while.end: ; preds = %cond.end + br i1 undef, label %if.end5.i, label %if.then.i16 + +if.then.i16: ; preds = %while.end + br i1 undef, label %if.then4.i, label %if.end5.i + +if.then4.i: ; preds = %if.then.i16 + br i1 false, label %cleanup.thread, label %if.end.i20 + +if.end5.i: ; preds = %if.then.i16, %while.end + unreachable + +if.end.i20: ; preds = %if.then4.i + br label %for.body.i146.i + +for.body.i146.i: ; preds = %for.body.i146.i, %if.end.i20 + br i1 undef, label %if.end20.i, label %for.body.i146.i + +if.end20.i: ; preds = %for.body.i146.i + br i1 undef, label %cleanup.thread, label %if.end23.i + +if.end23.i: ; preds = %if.end20.i + br label %for.body.i94.i + +for.body.i94.i: ; preds = %for.body.i94.i, %if.end23.i + br i1 undef, label %if.then28.i, label %for.body.i94.i + +if.then28.i: ; preds = %for.body.i94.i + br i1 undef, label %cond.true.i26, label %land.lhs.true + +cond.true.i26: ; preds = %if.then28.i + br label %land.lhs.true + +land.lhs.true: ; preds = %cond.true.i26, %if.then28.i + br i1 false, label %cleanup.thread, label %if.end35 + +if.end35: ; preds = %land.lhs.true + br i1 undef, label %cleanup.thread, label %if.end45 + +if.end45: ; preds = %if.end35 + br i1 undef, label %if.then50, label %if.end.i37 + +if.end.i37: ; preds = %if.end45 + br label %if.then50 + +if.then50: ; preds = %if.end.i37, %if.end45 + br i1 undef, label %__CFHyphenationGetHyphensForString.exit, label %if.end.i + +if.end.i: ; preds = %if.then50 + br i1 undef, label %cleanup.i, label %cond.true.i + +cond.true.i: ; preds = %if.end.i + br i1 undef, label %for.cond16.preheader.i, label %for.cond57.preheader.i + +for.cond16.preheader.i: ; preds = %cond.true.i + %cmp1791.i = icmp sgt i32 undef, 1 + br i1 %cmp1791.i, label %for.body18.i, label %for.cond57.preheader.i + +for.cond57.preheader.i: ; preds = %for.cond16.preheader.i, %cond.true.i + %sub69.i = add i32 undef, -2 + br label %cleanup.i + +for.body18.i: ; preds = %for.cond16.preheader.i + store i16 0, i16* undef, align 2 + br label %while.body.i + +while.body.i: ; preds = %while.body.i, %for.body18.i + br label %while.body.i + +cleanup.i: ; preds = %for.cond57.preheader.i, %if.end.i + br label %__CFHyphenationGetHyphensForString.exit + +__CFHyphenationGetHyphensForString.exit: ; preds = %cleanup.i, %if.then50 + %retval.1.i = phi i32 [ 0, %cleanup.i ], [ -1, %if.then50 ] + %phitmp = bitcast %struct.__CFString.2* null to i8* + br label %if.end68 + +cleanup.thread: ; preds = %if.end35, %land.lhs.true, %if.end20.i, %if.then4.i + call void @llvm.stackrestore(i8* null) + br label %return + +if.end68: ; preds = %__CFHyphenationGetHyphensForString.exit, %__CFHyphenationPullTokenizer.exit + %hyphenCount.2 = phi i32 [ %retval.1.i, %__CFHyphenationGetHyphensForString.exit ], [ 0, %__CFHyphenationPullTokenizer.exit ] + %_token.1 = phi i8* [ %phitmp, %__CFHyphenationGetHyphensForString.exit ], [ undef, %__CFHyphenationPullTokenizer.exit ] + call void @CFRelease(i8* %_token.1) + br label %return + +return: ; preds = %if.end68, %cleanup.thread, %CFStringIsHyphenationAvailableForLocale.exit, %entry + %retval.1 = phi i32 [ %hyphenCount.2, %if.end68 ], [ -1, %CFStringIsHyphenationAvailableForLocale.exit ], [ -1, %cleanup.thread ], [ -1, %entry ] + ret i32 %retval.1 +} + +declare void @llvm.stackrestore(i8*) nounwind diff --git a/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll b/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll new file mode 100644 index 0000000..b05ec63 --- /dev/null +++ b/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -o /dev/null "-mtriple=thumbv7-apple-ios" -debug-only=post-RA-sched 2> %t +; RUN: FileCheck %s < %t +; REQUIRES: asserts +; Make sure that mayalias store-load dependencies have one cycle +; latency regardless of whether they are barriers or not. + +; CHECK: ** List Scheduling +; CHECK: SU(2){{.*}}STR{{.*}}Volatile +; CHECK-NOT: ch SU +; CHECK: ch SU(3): Latency=1 +; CHECK-NOT: ch SU +; CHECK: SU(3){{.*}}LDR{{.*}}Volatile +; CHECK-NOT: ch SU +; CHECK: ch SU(2): Latency=1 +; CHECK-NOT: ch SU +; CHECK: ** List Scheduling +; CHECK: SU(2){{.*}}STR{{.*}} +; CHECK-NOT: ch SU +; CHECK: ch SU(3): Latency=1 +; CHECK-NOT: ch SU +; CHECK: SU(3){{.*}}LDR{{.*}} +; CHECK-NOT: ch SU +; CHECK: ch SU(2): Latency=1 +; CHECK-NOT: ch SU +define i32 @f1(i32* nocapture %p1, i32* nocapture %p2) nounwind { +entry: + store volatile i32 65540, i32* %p1, align 4, !tbaa !0 + %0 = load volatile i32* %p2, align 4, !tbaa !0 + ret i32 %0 +} + +define i32 @f2(i32* nocapture %p1, i32* nocapture %p2) nounwind { +entry: + store i32 65540, i32* %p1, align 4, !tbaa !0 + %0 = load i32* %p2, align 4, !tbaa !0 + ret i32 %0 +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll b/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll new file mode 100644 index 0000000..e4ad45b --- /dev/null +++ b/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll @@ -0,0 +1,174 @@ +; RUN: llc < %s +; PR13377 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" +target triple = "armv7-none-linux-gnueabi" + +%0 = type { <4 x float> } + +define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable { + br i1 undef, label %4, label %5 + +;