From 721c201bd55ffb73cb2ba8d39e0570fa38c44e15 Mon Sep 17 00:00:00 2001 From: dim Date: Wed, 15 Aug 2012 19:34:23 +0000 Subject: Vendor import of llvm trunk r161861: http://llvm.org/svn/llvm-project/llvm/trunk@161861 --- test/CodeGen/PowerPC/coalesce-ext.ll | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 test/CodeGen/PowerPC/coalesce-ext.ll (limited to 'test/CodeGen/PowerPC/coalesce-ext.ll') diff --git a/test/CodeGen/PowerPC/coalesce-ext.ll b/test/CodeGen/PowerPC/coalesce-ext.ll new file mode 100644 index 0000000..cc80f83 --- /dev/null +++ b/test/CodeGen/PowerPC/coalesce-ext.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=ppc64 -mtriple=powerpc64-apple-darwin < %s | FileCheck %s +; Check that the peephole optimizer knows about sext and zext instructions. +; CHECK: test1sext +define i32 @test1sext(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind { + %C = add i64 %A, %B + ; CHECK: add [[SUM:r[0-9]+]], r3, r4 + %D = trunc i64 %C to i32 + %E = shl i64 %C, 32 + %F = ashr i64 %E, 32 + ; CHECK: extsw [[EXT:r[0-9]+]], [[SUM]] + store volatile i64 %F, i64 *%P2 + ; CHECK: std [[EXT]] + store volatile i32 %D, i32* %P + ; Reuse low bits of extended register, don't extend live range of SUM. + ; CHECK: stw [[EXT]] + ret i32 %D +} -- cgit v1.1