From c4078470d7eefc5dd2cb53c10f0fa44bdd957f5f Mon Sep 17 00:00:00 2001 From: mav Date: Mon, 26 Oct 2009 08:41:10 +0000 Subject: Fix SATA on nVidia MCP55 chipset. It needs some short time to allow BAR(5) memory access. PR: amd64/128686, amd64/132372, amd64/139156 MFC after: 3 days --- sys/dev/ata/chipsets/ata-nvidia.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'sys') diff --git a/sys/dev/ata/chipsets/ata-nvidia.c b/sys/dev/ata/chipsets/ata-nvidia.c index 95be37c..bb76316 100644 --- a/sys/dev/ata/chipsets/ata-nvidia.c +++ b/sys/dev/ata/chipsets/ata-nvidia.c @@ -165,7 +165,8 @@ ata_nvidia_chipinit(device_t dev) /* enable control access */ pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 1) | 0x04,1); - + /* MCP55 seems to need some time to allow r_res2 read. */ + DELAY(10); if (ctlr->chip->cfg1 & NVQ) { /* clear interrupt status */ ATA_OUTL(ctlr->r_res2, offset, 0x00ff00ff); -- cgit v1.1