From 74e82794985a5fd827fa091239a2d850f73ce3c2 Mon Sep 17 00:00:00 2001 From: fsmp Date: Sat, 19 Jul 1997 03:59:28 +0000 Subject: Added #code to support define APIC_PIN0_TIMER. This code ALWAYS runs the 8254 timer thru the 8259 ICU. It depricates the usage of "options SMP_TIMER_NC" in the config file. --- sys/amd64/amd64/tsc.c | 32 ++++++++++++++++++++++++-------- sys/amd64/isa/clock.c | 32 ++++++++++++++++++++++++-------- sys/i386/i386/tsc.c | 32 ++++++++++++++++++++++++-------- sys/i386/isa/apic_ipl.s | 29 +++++++++++++++++++++++++---- sys/i386/isa/clock.c | 32 ++++++++++++++++++++++++-------- sys/isa/atrtc.c | 32 ++++++++++++++++++++++++-------- 6 files changed, 145 insertions(+), 44 deletions(-) (limited to 'sys') diff --git a/sys/amd64/amd64/tsc.c b/sys/amd64/amd64/tsc.c index 426de51..245a696 100644 --- a/sys/amd64/amd64/tsc.c +++ b/sys/amd64/amd64/tsc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.90 1997/07/18 03:59:28 fsmp Exp $ + * $Id: clock.c,v 1.91 1997/07/19 02:28:29 fsmp Exp $ */ /* @@ -66,7 +66,7 @@ #include #ifdef APIC_IO #include -#include /** TEST_ALTTIMER */ +#include /** TEST_ALTTIMER, APIC_PIN0_TIMER */ #endif /* APIC_IO */ #include @@ -874,12 +874,27 @@ cpu_initclocks() /* Finish initializing 8253 timer 0. */ #ifdef APIC_IO -#if 0 -#ifndef IO_ICU1 -#define IO_ICU1 0x20 -#endif /* IO_ICU1 */ -#endif /** 0 */ +#ifdef APIC_PIN0_TIMER + /* + * Allow 8254 timer to INTerrupt 8259: + * re-initialize master 8259: + * reset; prog 4 bytes, single ICU, edge triggered + */ + outb(IO_ICU1, 0x13); + outb(IO_ICU1 + 1, NRSVIDT); /* start vector */ + outb(IO_ICU1 + 1, 0x00); /* ignore slave */ + outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */ + outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */ + + /* program IO APIC for type 3 INT on INT0 */ + if (ext_int_setup(0, 0) < 0) + panic("8254 redirect via APIC pin0 impossible!"); + register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, + /* XXX */ (inthand2_t *)clkintr, &clk_imask, + /* unit */ 0); + INTREN(IRQ0); +#else /* APIC_PIN0_TIMER */ /* 8254 is traditionally on ISA IRQ0 */ if ((x = isa_apic_pin(0)) < 0) { /* bummer, attempt to redirect thru the 8259 */ @@ -917,7 +932,8 @@ cpu_initclocks() /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); INTREN(mask8254); -#else +#endif /* APIC_PIN0_TIMER */ +#else /* APIC_IO */ register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); diff --git a/sys/amd64/isa/clock.c b/sys/amd64/isa/clock.c index 426de51..245a696 100644 --- a/sys/amd64/isa/clock.c +++ b/sys/amd64/isa/clock.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.90 1997/07/18 03:59:28 fsmp Exp $ + * $Id: clock.c,v 1.91 1997/07/19 02:28:29 fsmp Exp $ */ /* @@ -66,7 +66,7 @@ #include #ifdef APIC_IO #include -#include /** TEST_ALTTIMER */ +#include /** TEST_ALTTIMER, APIC_PIN0_TIMER */ #endif /* APIC_IO */ #include @@ -874,12 +874,27 @@ cpu_initclocks() /* Finish initializing 8253 timer 0. */ #ifdef APIC_IO -#if 0 -#ifndef IO_ICU1 -#define IO_ICU1 0x20 -#endif /* IO_ICU1 */ -#endif /** 0 */ +#ifdef APIC_PIN0_TIMER + /* + * Allow 8254 timer to INTerrupt 8259: + * re-initialize master 8259: + * reset; prog 4 bytes, single ICU, edge triggered + */ + outb(IO_ICU1, 0x13); + outb(IO_ICU1 + 1, NRSVIDT); /* start vector */ + outb(IO_ICU1 + 1, 0x00); /* ignore slave */ + outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */ + outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */ + + /* program IO APIC for type 3 INT on INT0 */ + if (ext_int_setup(0, 0) < 0) + panic("8254 redirect via APIC pin0 impossible!"); + register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, + /* XXX */ (inthand2_t *)clkintr, &clk_imask, + /* unit */ 0); + INTREN(IRQ0); +#else /* APIC_PIN0_TIMER */ /* 8254 is traditionally on ISA IRQ0 */ if ((x = isa_apic_pin(0)) < 0) { /* bummer, attempt to redirect thru the 8259 */ @@ -917,7 +932,8 @@ cpu_initclocks() /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); INTREN(mask8254); -#else +#endif /* APIC_PIN0_TIMER */ +#else /* APIC_IO */ register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); diff --git a/sys/i386/i386/tsc.c b/sys/i386/i386/tsc.c index 426de51..245a696 100644 --- a/sys/i386/i386/tsc.c +++ b/sys/i386/i386/tsc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.90 1997/07/18 03:59:28 fsmp Exp $ + * $Id: clock.c,v 1.91 1997/07/19 02:28:29 fsmp Exp $ */ /* @@ -66,7 +66,7 @@ #include #ifdef APIC_IO #include -#include /** TEST_ALTTIMER */ +#include /** TEST_ALTTIMER, APIC_PIN0_TIMER */ #endif /* APIC_IO */ #include @@ -874,12 +874,27 @@ cpu_initclocks() /* Finish initializing 8253 timer 0. */ #ifdef APIC_IO -#if 0 -#ifndef IO_ICU1 -#define IO_ICU1 0x20 -#endif /* IO_ICU1 */ -#endif /** 0 */ +#ifdef APIC_PIN0_TIMER + /* + * Allow 8254 timer to INTerrupt 8259: + * re-initialize master 8259: + * reset; prog 4 bytes, single ICU, edge triggered + */ + outb(IO_ICU1, 0x13); + outb(IO_ICU1 + 1, NRSVIDT); /* start vector */ + outb(IO_ICU1 + 1, 0x00); /* ignore slave */ + outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */ + outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */ + + /* program IO APIC for type 3 INT on INT0 */ + if (ext_int_setup(0, 0) < 0) + panic("8254 redirect via APIC pin0 impossible!"); + register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, + /* XXX */ (inthand2_t *)clkintr, &clk_imask, + /* unit */ 0); + INTREN(IRQ0); +#else /* APIC_PIN0_TIMER */ /* 8254 is traditionally on ISA IRQ0 */ if ((x = isa_apic_pin(0)) < 0) { /* bummer, attempt to redirect thru the 8259 */ @@ -917,7 +932,8 @@ cpu_initclocks() /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); INTREN(mask8254); -#else +#endif /* APIC_PIN0_TIMER */ +#else /* APIC_IO */ register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); diff --git a/sys/i386/isa/apic_ipl.s b/sys/i386/isa/apic_ipl.s index c7612c8..bb88ceb 100644 --- a/sys/i386/isa/apic_ipl.s +++ b/sys/i386/isa/apic_ipl.s @@ -22,12 +22,17 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: apic_ipl.s,v 1.1 1997/07/18 22:54:17 smp Exp smp $ + * $Id: apic_ipl.s,v 1.2 1997/07/19 02:28:29 fsmp Exp $ */ +#ifdef APIC_IO +#include /** APIC_PIN0_TIMER */ +#endif /* APIC_IO */ + .data ALIGN_DATA +#ifndef APIC_PIN0_TIMER /* this allows us to change the 8254 APIC pin# assignment */ .globl _Xintr8254 _Xintr8254: @@ -37,6 +42,7 @@ _Xintr8254: .globl _mask8254 _mask8254: .long 0 +#endif /* APIC_PIN0_TIMER */ #ifdef DO_RTC_VEC /** XXX FIXME: remove me after several weeks of no problems */ @@ -76,6 +82,17 @@ _vec: * generic vector function for 8254 clock */ ALIGN_TEXT +#ifdef APIC_PIN0_TIMER +vec0: + popl %eax /* return address */ + pushfl + pushl $KCSEL + pushl %eax + cli + andl $~IRQ_BIT(0), iactive ; /* lazy masking */ + MEXITCOUNT + jmp _Xintr0 /* XXX might need _Xfastintr0 */ +#else .globl _vec8254 _vec8254: popl %eax /* return address */ @@ -83,12 +100,14 @@ _vec8254: pushl $KCSEL pushl %eax cli - movl _mask8254,%eax /* lazy masking */ + movl _mask8254, %eax /* lazy masking */ notl %eax - andl %eax,iactive + andl %eax, iactive MEXITCOUNT movl _Xintr8254, %eax jmp %eax /* XXX might need _Xfastintr# */ +#endif /* APIC_PIN0_TIMER */ + /* * generic vector function for RTC clock @@ -142,7 +161,9 @@ __CONCAT(vec,irq_num): ; \ jmp __CONCAT(_Xintr,irq_num) - BUILD_VEC(0) /* NOT specific in IO APIC hardware */ +#ifndef APIC_PIN0_TIMER + BUILD_VEC(0) +#endif /* APIC_PIN0_TIMER */ BUILD_VEC(1) BUILD_VEC(2) BUILD_VEC(3) diff --git a/sys/i386/isa/clock.c b/sys/i386/isa/clock.c index 426de51..245a696 100644 --- a/sys/i386/isa/clock.c +++ b/sys/i386/isa/clock.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.90 1997/07/18 03:59:28 fsmp Exp $ + * $Id: clock.c,v 1.91 1997/07/19 02:28:29 fsmp Exp $ */ /* @@ -66,7 +66,7 @@ #include #ifdef APIC_IO #include -#include /** TEST_ALTTIMER */ +#include /** TEST_ALTTIMER, APIC_PIN0_TIMER */ #endif /* APIC_IO */ #include @@ -874,12 +874,27 @@ cpu_initclocks() /* Finish initializing 8253 timer 0. */ #ifdef APIC_IO -#if 0 -#ifndef IO_ICU1 -#define IO_ICU1 0x20 -#endif /* IO_ICU1 */ -#endif /** 0 */ +#ifdef APIC_PIN0_TIMER + /* + * Allow 8254 timer to INTerrupt 8259: + * re-initialize master 8259: + * reset; prog 4 bytes, single ICU, edge triggered + */ + outb(IO_ICU1, 0x13); + outb(IO_ICU1 + 1, NRSVIDT); /* start vector */ + outb(IO_ICU1 + 1, 0x00); /* ignore slave */ + outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */ + outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */ + + /* program IO APIC for type 3 INT on INT0 */ + if (ext_int_setup(0, 0) < 0) + panic("8254 redirect via APIC pin0 impossible!"); + register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, + /* XXX */ (inthand2_t *)clkintr, &clk_imask, + /* unit */ 0); + INTREN(IRQ0); +#else /* APIC_PIN0_TIMER */ /* 8254 is traditionally on ISA IRQ0 */ if ((x = isa_apic_pin(0)) < 0) { /* bummer, attempt to redirect thru the 8259 */ @@ -917,7 +932,8 @@ cpu_initclocks() /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); INTREN(mask8254); -#else +#endif /* APIC_PIN0_TIMER */ +#else /* APIC_IO */ register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); diff --git a/sys/isa/atrtc.c b/sys/isa/atrtc.c index 426de51..245a696 100644 --- a/sys/isa/atrtc.c +++ b/sys/isa/atrtc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.90 1997/07/18 03:59:28 fsmp Exp $ + * $Id: clock.c,v 1.91 1997/07/19 02:28:29 fsmp Exp $ */ /* @@ -66,7 +66,7 @@ #include #ifdef APIC_IO #include -#include /** TEST_ALTTIMER */ +#include /** TEST_ALTTIMER, APIC_PIN0_TIMER */ #endif /* APIC_IO */ #include @@ -874,12 +874,27 @@ cpu_initclocks() /* Finish initializing 8253 timer 0. */ #ifdef APIC_IO -#if 0 -#ifndef IO_ICU1 -#define IO_ICU1 0x20 -#endif /* IO_ICU1 */ -#endif /** 0 */ +#ifdef APIC_PIN0_TIMER + /* + * Allow 8254 timer to INTerrupt 8259: + * re-initialize master 8259: + * reset; prog 4 bytes, single ICU, edge triggered + */ + outb(IO_ICU1, 0x13); + outb(IO_ICU1 + 1, NRSVIDT); /* start vector */ + outb(IO_ICU1 + 1, 0x00); /* ignore slave */ + outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */ + outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */ + + /* program IO APIC for type 3 INT on INT0 */ + if (ext_int_setup(0, 0) < 0) + panic("8254 redirect via APIC pin0 impossible!"); + register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, + /* XXX */ (inthand2_t *)clkintr, &clk_imask, + /* unit */ 0); + INTREN(IRQ0); +#else /* APIC_PIN0_TIMER */ /* 8254 is traditionally on ISA IRQ0 */ if ((x = isa_apic_pin(0)) < 0) { /* bummer, attempt to redirect thru the 8259 */ @@ -917,7 +932,8 @@ cpu_initclocks() /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); INTREN(mask8254); -#else +#endif /* APIC_PIN0_TIMER */ +#else /* APIC_IO */ register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0, /* XXX */ (inthand2_t *)clkintr, &clk_imask, /* unit */ 0); -- cgit v1.1