From 34e8b1944e8ae3d1ac19b5f0b26ae1dac7ded645 Mon Sep 17 00:00:00 2001 From: nate Date: Mon, 6 Oct 1997 02:46:38 +0000 Subject: - Style police - Updated some comments using data from the most recent PAO release. Obtained (partially) from: PAO-970616 --- sys/pccard/i82365.h | 18 +++++++++--------- sys/pccard/pcic.c | 42 +++++++++++++++++++++--------------------- 2 files changed, 30 insertions(+), 30 deletions(-) (limited to 'sys') diff --git a/sys/pccard/i82365.h b/sys/pccard/i82365.h index 5940f1f..93f5047 100644 --- a/sys/pccard/i82365.h +++ b/sys/pccard/i82365.h @@ -38,13 +38,13 @@ #define PCIC_VLSI 2 /* VLSI chip */ #define PCIC_PD672X 3 /* Cirrus logic 627x */ #define PCIC_PD6710 4 /* Cirrus logic 6710 */ -#define PCIC_CL6729 5 -#define PCIC_VG468 6 -#define PCIC_VG469 7 +#define PCIC_CL6729 5 /* Cirrus logic 6729 */ +#define PCIC_VG468 6 /* Vadem 468 */ +#define PCIC_VG469 7 /* Vadem 469 */ #define PCIC_RF5C396 8 /* Ricoh RF5C396 */ #define PCIC_IBM_KING 9 /* IBM KING PCMCIA Controller */ -#define PCIC_PC98 10 -#define PCIC_TI1130 11 /* TI PCI1130 CardBus */ +#define PCIC_PC98 10 /* NEC PC98 PCMCIA Controller */ +#define PCIC_TI1130 11 /* TI PCI1130 CardBus */ /* * Address of the controllers. Each controller can manage @@ -57,10 +57,10 @@ * identify the port number, and the lower 6 bits * select one of the 64 possible data registers. */ -#define PCIC_INDEX_0 0x3E0 /* index reg, chips 0 and 1 */ -#define PCIC_DATA_0 0x3E1 /* data register, chips 0 and 1 */ -#define PCIC_INDEX_1 0x3E2 /* index reg, chips 2 and 3 */ -#define PCIC_DATA_1 0x3E3 /* data register, chips 2 and 3 */ +#define PCIC_INDEX_0 0x3E0 /* index reg, chips 0 and 1 */ +#define PCIC_DATA_0 (PCIC_INDEX_0 + 1) /* data reg, chips 0 and 1 */ +#define PCIC_INDEX_1 (PCIC_INDEX_0 + 2) /* index reg, chips 2 and 3 */ +#define PCIC_DATA_1 (PCIC_INDEX_1 + 1) /* data reg, chips 2 and 3 */ /* * Register index addresses. */ diff --git a/sys/pccard/pcic.c b/sys/pccard/pcic.c index 368c4f2..8f8b32e 100644 --- a/sys/pccard/pcic.c +++ b/sys/pccard/pcic.c @@ -165,14 +165,14 @@ static struct slot_ctrl cinfo; * Read a register from the PCIC. */ static inline unsigned char -getb1 (struct pcic_slot *sp, int reg) +getb1(struct pcic_slot *sp, int reg) { - outb (sp->index, sp->offset + reg); - return inb (sp->data); + outb(sp->index, sp->offset + reg); + return inb(sp->data); } static inline unsigned char -getb2 (struct pcic_slot *sp, int reg) +getb2(struct pcic_slot *sp, int reg) { return (sp->regs[reg]); } @@ -181,14 +181,14 @@ getb2 (struct pcic_slot *sp, int reg) * Write a register on the PCIC */ static inline void -putb1 (struct pcic_slot *sp, int reg, unsigned char val) +putb1(struct pcic_slot *sp, int reg, unsigned char val) { - outb (sp->index, sp->offset + reg); - outb (sp->data, val); + outb(sp->index, sp->offset + reg); + outb(sp->data, val); } static inline void -putb2 (struct pcic_slot *sp, int reg, unsigned char val) +putb2(struct pcic_slot *sp, int reg, unsigned char val) { sp->regs[reg] = val; } @@ -199,7 +199,7 @@ putb2 (struct pcic_slot *sp, int reg, unsigned char val) static inline void clrb(struct pcic_slot *sp, int reg, unsigned char mask) { - sp->putb (sp, reg, sp->getb (sp, reg) & ~mask); + sp->putb(sp, reg, sp->getb(sp, reg) & ~mask); } /* @@ -208,7 +208,7 @@ clrb(struct pcic_slot *sp, int reg, unsigned char mask) static inline void setb(struct pcic_slot *sp, int reg, unsigned char mask) { - sp->putb (sp, reg, sp->getb (sp, reg) | mask); + sp->putb(sp, reg, sp->getb(sp, reg) | mask); } /* @@ -217,8 +217,8 @@ setb(struct pcic_slot *sp, int reg, unsigned char mask) static inline void putw (struct pcic_slot *sp, int reg, unsigned short word) { - sp->putb (sp, reg, word & 0xFF); - sp->putb (sp, reg + 1, (word >> 8) & 0xff); + sp->putb(sp, reg, word & 0xFF); + sp->putb(sp, reg + 1, (word >> 8) & 0xff); } @@ -670,7 +670,7 @@ pcic_probe(void) * Intel PCMCIA controllers use 0x82 and 0x83 * IBM clone chips use 0x88 and 0x89, apparently */ - c = sp->getb (sp, PCIC_ID_REV); + c = sp->getb(sp, PCIC_ID_REV); sp->revision = -1; switch(c) { /* @@ -686,7 +686,7 @@ pcic_probe(void) outb(sp->index, 0x0E); outb(sp->index, 0x37); setb(sp, 0x3A, 0x40); - c = sp->getb (sp, PCIC_ID_REV); + c = sp->getb(sp, PCIC_ID_REV); if (c & 0x08) { sp->controller = ((sp->revision = c & 7) == 4) ? PCIC_VG469 : PCIC_VG468 ; @@ -696,7 +696,7 @@ pcic_probe(void) /* * Check for RICOH RF5C396 PCMCIA Controller */ - c = sp->getb (sp, 0x3a); + c = sp->getb(sp, 0x3a); if (c == 0xb2) { sp->controller = PCIC_RF5C396; } @@ -803,7 +803,7 @@ pcic_probe(void) * Check for a card in this slot. */ setb (sp, PCIC_POWER, PCIC_PCPWRE| PCIC_DISRST); - if ((sp->getb (sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD) { + if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD) { slotp->laststate = slotp->state = empty; } else { slotp->laststate = slotp->state = filled; @@ -972,12 +972,12 @@ pcic_power(struct slot *slotp) } break; } - sp->putb (sp, PCIC_POWER, reg); + sp->putb(sp, PCIC_POWER, reg); DELAY(300*1000); if (slotp->pwr.vcc) { reg |= PCIC_OUTENA; - sp->putb (sp, PCIC_POWER, reg); - DELAY (100*1000); + sp->putb(sp, PCIC_POWER, reg); + DELAY(100*1000); } /* Some chips are smarter than us it seems, so if we weren't * allowed to use 5V, try 3.3 instead @@ -1030,8 +1030,8 @@ pcic_mapirq (struct slot *slotp, int irq) if (irq == 0) clrb(sp, PCIC_INT_GEN, 0xF); else - sp->putb (sp, PCIC_INT_GEN, - (sp->getb (sp, PCIC_INT_GEN) & 0xF0) | irq); + sp->putb(sp, PCIC_INT_GEN, + (sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq); } /* -- cgit v1.1