From 819008de628bf4e3a363b1c50ad645376afb611c Mon Sep 17 00:00:00 2001 From: grehan Date: Wed, 11 Feb 2004 08:07:19 +0000 Subject: - fix compile warnings - removed obsolete NetBSD-derived ADB conditionals --- sys/powerpc/aim/clock.c | 31 +++++-------------------------- sys/powerpc/powerpc/clock.c | 31 +++++-------------------------- 2 files changed, 10 insertions(+), 52 deletions(-) (limited to 'sys/powerpc') diff --git a/sys/powerpc/aim/clock.c b/sys/powerpc/aim/clock.c index fe0ff54..98302a9 100644 --- a/sys/powerpc/aim/clock.c +++ b/sys/powerpc/aim/clock.c @@ -71,12 +71,7 @@ __FBSDID("$FreeBSD$"); #include #include #include - -#if 0 /* XXX */ -#include "adb.h" -#else -#define NADB 0 -#endif +#include /* * Initially we assume a processor with a bus frequency of 12.5 MHz. @@ -90,11 +85,6 @@ static volatile u_long lasttb; #define SECDAY 86400 #define DIFF19041970 2082844800 -#if NADB > 0 -extern int adb_read_date_time(int *); -extern int adb_set_date_time(int); -#endif - static int clockinitted = 0; static timecounter_get_t decr_get_timecount; @@ -138,9 +128,6 @@ inittodr(time_t base) } } -#if NADB > 0 - if (adb_read_date_time(&rtc_time) < 0) -#endif { ts.tv_sec = base; ts.tv_nsec = 0; @@ -171,14 +158,7 @@ inittodr(time_t base) void resettodr() { -#if NADB > 0 - u_int rtc_time; - if (clockinitted) { - rtc_time = time.tv_sec + DIFF19041970; - adb_set_date_time(rtc_time); - } -#endif } void @@ -187,7 +167,6 @@ decr_intr(struct clockframe *frame) u_long tb; long tick; int nticks; - register_t msr; /* * Check whether we are initialized. @@ -218,7 +197,7 @@ decr_intr(struct clockframe *frame) #if 0 msr = mfmsr(); mtmsr(msr | PSL_EE | PSL_RI); -#endif +#endif /* * Do standard timer interrupt stuff. * Do softclock stuff only on the last iteration. @@ -244,7 +223,7 @@ decr_init(void) int qhandle, phandle; char name[32]; unsigned int msr; - + phandle = 0; /* @@ -290,7 +269,7 @@ mftb(void) { u_long scratch; u_quad_t tb; - + __asm ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw 0,%0,%1; bne 1b" : "=r"(tb), "=r"(scratch)); return tb; @@ -309,7 +288,7 @@ void DELAY(int n) { u_quad_t tb, ttb; - + tb = mftb(); ttb = tb + (n * 1000 + ns_per_tick - 1) / ns_per_tick; while (tb < ttb) diff --git a/sys/powerpc/powerpc/clock.c b/sys/powerpc/powerpc/clock.c index fe0ff54..98302a9 100644 --- a/sys/powerpc/powerpc/clock.c +++ b/sys/powerpc/powerpc/clock.c @@ -71,12 +71,7 @@ __FBSDID("$FreeBSD$"); #include #include #include - -#if 0 /* XXX */ -#include "adb.h" -#else -#define NADB 0 -#endif +#include /* * Initially we assume a processor with a bus frequency of 12.5 MHz. @@ -90,11 +85,6 @@ static volatile u_long lasttb; #define SECDAY 86400 #define DIFF19041970 2082844800 -#if NADB > 0 -extern int adb_read_date_time(int *); -extern int adb_set_date_time(int); -#endif - static int clockinitted = 0; static timecounter_get_t decr_get_timecount; @@ -138,9 +128,6 @@ inittodr(time_t base) } } -#if NADB > 0 - if (adb_read_date_time(&rtc_time) < 0) -#endif { ts.tv_sec = base; ts.tv_nsec = 0; @@ -171,14 +158,7 @@ inittodr(time_t base) void resettodr() { -#if NADB > 0 - u_int rtc_time; - if (clockinitted) { - rtc_time = time.tv_sec + DIFF19041970; - adb_set_date_time(rtc_time); - } -#endif } void @@ -187,7 +167,6 @@ decr_intr(struct clockframe *frame) u_long tb; long tick; int nticks; - register_t msr; /* * Check whether we are initialized. @@ -218,7 +197,7 @@ decr_intr(struct clockframe *frame) #if 0 msr = mfmsr(); mtmsr(msr | PSL_EE | PSL_RI); -#endif +#endif /* * Do standard timer interrupt stuff. * Do softclock stuff only on the last iteration. @@ -244,7 +223,7 @@ decr_init(void) int qhandle, phandle; char name[32]; unsigned int msr; - + phandle = 0; /* @@ -290,7 +269,7 @@ mftb(void) { u_long scratch; u_quad_t tb; - + __asm ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw 0,%0,%1; bne 1b" : "=r"(tb), "=r"(scratch)); return tb; @@ -309,7 +288,7 @@ void DELAY(int n) { u_quad_t tb, ttb; - + tb = mftb(); ttb = tb + (n * 1000 + ns_per_tick - 1) / ns_per_tick; while (tb < ttb) -- cgit v1.1