From 745b5bcad49247c234953ff587296084cefbe3c8 Mon Sep 17 00:00:00 2001 From: nwhitehorn Date: Tue, 24 Nov 2015 16:10:21 +0000 Subject: Use what we really mean (powerpc_lwsync()) rather than the Linux-compat mb() here and provide some more documentation on what, exactly, makes this code safe. Requested by and discussed with: kib, alc --- sys/powerpc/aim/slb.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'sys/powerpc') diff --git a/sys/powerpc/aim/slb.c b/sys/powerpc/aim/slb.c index 89cfabf..aa6a214 100644 --- a/sys/powerpc/aim/slb.c +++ b/sys/powerpc/aim/slb.c @@ -140,7 +140,7 @@ make_new_leaf(uint64_t esid, uint64_t slbv, struct slbtnode *parent) * that a lockless searcher always sees a valid path through * the tree. */ - mb(); + powerpc_lwsync(); idx = esid2idx(esid, parent->ua_level); parent->u.ua_child[idx] = child; @@ -188,7 +188,7 @@ make_intermediate(uint64_t esid, struct slbtnode *parent) idx = esid2idx(child->ua_base, inter->ua_level); inter->u.ua_child[idx] = child; setbit(&inter->ua_alloc, idx); - mb(); + powerpc_lwsync(); /* Set up parent to point to intermediate node ... */ idx = esid2idx(inter->ua_base, parent->ua_level); @@ -241,6 +241,12 @@ user_va_to_slb_entry(pmap_t pm, vm_offset_t va) return ((ua->u.slb_entries[idx].slbe & SLBE_VALID) ? &ua->u.slb_entries[idx] : NULL); + /* + * The following accesses are implicitly ordered under the POWER + * ISA by load dependencies (the store ordering is provided by + * the powerpc_lwsync() calls elsewhere) and so are run without + * barriers. + */ ua = ua->u.ua_child[idx]; if (ua == NULL || esid2base(esid, ua->ua_level) != ua->ua_base) -- cgit v1.1