From a5cd9e84f4cc92e9ffe36968558b73de8e49d55d Mon Sep 17 00:00:00 2001 From: nwhitehorn Date: Sat, 5 Jun 2010 17:49:40 +0000 Subject: Utilize the Keywest I2C combined mode for messages with repeated starts. --- sys/powerpc/powermac/kiic.c | 65 +++++++++++++++++++++++++++++++++++++++------ 1 file changed, 57 insertions(+), 8 deletions(-) (limited to 'sys/powerpc/powermac') diff --git a/sys/powerpc/powermac/kiic.c b/sys/powerpc/powermac/kiic.c index 1f246e7..459d20e 100644 --- a/sys/powerpc/powermac/kiic.c +++ b/sys/powerpc/powermac/kiic.c @@ -107,6 +107,7 @@ struct kiic_softc { u_int sc_flags; u_char *sc_data; int sc_resid; + uint16_t sc_i2c_base; device_t sc_iicbus; }; @@ -114,6 +115,7 @@ static int kiic_probe(device_t dev); static int kiic_attach(device_t dev); static void kiic_writereg(struct kiic_softc *sc, u_int, u_int); static u_int kiic_readreg(struct kiic_softc *, u_int); +static void kiic_setport(struct kiic_softc *, u_int); static void kiic_setmode(struct kiic_softc *, u_int); static void kiic_setspeed(struct kiic_softc *, u_int); static void kiic_intr(void *xsc); @@ -196,12 +198,25 @@ kiic_attach(device_t self) * underneath them. Some have a single 'iicbus' child with the * devices underneath that. Sort this out, and make sure that the * OFW I2C layer has the correct node. + * + * Note: the I2C children of the Uninorth bridges have two ports. + * In general, the port is designated in the 9th bit of the I2C + * address. However, for kiic devices with children attached below + * an i2c-bus node, the port is indicated in the 'reg' property + * of the i2c-bus node. */ - sc->sc_node = OF_child(node); - if (OF_getprop(sc->sc_node,"name",name,sizeof(name)) > 0) { - if (strcmp(name,"i2c-bus") != 0) + sc->sc_node = node; + + node = OF_child(node); + if (OF_getprop(node, "name", name, sizeof(name)) > 0) { + if (strcmp(name,"i2c-bus") == 0) { + phandle_t reg; + if (OF_getprop(node, "reg", ®, sizeof(reg)) > 0) + sc->sc_i2c_base = reg << 8; + sc->sc_node = node; + } } mtx_init(&sc->sc_mutex, "kiic", NULL, MTX_DEF); @@ -211,8 +226,8 @@ kiic_attach(device_t self) bus_setup_intr(self, sc->sc_irq, INTR_TYPE_MISC | INTR_MPSAFE, NULL, kiic_intr, sc, &sc->sc_ih); + kiic_writereg(sc, ISR, kiic_readreg(sc, ISR)); kiic_writereg(sc, STATUS, 0); - kiic_writereg(sc, ISR, 0); kiic_writereg(sc, IER, 0); kiic_setmode(sc, I2C_STDMODE); @@ -252,6 +267,18 @@ kiic_setmode(struct kiic_softc *sc, u_int mode) } static void +kiic_setport(struct kiic_softc *sc, u_int port) +{ + u_int x; + + KASSERT(port == 1 || port == 0, ("bad port")); + x = kiic_readreg(sc, MODE); + x &= ~I2C_PORT; + x |= (port << 4); + kiic_writereg(sc, MODE, x); +} + +static void kiic_setspeed(struct kiic_softc *sc, u_int speed) { u_int x; @@ -294,7 +321,8 @@ kiic_intr(void *xsc) *sc->sc_data++ = kiic_readreg(sc, DATA); sc->sc_resid--; } - + if (sc->sc_resid == 0) /* done */ + kiic_writereg(sc, CONTROL, 0); } else { if (sc->sc_resid == 0) { x = kiic_readreg(sc, CONTROL); @@ -322,10 +350,12 @@ kiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) { struct kiic_softc *sc; int i, x, timo, err; - uint8_t addr; + uint16_t addr; + uint8_t subaddr; sc = device_get_softc(dev); timo = 100; + subaddr = 0; mtx_lock(&sc->sc_mutex); @@ -339,7 +369,23 @@ kiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) sc->sc_flags = I2C_BUSY; + /* Clear pending interrupts, and reset controller */ + kiic_writereg(sc, ISR, kiic_readreg(sc, ISR)); + kiic_writereg(sc, STATUS, 0); + for (i = 0; i < nmsgs; i++) { + if (msgs[i].flags & IIC_M_NOSTOP) { + if (msgs[i+1].flags & IIC_M_RD) + kiic_setmode(sc, I2C_COMBMODE); + else + kiic_setmode(sc, I2C_STDSUBMODE); + KASSERT(msgs[i].len == 1, ("oversize I2C message")); + subaddr = msgs[i].buf[0]; + i++; + } else { + kiic_setmode(sc, I2C_STDMODE); + } + sc->sc_data = msgs[i].buf; sc->sc_resid = msgs[i].len; sc->sc_flags = I2C_BUSY; @@ -352,8 +398,11 @@ kiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) addr |= 1; } - kiic_writereg(sc, ADDR, addr); - kiic_writereg(sc, SUBADDR, 0x04); + addr |= sc->sc_i2c_base; + + kiic_setport(sc, (addr & 0x100) >> 8); + kiic_writereg(sc, ADDR, addr & 0xff); + kiic_writereg(sc, SUBADDR, subaddr); x = kiic_readreg(sc, CONTROL) | I2C_CT_ADDR; kiic_writereg(sc, CONTROL, x); -- cgit v1.1