From 9a6e75fa0cb882f24061bc3c7e7d0f2fab8eabf9 Mon Sep 17 00:00:00 2001 From: se Date: Wed, 6 Aug 1997 20:25:54 +0000 Subject: Remove two features that have been reported to cause problems with certain variants of the NCR chip from FE_CACHE_SET: FE_CLSE (enable cache-line size register) and FE_ERMP (enable read-multiple). They will be re-enabled, if a fix for the underlying problem (a restriction in the memory to memory move logic of some chips) has been implemented. --- sys/pci/ncrreg.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'sys/pci') diff --git a/sys/pci/ncrreg.h b/sys/pci/ncrreg.h index 573b70b..2542b6b 100644 --- a/sys/pci/ncrreg.h +++ b/sys/pci/ncrreg.h @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: ncrreg.h,v 1.7 1997/02/22 09:44:10 peter Exp $ +** $Id: ncrreg.h,v 1.8 1997/07/25 20:45:09 se Exp $ ** ** Device driver for the NCR 53C810 PCI-SCSI-Controller. ** @@ -603,7 +603,8 @@ struct scr_tblsel { #define FE_CLK80 (1<<15) #define FE_DIFF (1<<16) #define FE_BIOS (1<<17) -#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP) +/*#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)*/ +#define FE_CACHE_SET (FE_ERL|FE_WRIE) #define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_ULTRA2|FE_DBLR|FE_QUAD|F_CLK80) #define FE_SPECIAL_SET (FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM) -- cgit v1.1