From 317a440c3154f6777e5eb38a709962ed926e62b6 Mon Sep 17 00:00:00 2001 From: silby Date: Wed, 31 Jul 2002 19:58:36 +0000 Subject: Make sure to set both sets of registers which control the RX and TX buffer sizes. Previously, the end result was at the mercy of the card's default setting. This change will reduce the number of buffer underruns for some users. PR: kern/37929 Submitted by: Thomas Nystrom MFC after: 7 days --- sys/pci/if_vr.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'sys/pci/if_vr.c') diff --git a/sys/pci/if_vr.c b/sys/pci/if_vr.c index 1f4a07e..74a8d66 100644 --- a/sys/pci/if_vr.c +++ b/sys/pci/if_vr.c @@ -1407,6 +1407,15 @@ static void vr_init(xsc) for (i = 0; i < ETHER_ADDR_LEN; i++) CSR_WRITE_1(sc, VR_PAR0 + i, sc->arpcom.ac_enaddr[i]); + /* BCR0 and BCR1 can override the RXCFG and TXCFG registers, + * so we must set both. + */ + VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH); + VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESHSTORENFWD); + + VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH); + VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTHRESHSTORENFWD); + VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH); VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_STORENFWD); -- cgit v1.1