From aa86a7c59edb19ee67bcf28d9465dc88c0b1fd6a Mon Sep 17 00:00:00 2001 From: jkoshy Date: Thu, 27 Nov 2008 09:00:47 +0000 Subject: - Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core Solo and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and model 0x1C (Atom). In these CPUs, the actual numbers, kinds and widths of PMCs present need to queried at run time. Support for specific "architectural" events also needs to be queried at run time. Model 0xE CPUs support programmable PMCs, subsequent CPUs additionally support "fixed-function" counters. - Use event names that are close to vendor documentation, taking in account that: - events with identical semantics on two or more CPUs in this family can have differing names in vendor documentation, - identical vendor event names may map to differing events across CPUs, - each type of CPU supports a different subset of measurable events. Fixed-function and programmable counters both use the same vendor names for events. The use of a class name prefix ("iaf-" or "iap-" respectively) permits these to be distinguished. - In libpmc, refactor pmc_name_of_event() into a public interface and an internal helper function, for use by log handling code. - Minor code tweaks: staticize a global, freshen a few comments. Tested by: gnn --- sys/modules/hwpmc/Makefile | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'sys/modules') diff --git a/sys/modules/hwpmc/Makefile b/sys/modules/hwpmc/Makefile index 350d361..0a696a1 100644 --- a/sys/modules/hwpmc/Makefile +++ b/sys/modules/hwpmc/Makefile @@ -9,7 +9,8 @@ KMOD= hwpmc SRCS= hwpmc_mod.c hwpmc_logging.c vnode_if.h .if ${MACHINE_ARCH} == "amd64" -SRCS+= hwpmc_amd.c hwpmc_intel.c hwpmc_piv.c hwpmc_tsc.c hwpmc_x86.c +SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_tsc.c +SRCS+= hwpmc_x86.c SRCS+= device_if.h bus_if.h .endif @@ -18,8 +19,8 @@ SRCS+= hwpmc_arm.c .endif .if ${MACHINE_ARCH} == "i386" -SRCS+= hwpmc_amd.c hwpmc_intel.c hwpmc_piv.c hwpmc_ppro.c hwpmc_pentium.c -SRCS+= hwpmc_tsc.c hwpmc_x86.c +SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_ppro.c +SRCS+= hwpmc_pentium.c hwpmc_tsc.c hwpmc_x86.c SRCS+= device_if.h bus_if.h .endif -- cgit v1.1