From fbe181c5230d8e563277939bd6fb652a637d82b2 Mon Sep 17 00:00:00 2001 From: jchandra Date: Thu, 24 Jan 2013 15:14:22 +0000 Subject: Broadcom XLP network driver update for XLP 8xx B1 rev Update MDIO reset code to support Broadcom XLP B1 revisions. Update nlm_xlpge_ioctl, nlm_xlpge_port_enable need not be called after nlm_xlpge_init. Obtained from: Venkatesh J V --- sys/mips/nlm/dev/net/mdio.c | 23 ++++++++++++++++++++--- sys/mips/nlm/dev/net/sgmii.c | 7 ------- sys/mips/nlm/dev/net/xlpge.c | 10 +++++++--- sys/mips/nlm/hal/mdio.h | 1 + 4 files changed, 28 insertions(+), 13 deletions(-) (limited to 'sys/mips') diff --git a/sys/mips/nlm/dev/net/mdio.c b/sys/mips/nlm/dev/net/mdio.c index ed2abe4..0845339 100644 --- a/sys/mips/nlm/dev/net/mdio.c +++ b/sys/mips/nlm/dev/net/mdio.c @@ -149,7 +149,8 @@ nlm_int_gmac_mdio_reset(uint64_t nae_base, int bus, int block, uint32_t val; val = (7 << INT_MDIO_CTRL_XDIV_POS) | - (1 << INT_MDIO_CTRL_MCDIV_POS); + (1 << INT_MDIO_CTRL_MCDIV_POS) | + (INT_MDIO_CTRL_SMP); nlm_write_nae_reg(nae_base, NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), @@ -302,10 +303,13 @@ nlm_gmac_mdio_reset(uint64_t nae_base, int bus, int block, { uint32_t ctrlval; + ctrlval = nlm_read_nae_reg(nae_base, + NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4))); + if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax()) - ctrlval = EXT_G_MDIO_DIV; + ctrlval |= EXT_G_MDIO_DIV; else - ctrlval = EXT_G_MDIO_DIV_WITH_HW_DIV64; + ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64; nlm_write_nae_reg(nae_base, NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)), @@ -314,3 +318,16 @@ nlm_gmac_mdio_reset(uint64_t nae_base, int bus, int block, NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)), ctrlval); return (0); } + +/* + * nlm_mdio_reset_all : reset all internal and external MDIO + */ +void +nlm_mdio_reset_all(uint64_t nae_base) +{ + /* reset internal MDIO */ + nlm_int_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG); + /* reset external MDIO */ + nlm_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG); + nlm_gmac_mdio_reset(nae_base, 1, BLOCK_7, LANE_CFG); +} diff --git a/sys/mips/nlm/dev/net/sgmii.c b/sys/mips/nlm/dev/net/sgmii.c index 91f5f7a..18b1411 100644 --- a/sys/mips/nlm/dev/net/sgmii.c +++ b/sys/mips/nlm/dev/net/sgmii.c @@ -69,13 +69,6 @@ nlm_configure_sgmii_interface(uint64_t nae_base, int block, int port, void nlm_sgmii_pcs_init(uint64_t nae_base, uint32_t cplx_mask) { - /* reset internal MDIO */ - nlm_int_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG); - - /* reset external MDIO */ - nlm_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG); - nlm_gmac_mdio_reset(nae_base, 1, BLOCK_7, LANE_CFG); - xlp_nae_config_lane_gmac(nae_base, cplx_mask); } diff --git a/sys/mips/nlm/dev/net/xlpge.c b/sys/mips/nlm/dev/net/xlpge.c index f94dcd5..4e22bbd 100644 --- a/sys/mips/nlm/dev/net/xlpge.c +++ b/sys/mips/nlm/dev/net/xlpge.c @@ -444,6 +444,8 @@ nlm_xlpnae_init(int node, struct nlm_xlpnae_softc *sc) val = nlm_set_device_frequency(node, DFS_DEVICE_NAE, sc->freq); printf("Setup NAE frequency to %dMHz\n", val); + nlm_mdio_reset_all(nae_base); + printf("Initialze SGMII PCS for blocks 0x%x\n", sc->sgmiimask); nlm_sgmii_pcs_init(nae_base, sc->sgmiimask); @@ -797,8 +799,9 @@ nlm_xlpge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) if (ifp->if_flags & IFF_UP) { if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) nlm_xlpge_init(sc); - nlm_xlpge_mac_set_rx_mode(sc); - nlm_xlpge_port_enable(sc); + else + nlm_xlpge_port_enable(sc); + nlm_xlpge_mac_set_rx_mode(sc); sc->link = NLM_LINK_UP; } else { if (ifp->if_drv_flags & IFF_DRV_RUNNING) @@ -1288,6 +1291,7 @@ nlm_xlpge_attach(device_t dev) nlm_xlpge_ifinit(sc); ifp_ports[port].xlpge_sc = sc; nlm_xlpge_mii_init(dev, sc); + nlm_xlpge_setup_stats_sysctl(dev, sc); return (0); @@ -1385,7 +1389,7 @@ nlm_xlpge_mii_statchg(device_t dev) sc->block, sc->port, speed, duplexity); nlm_nae_setup_mac(sc->base_addr, sc->block, sc->port, 0, 1, 1, - sc->speed, sc->duplexity); + sc->speed, sc->duplexity); } } diff --git a/sys/mips/nlm/hal/mdio.h b/sys/mips/nlm/hal/mdio.h index a1e720b..31b2aa0 100644 --- a/sys/mips/nlm/hal/mdio.h +++ b/sys/mips/nlm/hal/mdio.h @@ -100,6 +100,7 @@ int nlm_int_gmac_mdio_reset(uint64_t, int, int, int); int nlm_gmac_mdio_read(uint64_t, int, int, int, int, int); int nlm_gmac_mdio_write(uint64_t, int, int, int, int, int, uint16_t); int nlm_gmac_mdio_reset(uint64_t, int, int, int); +void nlm_mdio_reset_all(uint64_t); #endif /* !(LOCORE) && !(__ASSEMBLY__) */ #endif -- cgit v1.1