From d60fa5f434d39572b6ea9de4953a228e3b87d41d Mon Sep 17 00:00:00 2001 From: imp Date: Mon, 26 Nov 2001 21:25:03 +0000 Subject: MFS: I was confused. This code wasn't in -current after all. Merge in the irq 0 detection. Add comment about why. If we have irq 0, ignore it like we do irq 255. Some BIOS writers aren't careful like they should be. --- sys/i386/pci/pci_cfgreg.c | 19 ++++++++++++++----- sys/i386/pci/pci_pir.c | 19 ++++++++++++++----- 2 files changed, 28 insertions(+), 10 deletions(-) (limited to 'sys/i386') diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c index 3d5afb7..da1d208 100644 --- a/sys/i386/pci/pci_cfgreg.c +++ b/sys/i386/pci/pci_cfgreg.c @@ -383,11 +383,20 @@ pci_cfgintr_search(struct PIR_entry *pe, int bus, int device, int matchpin, int for (j = 0, childp = pci_children; j < pci_childcount; j++, childp++) { if ((pci_get_bus(*childp) == bus) && (pci_get_slot(*childp) == device) && - (pci_get_intpin(*childp) == matchpin) && - ((irq = pci_get_irq(*childp)) != 255)) { - PRVERB(("pci_cfgintr_search: linked (%x) to configured irq %d at %d:%d:%d\n", - pe->pe_intpin[pin - 1].link, irq, - pci_get_bus(*childp), pci_get_slot(*childp), pci_get_function(*childp))); + (pci_get_intpin(*childp) == matchpin)) { + irq = pci_get_irq(*childp); + /* + * Some BIOS writers seem to want to ignore the spec and put + * 0 in the intline rather than 255 to indicate none. Once + * we've found one that matches, we break because there can + * be no others (which is why test looks a little odd). + */ + if (irq == 0) + irq = 255; + if (irq != 255) + PRVERB(("pci_cfgintr_search: linked (%x) to configured irq %d at %d:%d:%d\n", + pe->pe_intpin[pin - 1].link, irq, + pci_get_bus(*childp), pci_get_slot(*childp), pci_get_function(*childp))); break; } } diff --git a/sys/i386/pci/pci_pir.c b/sys/i386/pci/pci_pir.c index 3d5afb7..da1d208 100644 --- a/sys/i386/pci/pci_pir.c +++ b/sys/i386/pci/pci_pir.c @@ -383,11 +383,20 @@ pci_cfgintr_search(struct PIR_entry *pe, int bus, int device, int matchpin, int for (j = 0, childp = pci_children; j < pci_childcount; j++, childp++) { if ((pci_get_bus(*childp) == bus) && (pci_get_slot(*childp) == device) && - (pci_get_intpin(*childp) == matchpin) && - ((irq = pci_get_irq(*childp)) != 255)) { - PRVERB(("pci_cfgintr_search: linked (%x) to configured irq %d at %d:%d:%d\n", - pe->pe_intpin[pin - 1].link, irq, - pci_get_bus(*childp), pci_get_slot(*childp), pci_get_function(*childp))); + (pci_get_intpin(*childp) == matchpin)) { + irq = pci_get_irq(*childp); + /* + * Some BIOS writers seem to want to ignore the spec and put + * 0 in the intline rather than 255 to indicate none. Once + * we've found one that matches, we break because there can + * be no others (which is why test looks a little odd). + */ + if (irq == 0) + irq = 255; + if (irq != 255) + PRVERB(("pci_cfgintr_search: linked (%x) to configured irq %d at %d:%d:%d\n", + pe->pe_intpin[pin - 1].link, irq, + pci_get_bus(*childp), pci_get_slot(*childp), pci_get_function(*childp))); break; } } -- cgit v1.1