From 9d2ba45c0b513f70c5147d85a0b1eef3ee81d44b Mon Sep 17 00:00:00 2001 From: delphij Date: Wed, 16 Dec 2015 08:02:21 +0000 Subject: MFC r259564,259565,291641: Update arcmsr(4) to 1.30.00.00 in order to add support of ARC-1203 SATA RAID controllers. Many thanks to Areca for continuing to support FreeBSD. --- sys/dev/arcmsr/arcmsr.c | 860 ++++++++++++++++++++++++---------------------- sys/dev/arcmsr/arcmsr.h | 883 +++++++++++++++++++++++++----------------------- 2 files changed, 913 insertions(+), 830 deletions(-) (limited to 'sys/dev') diff --git a/sys/dev/arcmsr/arcmsr.c b/sys/dev/arcmsr/arcmsr.c index 5d46ad3..b4e6ce5 100644 --- a/sys/dev/arcmsr/arcmsr.c +++ b/sys/dev/arcmsr/arcmsr.c @@ -75,6 +75,8 @@ ** 1.20.00.26 12/14/2012 Ching Huang Added support ARC1214,1224,1264,1284 ** 1.20.00.27 05/06/2013 Ching Huang Fixed out standing cmd full on ARC-12x4 ** 1.20.00.28 09/13/2013 Ching Huang Removed recursive mutex in arcmsr_abort_dr_ccbs +** 1.20.00.29 12/18/2013 Ching Huang Change simq allocation number, support ARC1883 +** 1.30.00.00 11/30/2015 Ching Huang Added support ARC1203 ****************************************************************************************** */ @@ -125,15 +127,15 @@ __FBSDID("$FreeBSD$"); ************************************************************************** */ #if __FreeBSD_version >= 500005 - #include - #include - #include - #include - #include + #include + #include + #include + #include + #include #else - #include - #include - #include + #include + #include + #include #endif #if !defined(CAM_NEW_TRAN_CODE) && __FreeBSD_version >= 700025 @@ -146,7 +148,7 @@ __FBSDID("$FreeBSD$"); #define arcmsr_callout_init(a) callout_init(a); #endif -#define ARCMSR_DRIVER_VERSION "arcmsr version 1.20.00.28 2013-09-13" +#define ARCMSR_DRIVER_VERSION "arcmsr version 1.30.00.00 2015-11-30" #include /* ************************************************************************** @@ -180,8 +182,8 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p static int arcmsr_resume(device_t dev); static int arcmsr_suspend(device_t dev); static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb); -static void arcmsr_polling_devmap(void *arg); -static void arcmsr_srb_timeout(void *arg); +static void arcmsr_polling_devmap(void *arg); +static void arcmsr_srb_timeout(void *arg); static void arcmsr_hbd_postqueue_isr(struct AdapterControlBlock *acb); #ifdef ARCMSR_DEBUG1 static void arcmsr_dump_data(struct AdapterControlBlock *acb); @@ -219,11 +221,11 @@ static device_method_t arcmsr_methods[]={ { 0, 0 } #endif }; - + static driver_t arcmsr_driver={ "arcmsr", arcmsr_methods, sizeof(struct AdapterControlBlock) }; - + static devclass_t arcmsr_devclass; DRIVER_MODULE(arcmsr, pci, arcmsr_driver, arcmsr_devclass, 0, 0); MODULE_DEPEND(arcmsr, pci, 1, 1, 1); @@ -246,38 +248,38 @@ static struct cdevsw arcmsr_cdevsw={ }; #else #define ARCMSR_CDEV_MAJOR 180 - + static struct cdevsw arcmsr_cdevsw = { - arcmsr_open, /* open */ - arcmsr_close, /* close */ - noread, /* read */ - nowrite, /* write */ - arcmsr_ioctl, /* ioctl */ - nopoll, /* poll */ - nommap, /* mmap */ - nostrategy, /* strategy */ - "arcmsr", /* name */ - ARCMSR_CDEV_MAJOR, /* major */ - nodump, /* dump */ - nopsize, /* psize */ - 0 /* flags */ + arcmsr_open, /* open */ + arcmsr_close, /* close */ + noread, /* read */ + nowrite, /* write */ + arcmsr_ioctl, /* ioctl */ + nopoll, /* poll */ + nommap, /* mmap */ + nostrategy, /* strategy */ + "arcmsr", /* name */ + ARCMSR_CDEV_MAJOR, /* major */ + nodump, /* dump */ + nopsize, /* psize */ + 0 /* flags */ }; #endif /* ************************************************************************** ************************************************************************** */ -#if __FreeBSD_version < 500005 +#if __FreeBSD_version < 500005 static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc) #else - #if __FreeBSD_version < 503000 + #if __FreeBSD_version < 503000 static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc) #else static int arcmsr_open(struct cdev *dev, int flags, int fmt, struct thread *proc) #endif #endif { - #if __FreeBSD_version < 503000 + #if __FreeBSD_version < 503000 struct AdapterControlBlock *acb = dev->si_drv1; #else int unit = dev2unit(dev); @@ -292,17 +294,17 @@ static struct cdevsw arcmsr_cdevsw = { ************************************************************************** ************************************************************************** */ -#if __FreeBSD_version < 500005 +#if __FreeBSD_version < 500005 static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc) #else - #if __FreeBSD_version < 503000 + #if __FreeBSD_version < 503000 static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc) #else static int arcmsr_close(struct cdev *dev, int flags, int fmt, struct thread *proc) #endif #endif { - #if __FreeBSD_version < 503000 + #if __FreeBSD_version < 503000 struct AdapterControlBlock *acb = dev->si_drv1; #else int unit = dev2unit(dev); @@ -317,17 +319,17 @@ static struct cdevsw arcmsr_cdevsw = { ************************************************************************** ************************************************************************** */ -#if __FreeBSD_version < 500005 +#if __FreeBSD_version < 500005 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc) #else - #if __FreeBSD_version < 503000 + #if __FreeBSD_version < 503000 static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) #else static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) #endif #endif { - #if __FreeBSD_version < 503000 + #if __FreeBSD_version < 503000 struct AdapterControlBlock *acb = dev->si_drv1; #else int unit = dev2unit(dev); @@ -346,7 +348,7 @@ static struct cdevsw arcmsr_cdevsw = { static u_int32_t arcmsr_disable_allintr( struct AdapterControlBlock *acb) { u_int32_t intmask_org = 0; - + switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { /* disable all outbound interrupt */ @@ -355,10 +357,11 @@ static u_int32_t arcmsr_disable_allintr( struct AdapterControlBlock *acb) } break; case ACB_ADAPTER_TYPE_B: { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; /* disable all outbound interrupt */ - intmask_org = CHIP_REG_READ32(HBB_DOORBELL, - 0, iop2drv_doorbell_mask) & (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); /* disable outbound message0 int */ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell_mask, 0); /* disable all interrupt */ + intmask_org = READ_CHIP_REG32(0, phbbmu->iop2drv_doorbell_mask) + & (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); /* disable outbound message0 int */ + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell_mask, 0); /* disable all interrupt */ } break; case ACB_ADAPTER_TYPE_C: { @@ -383,7 +386,7 @@ static u_int32_t arcmsr_disable_allintr( struct AdapterControlBlock *acb) static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t intmask_org) { u_int32_t mask; - + switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { /* enable outbound Post Queue, outbound doorbell Interrupt */ @@ -393,9 +396,10 @@ static void arcmsr_enable_allintr( struct AdapterControlBlock *acb, u_int32_t in } break; case ACB_ADAPTER_TYPE_B: { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; /* enable ARCMSR_IOP2DRV_MESSAGE_CMD_DONE */ mask = (ARCMSR_IOP2DRV_DATA_WRITE_OK|ARCMSR_IOP2DRV_DATA_READ_OK|ARCMSR_IOP2DRV_CDB_DONE|ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); - CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell_mask, intmask_org | mask); /*1=interrupt enable, 0=interrupt disable*/ + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell_mask, intmask_org | mask); /*1=interrupt enable, 0=interrupt disable*/ acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; } break; @@ -424,7 +428,7 @@ static u_int8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) { u_int32_t Index; u_int8_t Retries = 0x00; - + do { for(Index=0; Index < 100; Index++) { if(CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { @@ -444,12 +448,13 @@ static u_int8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) { u_int32_t Index; u_int8_t Retries = 0x00; - + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; + do { for(Index=0; Index < 100; Index++) { - if(CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { - CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt*/ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT); + if(READ_CHIP_REG32(0, phbbmu->iop2drv_doorbell) & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt*/ + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT); return TRUE; } UDELAY(10000); @@ -465,7 +470,7 @@ static u_int8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *acb) { u_int32_t Index; u_int8_t Retries = 0x00; - + do { for(Index=0; Index < 100; Index++) { if(CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { @@ -485,7 +490,7 @@ static u_int8_t arcmsr_hbd_wait_msgint_ready(struct AdapterControlBlock *acb) { u_int32_t Index; u_int8_t Retries = 0x00; - + do { for(Index=0; Index < 100; Index++) { if(CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE) { @@ -504,7 +509,7 @@ static u_int8_t arcmsr_hbd_wait_msgint_ready(struct AdapterControlBlock *acb) static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) { int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ - + CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); do { if(arcmsr_hba_wait_msgint_ready(acb)) { @@ -521,9 +526,9 @@ static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) { int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ - - CHIP_REG_WRITE32(HBB_DOORBELL, - 0, drv2iop_doorbell, ARCMSR_MESSAGE_FLUSH_CACHE); + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; + + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_FLUSH_CACHE); do { if(arcmsr_hbb_wait_msgint_ready(acb)) { break; @@ -539,7 +544,7 @@ static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *acb) { int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ - + CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); do { @@ -557,7 +562,7 @@ static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *acb) static void arcmsr_flush_hbd_cache(struct AdapterControlBlock *acb) { int retry_count = 30; /* enlarge wait flush adapter cache time: 10 minute */ - + CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE); do { if(arcmsr_hbd_wait_msgint_ready(acb)) { @@ -599,7 +604,7 @@ static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) static int arcmsr_suspend(device_t dev) { struct AdapterControlBlock *acb = device_get_softc(dev); - + /* flush controller */ arcmsr_iop_parking(acb); /* disable all outbound interrupt */ @@ -613,7 +618,7 @@ static int arcmsr_suspend(device_t dev) static int arcmsr_resume(device_t dev) { struct AdapterControlBlock *acb = device_get_softc(dev); - + arcmsr_iop_init(acb); return(0); } @@ -626,7 +631,7 @@ static void arcmsr_async(void *cb_arg, u_int32_t code, struct cam_path *path, vo struct AdapterControlBlock *acb; u_int8_t target_id, target_lun; struct cam_sim *sim; - + sim = (struct cam_sim *) cb_arg; acb =(struct AdapterControlBlock *) cam_sim_softc(sim); switch (code) { @@ -649,7 +654,7 @@ static void arcmsr_async(void *cb_arg, u_int32_t code, struct cam_path *path, vo static void arcmsr_report_sense_info(struct CommandControlBlock *srb) { union ccb *pccb = srb->pccb; - + pccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; pccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; if(pccb->csio.sense_len) { @@ -677,7 +682,8 @@ static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) */ static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) { - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_ABORT_CMD); + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_ABORT_CMD); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf("arcmsr%d: wait 'abort all outstanding command' timeout \n", acb->pci_unit); } @@ -738,12 +744,12 @@ static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) { struct AdapterControlBlock *acb = srb->acb; union ccb *pccb = srb->pccb; - + if(srb->srb_flags & SRB_FLAG_TIMER_START) callout_stop(&srb->ccb_callout); if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { bus_dmasync_op_t op; - + if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { op = BUS_DMASYNC_POSTREAD; } else { @@ -772,7 +778,7 @@ static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) static void arcmsr_report_srb_state(struct AdapterControlBlock *acb, struct CommandControlBlock *srb, u_int16_t error) { int target, lun; - + target = srb->pccb->ccb_h.target_id; lun = srb->pccb->ccb_h.target_lun; if(error == FALSE) { @@ -823,7 +829,7 @@ static void arcmsr_report_srb_state(struct AdapterControlBlock *acb, struct Comm static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, u_int32_t flag_srb, u_int16_t error) { struct CommandControlBlock *srb; - + /* check if command done with no error*/ switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_C: @@ -859,7 +865,7 @@ static void arcmsr_srb_timeout(void *arg) struct AdapterControlBlock *acb; int target, lun; u_int8_t cmd; - + target = srb->pccb->ccb_h.target_id; lun = srb->pccb->ccb_h.target_lun; acb = srb->acb; @@ -875,7 +881,7 @@ static void arcmsr_srb_timeout(void *arg) } ARCMSR_LOCK_RELEASE(&acb->isr_lock); #ifdef ARCMSR_DEBUG1 - arcmsr_dump_data(acb); + arcmsr_dump_data(acb); #endif } @@ -888,29 +894,29 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) int i=0; u_int32_t flag_srb; u_int16_t error; - + switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { u_int32_t outbound_intstatus; - + /*clear and abort all outbound posted Q*/ outbound_intstatus = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & acb->outbound_int_enable; CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_intstatus, outbound_intstatus);/*clear interrupt*/ while(((flag_srb=CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_queueport)) != 0xFFFFFFFF) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, flag_srb, error); } } break; case ACB_ADAPTER_TYPE_B: { struct HBB_MessageUnit *phbbmu=(struct HBB_MessageUnit *)acb->pmu; - + /*clear all outbound posted Q*/ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_DOORBELL_INT_CLEAR_PATTERN); /* clear doorbell interrupt */ + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell, ARCMSR_DOORBELL_INT_CLEAR_PATTERN); /* clear doorbell interrupt */ for(i=0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { if((flag_srb = phbbmu->done_qbuffer[i]) != 0) { phbbmu->done_qbuffer[i] = 0; - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, flag_srb, error); } phbbmu->post_qbuffer[i] = 0; @@ -920,10 +926,10 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) } break; case ACB_ADAPTER_TYPE_C: { - + while((CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low); - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE; arcmsr_drain_donequeue(acb, flag_srb, error); } } @@ -943,7 +949,7 @@ static void arcmsr_iop_reset(struct AdapterControlBlock *acb) struct CommandControlBlock *srb; u_int32_t intmask_org; u_int32_t i=0; - + if(acb->srboutstandingcount>0) { /* disable all outbound interrupt */ intmask_org = arcmsr_disable_allintr(acb); @@ -984,7 +990,7 @@ static void arcmsr_build_srb(struct CommandControlBlock *srb, union ccb *pccb = srb->pccb; struct ccb_scsiio *pcsio = &pccb->csio; u_int32_t arccdbsize = 0x30; - + memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); arcmsr_cdb->Bus = 0; arcmsr_cdb->TargetID = pccb->ccb_h.target_id; @@ -996,7 +1002,7 @@ static void arcmsr_build_srb(struct CommandControlBlock *srb, struct AdapterControlBlock *acb = srb->acb; bus_dmasync_op_t op; u_int32_t length, i, cdb_sgcount = 0; - + if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { op = BUS_DMASYNC_PREREAD; } else { @@ -1018,11 +1024,11 @@ static void arcmsr_build_srb(struct CommandControlBlock *srb, arccdbsize += sizeof(struct SG32ENTRY); } else { u_int32_t sg64s_size = 0, tmplength = length; - + while(1) { u_int64_t span4G, length0; struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; - + span4G = (u_int64_t)address_lo + tmplength; pdma_sg->addresshigh = address_hi; pdma_sg->address = address_lo; @@ -1055,8 +1061,8 @@ static void arcmsr_build_srb(struct CommandControlBlock *srb, } else { arcmsr_cdb->DataLength = 0; } - srb->arc_cdb_size = arccdbsize; - arcmsr_cdb->msgPages = (arccdbsize/256) + ((arccdbsize % 256) ? 1 : 0); + srb->arc_cdb_size = arccdbsize; + arcmsr_cdb->msgPages = (arccdbsize/256) + ((arccdbsize % 256) ? 1 : 0); } /* ************************************************************************** @@ -1066,7 +1072,7 @@ static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandContr { u_int32_t cdb_phyaddr_low = (u_int32_t) srb->cdb_phyaddr_low; struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&srb->arcmsr_cdb; - + bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, (srb->srb_flags & SRB_FLAG_WRITE) ? BUS_DMASYNC_POSTWRITE:BUS_DMASYNC_POSTREAD); atomic_add_int(&acb->srboutstandingcount, 1); srb->srb_state = ARCMSR_SRB_START; @@ -1083,7 +1089,7 @@ static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandContr case ACB_ADAPTER_TYPE_B: { struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; int ending_index, index; - + index = phbbmu->postq_index; ending_index = ((index+1) % ARCMSR_MAX_HBB_POSTQUEUE); phbbmu->post_qbuffer[ending_index] = 0; @@ -1095,26 +1101,26 @@ static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandContr index++; index %= ARCMSR_MAX_HBB_POSTQUEUE; /*if last index number set it to 0 */ phbbmu->postq_index = index; - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_CDB_POSTED); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_DRV2IOP_CDB_POSTED); } break; - case ACB_ADAPTER_TYPE_C: { - u_int32_t ccb_post_stamp, arc_cdb_size, cdb_phyaddr_hi32; + case ACB_ADAPTER_TYPE_C: { + u_int32_t ccb_post_stamp, arc_cdb_size, cdb_phyaddr_hi32; - arc_cdb_size = (srb->arc_cdb_size > 0x300) ? 0x300 : srb->arc_cdb_size; - ccb_post_stamp = (cdb_phyaddr_low | ((arc_cdb_size-1) >> 6) | 1); + arc_cdb_size = (srb->arc_cdb_size > 0x300) ? 0x300 : srb->arc_cdb_size; + ccb_post_stamp = (cdb_phyaddr_low | ((arc_cdb_size-1) >> 6) | 1); cdb_phyaddr_hi32 = acb->srb_phyaddr.B.phyadd_high; - if(cdb_phyaddr_hi32) - { - CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_high, cdb_phyaddr_hi32); - CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp); - } - else - { - CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp); - } - } - break; + if(cdb_phyaddr_hi32) + { + CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_high, cdb_phyaddr_hi32); + CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp); + } + else + { + CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp); + } + } + break; case ACB_ADAPTER_TYPE_D: { struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; u_int16_t index_stripped; @@ -1152,29 +1158,29 @@ static void arcmsr_post_srb(struct AdapterControlBlock *acb, struct CommandContr static struct QBUFFER *arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb) { struct QBUFFER *qbuffer=NULL; - + switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct HBA_MessageUnit *phbamu = (struct HBA_MessageUnit *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbamu->message_rbuffer; } break; case ACB_ADAPTER_TYPE_B: { struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbbmu->hbb_rwbuffer->message_rbuffer; } break; case ACB_ADAPTER_TYPE_C: { struct HBC_MessageUnit *phbcmu = (struct HBC_MessageUnit *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbcmu->message_rbuffer; } break; case ACB_ADAPTER_TYPE_D: { struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_rbuffer; } break; @@ -1188,29 +1194,29 @@ static struct QBUFFER *arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb) static struct QBUFFER *arcmsr_get_iop_wqbuffer( struct AdapterControlBlock *acb) { struct QBUFFER *qbuffer = NULL; - + switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { struct HBA_MessageUnit *phbamu = (struct HBA_MessageUnit *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbamu->message_wbuffer; } break; case ACB_ADAPTER_TYPE_B: { struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbbmu->hbb_rwbuffer->message_wbuffer; } break; case ACB_ADAPTER_TYPE_C: { struct HBC_MessageUnit *phbcmu = (struct HBC_MessageUnit *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbcmu->message_wbuffer; } break; case ACB_ADAPTER_TYPE_D: { struct HBD_MessageUnit0 *phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; - + qbuffer = (struct QBUFFER *)&phbdmu->phbdmu->message_wbuffer; } break; @@ -1230,8 +1236,9 @@ static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) } break; case ACB_ADAPTER_TYPE_B: { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; /* let IOP know data has been read */ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK); } break; case ACB_ADAPTER_TYPE_C: { @@ -1262,11 +1269,12 @@ static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) } break; case ACB_ADAPTER_TYPE_B: { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; /* ** push inbound doorbell tell iop, driver data write ok ** and wait reply on next hwinterrupt for next Qbuffer post */ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_WRITE_OK); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_WRITE_OK); } break; case ACB_ADAPTER_TYPE_C: { @@ -1295,7 +1303,7 @@ static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) { acb->acb_flags &= ~ACB_F_MSG_START_BGRB; CHIP_REG_WRITE32(HBA_MessageUnit, - 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB); + 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_STOP_BGRB); if(!arcmsr_hba_wait_msgint_ready(acb)) { printf("arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , acb->pci_unit); @@ -1307,9 +1315,9 @@ static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) */ static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; acb->acb_flags &= ~ACB_F_MSG_START_BGRB; - CHIP_REG_WRITE32(HBB_DOORBELL, - 0, drv2iop_doorbell, ARCMSR_MESSAGE_STOP_BGRB); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_STOP_BGRB); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf( "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" , acb->pci_unit); @@ -1387,7 +1395,7 @@ static void arcmsr_poll(struct cam_sim *psim) ************************************************************************** */ static u_int32_t arcmsr_Read_iop_rqbuffer_data_D(struct AdapterControlBlock *acb, - struct QBUFFER *prbuffer) { + struct QBUFFER *prbuffer) { u_int8_t *pQbuffer; u_int8_t *buf1 = 0; @@ -1432,13 +1440,13 @@ static u_int32_t arcmsr_Read_iop_rqbuffer_data_D(struct AdapterControlBlock *acb ************************************************************************** */ static u_int32_t arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, - struct QBUFFER *prbuffer) { + struct QBUFFER *prbuffer) { u_int8_t *pQbuffer; u_int8_t *iop_data; u_int32_t iop_len; - if(acb->adapter_type == ACB_ADAPTER_TYPE_D) { + if(acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { return(arcmsr_Read_iop_rqbuffer_data_D(acb, prbuffer)); } iop_data = (u_int8_t *)prbuffer->data; @@ -1464,12 +1472,12 @@ static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) { struct QBUFFER *prbuffer; int my_empty_len; - + /*check this iop data if overflow my rqbuffer*/ ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); prbuffer = arcmsr_get_iop_rqbuffer(acb); my_empty_len = (acb->rqbuf_lastindex - acb->rqbuf_firstindex - 1) & - (ARCMSR_MAX_QBUFFER-1); + (ARCMSR_MAX_QBUFFER-1); if(my_empty_len >= prbuffer->data_len) { if(arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; @@ -1489,7 +1497,7 @@ static void arcmsr_Write_data_2iop_wqbuffer_D(struct AdapterControlBlock *acb) u_int8_t *buf1 = 0; u_int32_t *iop_data, *buf2 = 0; u_int32_t allxfer_len = 0, data_len; - + if(acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READ) { buf1 = malloc(128, M_DEVBUF, M_NOWAIT | M_ZERO); buf2 = (u_int32_t *)buf1; @@ -1532,8 +1540,8 @@ static void arcmsr_Write_data_2iop_wqbuffer(struct AdapterControlBlock *acb) struct QBUFFER *pwbuffer; u_int8_t *iop_data; int32_t allxfer_len=0; - - if(acb->adapter_type == ACB_ADAPTER_TYPE_D) { + + if(acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { arcmsr_Write_data_2iop_wqbuffer_D(acb); return; } @@ -1585,8 +1593,8 @@ static void arcmsr_rescanLun_cb(struct cam_periph *periph, union ccb *ccb) /* if (ccb->ccb_h.status != CAM_REQ_CMP) printf("arcmsr_rescanLun_cb: Rescan Target=%x, lun=%x," - "failure status=%x\n", ccb->ccb_h.target_id, - ccb->ccb_h.target_lun, ccb->ccb_h.status); + "failure status=%x\n", ccb->ccb_h.target_id, + ccb->ccb_h.target_lun, ccb->ccb_h.status); else printf("arcmsr_rescanLun_cb: Rescan lun successfully!\n"); */ @@ -1600,7 +1608,7 @@ static void arcmsr_rescan_lun(struct AdapterControlBlock *acb, int target, int l union ccb *ccb; if ((ccb = (union ccb *)xpt_alloc_ccb_nowait()) == NULL) - return; + return; if (xpt_create_path(&path, NULL, cam_sim_path(acb->psim), target, lun) != CAM_REQ_CMP) { xpt_free_ccb(ccb); @@ -1618,9 +1626,9 @@ static void arcmsr_rescan_lun(struct AdapterControlBlock *acb, int target, int l static void arcmsr_abort_dr_ccbs(struct AdapterControlBlock *acb, int target, int lun) { - struct CommandControlBlock *srb; + struct CommandControlBlock *srb; u_int32_t intmask_org; - int i; + int i; /* disable all outbound interrupts */ intmask_org = arcmsr_disable_allintr(acb); @@ -1629,13 +1637,13 @@ static void arcmsr_abort_dr_ccbs(struct AdapterControlBlock *acb, int target, in srb = acb->psrb_pool[i]; if (srb->srb_state == ARCMSR_SRB_START) { - if((target == srb->pccb->ccb_h.target_id) && (lun == srb->pccb->ccb_h.target_lun)) - { - srb->srb_state = ARCMSR_SRB_ABORTED; + if((target == srb->pccb->ccb_h.target_id) && (lun == srb->pccb->ccb_h.target_lun)) + { + srb->srb_state = ARCMSR_SRB_ABORTED; srb->pccb->ccb_h.status |= CAM_REQ_ABORTED; - arcmsr_srb_complete(srb, 1); + arcmsr_srb_complete(srb, 1); printf("arcmsr%d: abort scsi id %d lun %d srb=%p \n", acb->pci_unit, target, lun, srb); - } + } } } /* enable outbound Post Queue, outbound doorbell Interrupt */ @@ -1648,87 +1656,87 @@ static void arcmsr_abort_dr_ccbs(struct AdapterControlBlock *acb, int target, in static void arcmsr_dr_handle(struct AdapterControlBlock *acb) { u_int32_t devicemap; u_int32_t target, lun; - u_int32_t deviceMapCurrent[4]={0}; - u_int8_t *pDevMap; + u_int32_t deviceMapCurrent[4]={0}; + u_int8_t *pDevMap; switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: - devicemap = offsetof(struct HBA_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); - for (target = 0; target < 4; target++) - { - deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); - devicemap += 4; - } - break; + devicemap = offsetof(struct HBA_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); + for (target = 0; target < 4; target++) + { + deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); + devicemap += 4; + } + break; case ACB_ADAPTER_TYPE_B: - devicemap = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); - for (target = 0; target < 4; target++) - { - deviceMapCurrent[target]=bus_space_read_4(acb->btag[1], acb->bhandle[1], devicemap); - devicemap += 4; - } - break; + devicemap = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); + for (target = 0; target < 4; target++) + { + deviceMapCurrent[target]=bus_space_read_4(acb->btag[1], acb->bhandle[1], devicemap); + devicemap += 4; + } + break; case ACB_ADAPTER_TYPE_C: - devicemap = offsetof(struct HBC_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); - for (target = 0; target < 4; target++) - { - deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); - devicemap += 4; - } - break; + devicemap = offsetof(struct HBC_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); + for (target = 0; target < 4; target++) + { + deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); + devicemap += 4; + } + break; case ACB_ADAPTER_TYPE_D: - devicemap = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); - for (target = 0; target < 4; target++) - { - deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); - devicemap += 4; - } - break; - } - - if(acb->acb_flags & ACB_F_BUS_HANG_ON) + devicemap = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); + for (target = 0; target < 4; target++) { - acb->acb_flags &= ~ACB_F_BUS_HANG_ON; + deviceMapCurrent[target]=bus_space_read_4(acb->btag[0], acb->bhandle[0], devicemap); + devicemap += 4; } - /* - ** adapter posted CONFIG message - ** copy the new map, note if there are differences with the current map - */ - pDevMap = (u_int8_t *)&deviceMapCurrent[0]; - for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) + break; + } + + if(acb->acb_flags & ACB_F_BUS_HANG_ON) + { + acb->acb_flags &= ~ACB_F_BUS_HANG_ON; + } + /* + ** adapter posted CONFIG message + ** copy the new map, note if there are differences with the current map + */ + pDevMap = (u_int8_t *)&deviceMapCurrent[0]; + for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) + { + if (*pDevMap != acb->device_map[target]) { - if (*pDevMap != acb->device_map[target]) + u_int8_t difference, bit_check; + + difference = *pDevMap ^ acb->device_map[target]; + for(lun=0; lun < ARCMSR_MAX_TARGETLUN; lun++) { - u_int8_t difference, bit_check; - - difference = *pDevMap ^ acb->device_map[target]; - for(lun=0; lun < ARCMSR_MAX_TARGETLUN; lun++) - { - bit_check = (1 << lun); /*check bit from 0....31*/ - if(difference & bit_check) - { - if(acb->device_map[target] & bit_check) - {/* unit departed */ - printf("arcmsr_dr_handle: Target=%x, lun=%x, GONE!!!\n",target,lun); - arcmsr_abort_dr_ccbs(acb, target, lun); - arcmsr_rescan_lun(acb, target, lun); - acb->devstate[target][lun] = ARECA_RAID_GONE; - } - else - {/* unit arrived */ - printf("arcmsr_dr_handle: Target=%x, lun=%x, Plug-IN!!!\n",target,lun); - arcmsr_rescan_lun(acb, target, lun); - acb->devstate[target][lun] = ARECA_RAID_GOOD; - } - } - } -/* printf("arcmsr_dr_handle: acb->device_map[%x]=0x%x, deviceMapCurrent[%x]=%x\n",target,acb->device_map[target],target,*pDevMap); */ - acb->device_map[target] = *pDevMap; + bit_check = (1 << lun); /*check bit from 0....31*/ + if(difference & bit_check) + { + if(acb->device_map[target] & bit_check) + {/* unit departed */ + printf("arcmsr_dr_handle: Target=%x, lun=%x, GONE!!!\n",target,lun); + arcmsr_abort_dr_ccbs(acb, target, lun); + arcmsr_rescan_lun(acb, target, lun); + acb->devstate[target][lun] = ARECA_RAID_GONE; + } + else + {/* unit arrived */ + printf("arcmsr_dr_handle: Target=%x, lun=%x, Plug-IN!!!\n",target,lun); + arcmsr_rescan_lun(acb, target, lun); + acb->devstate[target][lun] = ARECA_RAID_GOOD; + } + } } - pDevMap++; +/* printf("arcmsr_dr_handle: acb->device_map[%x]=0x%x, deviceMapCurrent[%x]=%x\n",target,acb->device_map[target],target,*pDevMap); */ + acb->device_map[target] = *pDevMap; } + pDevMap++; + } } /* ************************************************************************** @@ -1748,9 +1756,10 @@ static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) { */ static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) { u_int32_t outbound_message; + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; /* clear interrupts */ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN); + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN); outbound_message = CHIP_REG_READ32(HBB_RWBUFFER, 1, msgcode_rwbuffer[0]); if (outbound_message == ARCMSR_SIGNATURE_GET_CONFIG) arcmsr_dr_handle( acb ); @@ -1785,8 +1794,8 @@ static void arcmsr_hbd_message_isr(struct AdapterControlBlock *acb) { */ static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) { - u_int32_t outbound_doorbell; - + u_int32_t doorbell_status; + /* ******************************************************************* ** Maybe here we need to check wrqbuffer_lock is lock or not @@ -1794,14 +1803,12 @@ static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) ** check if there are any mail need to pack from firmware ******************************************************************* */ - outbound_doorbell = CHIP_REG_READ32(HBA_MessageUnit, - 0, outbound_doorbell); - CHIP_REG_WRITE32(HBA_MessageUnit, - 0, outbound_doorbell, outbound_doorbell); /* clear doorbell interrupt */ - if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { + doorbell_status = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_doorbell); + CHIP_REG_WRITE32(HBA_MessageUnit, 0, outbound_doorbell, doorbell_status); /* clear doorbell interrupt */ + if(doorbell_status & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); } - if(outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { + if(doorbell_status & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { arcmsr_iop2drv_data_read_handle(acb); } } @@ -1811,8 +1818,8 @@ static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) */ static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *acb) { - u_int32_t outbound_doorbell; - + u_int32_t doorbell_status; + /* ******************************************************************* ** Maybe here we need to check wrqbuffer_lock is lock or not @@ -1820,15 +1827,15 @@ static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *acb) ** check if there are any mail need to pack from firmware ******************************************************************* */ - outbound_doorbell = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell); - CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, outbound_doorbell); /* clear doorbell interrupt */ - if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { + doorbell_status = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_doorbell); + CHIP_REG_WRITE32(HBC_MessageUnit, 0, outbound_doorbell_clear, doorbell_status); /* clear doorbell interrupt */ + if(doorbell_status & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); } - if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) { + if(doorbell_status & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) { arcmsr_iop2drv_data_read_handle(acb); } - if(outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { + if(doorbell_status & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { arcmsr_hbc_message_isr(acb); /* messenger of "driver to iop commands" */ } } @@ -1838,8 +1845,8 @@ static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *acb) */ static void arcmsr_hbd_doorbell_isr(struct AdapterControlBlock *acb) { - u_int32_t outbound_Doorbell; - + u_int32_t doorbell_status; + /* ******************************************************************* ** Maybe here we need to check wrqbuffer_lock is lock or not @@ -1847,22 +1854,22 @@ static void arcmsr_hbd_doorbell_isr(struct AdapterControlBlock *acb) ** check if there are any mail need to pack from firmware ******************************************************************* */ - outbound_Doorbell = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_F0_DOORBELL_CAUSE; - if(outbound_Doorbell) - CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, outbound_Doorbell); /* clear doorbell interrupt */ - while( outbound_Doorbell & ARCMSR_HBDMU_F0_DOORBELL_CAUSE ) { - if(outbound_Doorbell & ARCMSR_HBDMU_IOP2DRV_DATA_WRITE_OK) { + doorbell_status = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_F0_DOORBELL_CAUSE; + if(doorbell_status) + CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, doorbell_status); /* clear doorbell interrupt */ + while( doorbell_status & ARCMSR_HBDMU_F0_DOORBELL_CAUSE ) { + if(doorbell_status & ARCMSR_HBDMU_IOP2DRV_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); } - if(outbound_Doorbell & ARCMSR_HBDMU_IOP2DRV_DATA_READ_OK) { + if(doorbell_status & ARCMSR_HBDMU_IOP2DRV_DATA_READ_OK) { arcmsr_iop2drv_data_read_handle(acb); } - if(outbound_Doorbell & ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE) { + if(doorbell_status & ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE) { arcmsr_hbd_message_isr(acb); /* messenger of "driver to iop commands" */ } - outbound_Doorbell = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_F0_DOORBELL_CAUSE; - if(outbound_Doorbell) - CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, outbound_Doorbell); /* clear doorbell interrupt */ + doorbell_status = CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_F0_DOORBELL_CAUSE; + if(doorbell_status) + CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, doorbell_status); /* clear doorbell interrupt */ } } /* @@ -1873,7 +1880,7 @@ static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) { u_int32_t flag_srb; u_int16_t error; - + /* ***************************************************************************** ** areca cdb command done @@ -1884,7 +1891,7 @@ static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) while((flag_srb = CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_queueport)) != 0xFFFFFFFF) { /* check if command done with no error*/ - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0) ? TRUE : FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0) ? TRUE : FALSE; arcmsr_drain_donequeue(acb, flag_srb, error); } /*drain reply FIFO*/ } @@ -1913,7 +1920,7 @@ static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) index %= ARCMSR_MAX_HBB_POSTQUEUE; /*if last index number set it to 0 */ phbbmu->doneq_index = index; /* check if command done with no error*/ - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; arcmsr_drain_donequeue(acb, flag_srb, error); } /*drain reply FIFO*/ } @@ -1925,26 +1932,26 @@ static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb) { u_int32_t flag_srb,throttling = 0; u_int16_t error; - + /* ***************************************************************************** ** areca cdb command done ***************************************************************************** */ bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - - while(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) { - + do { flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low); + if (flag_srb == 0xFFFFFFFF) + break; /* check if command done with no error*/ - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; arcmsr_drain_donequeue(acb, flag_srb, error); - throttling++; - if(throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { - CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING); + throttling++; + if(throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { + CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell,ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING); throttling = 0; - } - } /*drain reply FIFO*/ + } + } while(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR); } /* ********************************************************************** @@ -1988,8 +1995,8 @@ static void arcmsr_hbd_postqueue_isr(struct AdapterControlBlock *acb) ***************************************************************************** */ if((CHIP_REG_READ32(HBD_MessageUnit, 0, outboundlist_interrupt_cause) & - ARCMSR_HBDMU_OUTBOUND_LIST_INTERRUPT) == 0) - return; + ARCMSR_HBDMU_OUTBOUND_LIST_INTERRUPT) == 0) + return; bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); outbound_write_pointer = phbdmu->done_qbuffer[0].addressLow; @@ -2042,19 +2049,20 @@ static void arcmsr_handle_hba_isr( struct AdapterControlBlock *acb) static void arcmsr_handle_hbb_isr( struct AdapterControlBlock *acb) { u_int32_t outbound_doorbell; + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; /* ********************************************* ** check outbound intstatus ********************************************* */ - outbound_doorbell = CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & acb->outbound_int_enable; + outbound_doorbell = READ_CHIP_REG32(0, phbbmu->iop2drv_doorbell) & acb->outbound_int_enable; if(!outbound_doorbell) { /*it must be share irq*/ return; } - CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ~outbound_doorbell); /* clear doorbell interrupt */ - CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell); - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT); + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell, ~outbound_doorbell); /* clear doorbell interrupt */ + READ_CHIP_REG32(0, phbbmu->iop2drv_doorbell); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT); /* MU ioctl transfer doorbell interrupts*/ if(outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { arcmsr_iop2drv_data_wrote_handle(acb); @@ -2082,19 +2090,24 @@ static void arcmsr_handle_hbc_isr( struct AdapterControlBlock *acb) ** check outbound intstatus ********************************************* */ - host_interrupt_status = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status); + host_interrupt_status = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & + (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | + ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR); if(!host_interrupt_status) { /*it must be share irq*/ return; } - /* MU doorbell interrupts*/ - if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) { - arcmsr_hbc_doorbell_isr(acb); - } - /* MU post queue interrupts*/ - if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) { - arcmsr_hbc_postqueue_isr(acb); - } + do { + /* MU doorbell interrupts*/ + if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) { + arcmsr_hbc_doorbell_isr(acb); + } + /* MU post queue interrupts*/ + if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) { + arcmsr_hbc_postqueue_isr(acb); + } + host_interrupt_status = CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status); + } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)); } /* ********************************************************************** @@ -2161,7 +2174,7 @@ static void arcmsr_interrupt(struct AdapterControlBlock *acb) static void arcmsr_intr_handler(void *arg) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)arg; - + ARCMSR_LOCK_ACQUIRE(&acb->isr_lock); arcmsr_interrupt(acb); ARCMSR_LOCK_RELEASE(&acb->isr_lock); @@ -2174,22 +2187,24 @@ static void arcmsr_polling_devmap(void *arg) { struct AdapterControlBlock *acb = (struct AdapterControlBlock *)arg; switch (acb->adapter_type) { - case ACB_ADAPTER_TYPE_A: - CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); - break; + case ACB_ADAPTER_TYPE_A: + CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); + break; - case ACB_ADAPTER_TYPE_B: - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG); - break; + case ACB_ADAPTER_TYPE_B: { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG); + } + break; - case ACB_ADAPTER_TYPE_C: - CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); - CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); - break; + case ACB_ADAPTER_TYPE_C: + CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); + CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); + break; - case ACB_ADAPTER_TYPE_D: - CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); - break; + case ACB_ADAPTER_TYPE_D: + CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); + break; } if((acb->acb_flags & ACB_F_SCSISTOPADAPTER) == 0) @@ -2226,7 +2241,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c { struct CMD_MESSAGE_FIELD *pcmdmessagefld; u_int32_t retvalue = EINVAL; - + pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) arg; if(memcmp(pcmdmessagefld->cmdmessage.Signature, "ARCMSR", 6)!=0) { return retvalue; @@ -2237,7 +2252,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c u_int8_t *pQbuffer; u_int8_t *ptmpQbuffer = pcmdmessagefld->messagedatabuffer; u_int32_t allxfer_len=0; - + while((acb->rqbuf_firstindex != acb->rqbuf_lastindex) && (allxfer_len < 1031)) { /*copy READ QBUFFER to srb*/ @@ -2251,7 +2266,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c } if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { struct QBUFFER *prbuffer; - + acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; prbuffer = arcmsr_get_iop_rqbuffer(acb); if(arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) @@ -2266,7 +2281,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c u_int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; u_int8_t *pQbuffer; u_int8_t *ptmpuserbuffer = pcmdmessagefld->messagedatabuffer; - + user_len = pcmdmessagefld->cmdmessage.Length; /*check if data xfer length of this request will overflow my array qbuffer */ wqbuf_lastindex = acb->wqbuf_lastindex; @@ -2276,7 +2291,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_ERROR; } else { my_empty_len = (wqbuf_firstindex - wqbuf_lastindex - 1) & - (ARCMSR_MAX_QBUFFER - 1); + (ARCMSR_MAX_QBUFFER - 1); if(my_empty_len >= user_len) { while(user_len > 0) { /*copy srb data to wqbuffer*/ @@ -2303,7 +2318,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c break; case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { u_int8_t *pQbuffer = acb->rqbuffer; - + if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; arcmsr_iop_message_read(acb); @@ -2320,10 +2335,10 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { u_int8_t *pQbuffer = acb->wqbuffer; - + if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; - arcmsr_iop_message_read(acb); + arcmsr_iop_message_read(acb); /*signature, let IOP know data has been readed */ } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED|ACB_F_MESSAGE_WQBUFFER_READ); @@ -2336,10 +2351,10 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c break; case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { u_int8_t *pQbuffer; - + if(acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; - arcmsr_iop_message_read(acb); + arcmsr_iop_message_read(acb); /*signature, let IOP know data has been readed */ } acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED @@ -2365,7 +2380,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c case ARCMSR_MESSAGE_SAY_HELLO: { u_int8_t *hello_string = "Hello! I am ARCMSR"; u_int8_t *puserbuffer = (u_int8_t *)pcmdmessagefld->messagedatabuffer; - + if(memcpy(puserbuffer, hello_string, (int16_t)strlen(hello_string))) { pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_ERROR; ARCMSR_LOCK_RELEASE(&acb->qbuffer_lock); @@ -2396,7 +2411,7 @@ u_int32_t arcmsr_iop_ioctlcmd(struct AdapterControlBlock *acb, u_int32_t ioctl_c static void arcmsr_free_srb(struct CommandControlBlock *srb) { struct AdapterControlBlock *acb; - + acb = srb->acb; ARCMSR_LOCK_ACQUIRE(&acb->srb_lock); srb->srb_state = ARCMSR_SRB_DONE; @@ -2460,7 +2475,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p u_int8_t *pQbuffer; u_int8_t *ptmpQbuffer = pcmdmessagefld->messagedatabuffer; int32_t allxfer_len = 0; - + ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) && (allxfer_len < 1031)) { @@ -2473,7 +2488,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p } if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { struct QBUFFER *prbuffer; - + acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; prbuffer = arcmsr_get_iop_rqbuffer(acb); if(arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) @@ -2489,7 +2504,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; u_int8_t *pQbuffer; u_int8_t *ptmpuserbuffer = pcmdmessagefld->messagedatabuffer; - + user_len = pcmdmessagefld->cmdmessage.Length; ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); wqbuf_lastindex = acb->wqbuf_lastindex; @@ -2497,7 +2512,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p if (wqbuf_lastindex != wqbuf_firstindex) { arcmsr_Write_data_2iop_wqbuffer(acb); /* has error report sensedata */ - if(pccb->csio.sense_len) { + if(pccb->csio.sense_len) { ((u_int8_t *)&pccb->csio.sense_data)[0] = (0x1 << 7 | 0x70); /* Valid,ErrorCode */ ((u_int8_t *)&pccb->csio.sense_data)[2] = 0x05; @@ -2545,7 +2560,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p break; case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { u_int8_t *pQbuffer = acb->rqbuffer; - + ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; @@ -2562,7 +2577,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p break; case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { u_int8_t *pQbuffer = acb->wqbuffer; - + ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; @@ -2581,7 +2596,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p break; case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { u_int8_t *pQbuffer; - + ARCMSR_LOCK_ACQUIRE(&acb->qbuffer_lock); if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; @@ -2609,7 +2624,7 @@ static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, union ccb *p break; case ARCMSR_MESSAGE_SAY_HELLO: { int8_t *hello_string = "Hello! I am ARCMSR"; - + memcpy(pcmdmessagefld->messagedatabuffer, hello_string , (int16_t)strlen(hello_string)); pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; @@ -2637,7 +2652,7 @@ static void arcmsr_execute_srb(void *arg, bus_dma_segment_t *dm_segs, int nseg, struct AdapterControlBlock *acb = (struct AdapterControlBlock *)srb->acb; union ccb *pccb; int target, lun; - + pccb = srb->pccb; target = pccb->ccb_h.target_id; lun = pccb->ccb_h.target_lun; @@ -2719,7 +2734,7 @@ static u_int8_t arcmsr_seek_cmd2abort(union ccb *abortccb) struct AdapterControlBlock *acb = (struct AdapterControlBlock *) abortccb->ccb_h.arcmsr_ccbacb_ptr; u_int32_t intmask_org; int i = 0; - + acb->num_aborts++; /* *************************************************************************** @@ -2761,7 +2776,7 @@ static u_int8_t arcmsr_seek_cmd2abort(union ccb *abortccb) static void arcmsr_bus_reset(struct AdapterControlBlock *acb) { int retry = 0; - + acb->num_resets++; acb->acb_flags |= ACB_F_BUS_RESET; while(acb->srboutstandingcount != 0 && retry < 400) { @@ -2791,10 +2806,10 @@ static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, char *buffer = pccb->csio.data_ptr; inqdata[0] = T_PROCESSOR; /* Periph Qualifier & Periph Dev Type */ - inqdata[1] = 0; /* rem media bit & Dev Type Modifier */ - inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */ + inqdata[1] = 0; /* rem media bit & Dev Type Modifier */ + inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */ inqdata[3] = 0; - inqdata[4] = 31; /* length of additional data */ + inqdata[4] = 31; /* length of additional data */ inqdata[5] = 0; inqdata[6] = 0; inqdata[7] = 0; @@ -2825,7 +2840,7 @@ static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) { struct AdapterControlBlock *acb; - + acb = (struct AdapterControlBlock *) cam_sim_softc(psim); if(acb == NULL) { pccb->ccb_h.status |= CAM_REQ_INVALID; @@ -2837,7 +2852,7 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) struct CommandControlBlock *srb; int target = pccb->ccb_h.target_id; int error; - + if(target == 16) { /* virtual device for iop message transfer */ arcmsr_handle_virtual_command(acb, pccb); @@ -2884,7 +2899,9 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN); cpi->unit_number = cam_sim_unit(psim); #ifdef CAM_NEW_TRAN_CODE - if(acb->adapter_bus_speed == ACB_BUS_SPEED_6G) + if(acb->adapter_bus_speed == ACB_BUS_SPEED_12G) + cpi->base_transfer_speed = 1200000; + else if(acb->adapter_bus_speed == ACB_BUS_SPEED_6G) cpi->base_transfer_speed = 600000; else cpi->base_transfer_speed = 300000; @@ -2938,8 +2955,8 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) } case XPT_RESET_BUS: case XPT_RESET_DEV: { - u_int32_t i; - + u_int32_t i; + arcmsr_bus_reset(acb); for (i=0; i < 500; i++) { DELAY(1000); @@ -2955,7 +2972,7 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) } case XPT_GET_TRAN_SETTINGS: { struct ccb_trans_settings *cts; - + if(pccb->ccb_h.target_id == 16) { pccb->ccb_h.status |= CAM_FUNC_NOTAVAIL; xpt_done(pccb); @@ -2967,7 +2984,7 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) struct ccb_trans_settings_scsi *scsi; struct ccb_trans_settings_spi *spi; struct ccb_trans_settings_sas *sas; - + scsi = &cts->proto_specific.scsi; scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; scsi->valid = CTS_SCSI_VALID_TQ; @@ -2982,10 +2999,11 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) cts->transport = XPORT_SAS; sas = &cts->xport_specific.sas; sas->valid = CTS_SAS_VALID_SPEED; - if((acb->vendor_device_id == PCIDevVenIDARC1880) || - (acb->vendor_device_id == PCIDevVenIDARC1214)) + if (acb->adapter_bus_speed == ACB_BUS_SPEED_12G) + sas->bitrate = 1200000; + else if(acb->adapter_bus_speed == ACB_BUS_SPEED_6G) sas->bitrate = 600000; - else if(acb->vendor_device_id == PCIDevVenIDARC1680) + else if(acb->adapter_bus_speed == ACB_BUS_SPEED_3G) sas->bitrate = 300000; } else @@ -2995,7 +3013,10 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) cts->transport = XPORT_SPI; spi = &cts->xport_specific.spi; spi->flags = CTS_SPI_FLAGS_DISC_ENB; - spi->sync_period = 2; + if (acb->adapter_bus_speed == ACB_BUS_SPEED_6G) + spi->sync_period = 1; + else + spi->sync_period = 2; spi->sync_offset = 32; spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT; spi->valid = CTS_SPI_VALID_DISC @@ -3007,7 +3028,10 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb) #else { cts->flags = (CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB); - cts->sync_period = 2; + if (acb->adapter_bus_speed == ACB_BUS_SPEED_6G) + cts->sync_period = 1; + else + cts->sync_period = 2; cts->sync_offset = 32; cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT; cts->valid = CCB_TRANS_SYNC_RATE_VALID | @@ -3090,8 +3114,9 @@ static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) */ static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; acb->acb_flags |= ACB_F_MSG_START_BGRB; - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_START_BGRB); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_START_BGRB); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf( "arcmsr%d: wait 'start adapter background rebulid' timeout \n", acb->pci_unit); } @@ -3152,7 +3177,7 @@ static void arcmsr_polling_hba_srbdone(struct AdapterControlBlock *acb, struct C struct CommandControlBlock *srb; u_int32_t flag_srb, outbound_intstatus, poll_srb_done=0, poll_count=0; u_int16_t error; - + polling_ccb_retry: poll_count++; outbound_intstatus=CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_intstatus) & acb->outbound_int_enable; @@ -3174,7 +3199,7 @@ polling_ccb_retry: /* check if command done with no error*/ srb = (struct CommandControlBlock *) (acb->vir2phy_offset+(flag_srb << 5));/*frame must be 32 bytes aligned*/ - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; poll_srb_done = (srb == poll_srb) ? 1:0; if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) { if(srb->srb_state == ARCMSR_SRB_ABORTED) { @@ -3208,11 +3233,10 @@ static void arcmsr_polling_hbb_srbdone(struct AdapterControlBlock *acb, struct C u_int32_t flag_srb, poll_srb_done=0, poll_count=0; int index; u_int16_t error; - + polling_ccb_retry: poll_count++; - CHIP_REG_WRITE32(HBB_DOORBELL, - 0, iop2drv_doorbell, ARCMSR_DOORBELL_INT_CLEAR_PATTERN); /* clear doorbell interrupt */ + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell, ARCMSR_DOORBELL_INT_CLEAR_PATTERN); /* clear doorbell interrupt */ bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); while(1) { index = phbbmu->doneq_index; @@ -3221,7 +3245,7 @@ polling_ccb_retry: break;/*chip FIFO no ccb for completion already*/ } else { UDELAY(25000); - if ((poll_count > 100) && (poll_srb != NULL)) { + if ((poll_count > 100) && (poll_srb != NULL)) { break; } goto polling_ccb_retry; @@ -3234,7 +3258,7 @@ polling_ccb_retry: /* check if command done with no error*/ srb = (struct CommandControlBlock *) (acb->vir2phy_offset+(flag_srb << 5));/*frame must be 32 bytes aligned*/ - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE0)?TRUE:FALSE; poll_srb_done = (srb == poll_srb) ? 1:0; if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) { if(srb->srb_state == ARCMSR_SRB_ABORTED) { @@ -3266,7 +3290,7 @@ static void arcmsr_polling_hbc_srbdone(struct AdapterControlBlock *acb, struct C struct CommandControlBlock *srb; u_int32_t flag_srb, poll_srb_done=0, poll_count=0; u_int16_t error; - + polling_ccb_retry: poll_count++; bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); @@ -3276,19 +3300,19 @@ polling_ccb_retry: break;/*chip FIFO no ccb for completion already*/ } else { UDELAY(25000); - if ((poll_count > 100) && (poll_srb != NULL)) { + if ((poll_count > 100) && (poll_srb != NULL)) { break; } - if (acb->srboutstandingcount == 0) { + if (acb->srboutstandingcount == 0) { break; - } + } goto polling_ccb_retry; } } flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low); /* check if command done with no error*/ srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb & 0xFFFFFFE0));/*frame must be 32 bytes aligned*/ - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1)?TRUE:FALSE; if (poll_srb != NULL) poll_srb_done = (srb == poll_srb) ? 1:0; if((srb->acb != acb) || (srb->srb_state != ARCMSR_SRB_START)) { @@ -3318,7 +3342,7 @@ static void arcmsr_polling_hbd_srbdone(struct AdapterControlBlock *acb, struct C u_int32_t flag_srb, poll_srb_done=0, poll_count=0; u_int32_t outbound_write_pointer; u_int16_t error, doneq_index; - + polling_ccb_retry: poll_count++; bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); @@ -3330,12 +3354,12 @@ polling_ccb_retry: break;/*chip FIFO no ccb for completion already*/ } else { UDELAY(25000); - if ((poll_count > 100) && (poll_srb != NULL)) { + if ((poll_count > 100) && (poll_srb != NULL)) { + break; + } + if (acb->srboutstandingcount == 0) { break; } - if (acb->srboutstandingcount == 0) { - break; - } goto polling_ccb_retry; } } @@ -3343,7 +3367,7 @@ polling_ccb_retry: flag_srb = phbdmu->done_qbuffer[(doneq_index & 0xFF)+1].addressLow; /* check if command done with no error*/ srb = (struct CommandControlBlock *)(acb->vir2phy_offset+(flag_srb & 0xFFFFFFE0));/*frame must be 32 bytes aligned*/ - error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE; + error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE; CHIP_REG_WRITE32(HBD_MessageUnit, 0, outboundlist_read_pointer, doneq_index); if (poll_srb != NULL) poll_srb_done = (srb == poll_srb) ? 1:0; @@ -3400,7 +3424,7 @@ static void arcmsr_get_hba_config(struct AdapterControlBlock *acb) size_t iop_firm_version = offsetof(struct HBA_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/ size_t iop_device_map = offsetof(struct HBA_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); int i; - + CHIP_REG_WRITE32(HBA_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); if(!arcmsr_hba_wait_msgint_ready(acb)) { printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit); @@ -3442,6 +3466,7 @@ static void arcmsr_get_hba_config(struct AdapterControlBlock *acb) */ static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb) { + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; char *acb_firm_model = acb->firm_model; char *acb_firm_version = acb->firm_version; char *acb_device_map = acb->device_map; @@ -3449,8 +3474,8 @@ static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb) size_t iop_firm_version = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/ size_t iop_device_map = offsetof(struct HBB_RWBUFFER, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); int i; - - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG); + + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_GET_CONFIG); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf( "arcmsr%d: wait" "'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit); } @@ -3498,7 +3523,7 @@ static void arcmsr_get_hbc_config(struct AdapterControlBlock *acb) size_t iop_firm_version = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/ size_t iop_device_map = offsetof(struct HBC_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); int i; - + CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); CHIP_REG_WRITE32(HBC_MessageUnit, 0, inbound_doorbell, ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE); if(!arcmsr_hbc_wait_msgint_ready(acb)) { @@ -3548,7 +3573,7 @@ static void arcmsr_get_hbd_config(struct AdapterControlBlock *acb) size_t iop_firm_version = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/ size_t iop_device_map = offsetof(struct HBD_MessageUnit, msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]); int i; - + if(CHIP_REG_READ32(HBD_MessageUnit, 0, outbound_doorbell) & ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE) CHIP_REG_WRITE32(HBD_MessageUnit, 0, outbound_doorbell, ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE_CLEAR); CHIP_REG_WRITE32(HBD_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG); @@ -3576,10 +3601,10 @@ static void arcmsr_get_hbd_config(struct AdapterControlBlock *acb) i++; } printf("Areca RAID adapter%d: %s F/W version %s \n", acb->pci_unit, acb->firm_model, acb->firm_version); - acb->firm_request_len = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_request_len, 1, 04-07*/ - acb->firm_numbers_queue = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_numbers_queue, 2, 08-11*/ - acb->firm_sdram_size = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_sdram_size, 3, 12-15*/ - acb->firm_ide_channels = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[5]); /*firm_ide_channels, 4, 16-19*/ + acb->firm_request_len = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[1]); /*firm_request_len, 1, 04-07*/ + acb->firm_numbers_queue = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[2]); /*firm_numbers_queue, 2, 08-11*/ + acb->firm_sdram_size = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[3]); /*firm_sdram_size, 3, 12-15*/ + acb->firm_ide_channels = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[4]); /*firm_ide_channels, 4, 16-19*/ acb->firm_cfg_version = CHIP_REG_READ32(HBD_MessageUnit, 0, msgcode_rwbuffer[ARCMSR_FW_CFGVER_OFFSET]); /*firm_cfg_version, 25, */ if(acb->firm_numbers_queue > ARCMSR_MAX_HBD_POSTQUEUE) acb->maxOutstanding = ARCMSR_MAX_HBD_POSTQUEUE - 1; @@ -3618,7 +3643,7 @@ static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb) { int timeout=0; - + switch (acb->adapter_type) { case ACB_ADAPTER_TYPE_A: { while ((CHIP_REG_READ32(HBA_MessageUnit, 0, outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) @@ -3633,7 +3658,8 @@ static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb) } break; case ACB_ADAPTER_TYPE_B: { - while ((CHIP_REG_READ32(HBB_DOORBELL, 0, iop2drv_doorbell) & ARCMSR_MESSAGE_FIRMWARE_OK) == 0) + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; + while ((READ_CHIP_REG32(0, phbbmu->iop2drv_doorbell) & ARCMSR_MESSAGE_FIRMWARE_OK) == 0) { if (timeout++ > 2000) /* (2000*15)/1000 = 30 sec */ { @@ -3642,7 +3668,7 @@ static void arcmsr_wait_firmware_ready( struct AdapterControlBlock *acb) } UDELAY(15000); /* wait 15 milli-seconds */ } - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_DRV2IOP_END_OF_INTERRUPT); } break; case ACB_ADAPTER_TYPE_C: { @@ -3689,8 +3715,9 @@ static void arcmsr_clear_doorbell_queue_buffer( struct AdapterControlBlock *acb) } break; case ACB_ADAPTER_TYPE_B: { - CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt and message state*/ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK); + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; + WRITE_CHIP_REG32(0, phbbmu->iop2drv_doorbell, ARCMSR_MESSAGE_INT_CLEAR_PATTERN);/*clear interrupt and message state*/ + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_DRV2IOP_DATA_READ_OK); /* let IOP know data has been read */ } break; @@ -3722,7 +3749,7 @@ static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb) unsigned long srb_phyaddr; u_int32_t srb_phyaddr_hi32; u_int32_t srb_phyaddr_lo32; - + /* ******************************************************************** ** here we need to tell iop 331 our freesrb.HighPart @@ -3753,11 +3780,11 @@ static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb) case ACB_ADAPTER_TYPE_B: { u_int32_t post_queue_phyaddr; struct HBB_MessageUnit *phbbmu; - + phbbmu = (struct HBB_MessageUnit *)acb->pmu; phbbmu->postq_index = 0; phbbmu->doneq_index = 0; - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_SET_POST_WINDOW); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_SET_POST_WINDOW); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf( "arcmsr%d: 'set window of post command Q' timeout\n", acb->pci_unit); return FALSE; @@ -3769,12 +3796,12 @@ static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb) CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[2], post_queue_phyaddr); /* postQ size (256+8)*4 */ CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[3], post_queue_phyaddr+1056); /* doneQ size (256+8)*4 */ CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[4], 1056); /* srb maxQ size must be --> [(256+8)*4] */ - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_SET_CONFIG); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_SET_CONFIG); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf( "arcmsr%d: 'set command Q window' timeout \n", acb->pci_unit); return FALSE; } - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell, ARCMSR_MESSAGE_START_DRIVER_MODE); + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_START_DRIVER_MODE); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf( "arcmsr%d: 'start diver mode' timeout \n", acb->pci_unit); return FALSE; @@ -3797,7 +3824,7 @@ static u_int32_t arcmsr_iop_confirm(struct AdapterControlBlock *acb) case ACB_ADAPTER_TYPE_D: { u_int32_t post_queue_phyaddr, done_queue_phyaddr; struct HBD_MessageUnit0 *phbdmu; - + phbdmu = (struct HBD_MessageUnit0 *)acb->pmu; phbdmu->postq_index = 0; phbdmu->doneq_index = 0x40FF; @@ -3833,7 +3860,8 @@ static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) case ACB_ADAPTER_TYPE_D: break; case ACB_ADAPTER_TYPE_B: { - CHIP_REG_WRITE32(HBB_DOORBELL, 0, drv2iop_doorbell,ARCMSR_MESSAGE_ACTIVE_EOI_MODE); + struct HBB_MessageUnit *phbbmu = (struct HBB_MessageUnit *)acb->pmu; + WRITE_CHIP_REG32(0, phbbmu->drv2iop_doorbell, ARCMSR_MESSAGE_ACTIVE_EOI_MODE); if(!arcmsr_hbb_wait_msgint_ready(acb)) { printf( "arcmsr%d: 'iop enable eoi mode' timeout \n", acb->pci_unit); return; @@ -3849,7 +3877,7 @@ static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) static void arcmsr_iop_init(struct AdapterControlBlock *acb) { u_int32_t intmask_org; - + /* disable all outbound interrupt */ intmask_org = arcmsr_disable_allintr(acb); arcmsr_wait_firmware_ready(acb); @@ -3874,7 +3902,7 @@ static void arcmsr_map_free_srb(void *arg, bus_dma_segment_t *segs, int nseg, in struct CommandControlBlock *srb_tmp; u_int32_t i; unsigned long srb_phyaddr = (unsigned long)segs->ds_addr; - + acb->srb_phyaddr.phyaddr = srb_phyaddr; srb_tmp = (struct CommandControlBlock *)acb->uncacheptr; for(i=0; i < ARCMSR_MAX_FREESRB_NUM; i++) { @@ -3950,13 +3978,17 @@ static u_int32_t arcmsr_initialize(device_t dev) vendor_dev_id = pci_get_devid(dev); acb->vendor_device_id = vendor_dev_id; + acb->sub_device_id = pci_read_config(dev, PCIR_SUBDEV_0, 2); switch (vendor_dev_id) { case PCIDevVenIDARC1880: case PCIDevVenIDARC1882: case PCIDevVenIDARC1213: case PCIDevVenIDARC1223: { acb->adapter_type = ACB_ADAPTER_TYPE_C; - acb->adapter_bus_speed = ACB_BUS_SPEED_6G; + if (acb->sub_device_id == ARECA_SUB_DEV_ID_1883) + acb->adapter_bus_speed = ACB_BUS_SPEED_12G; + else + acb->adapter_bus_speed = ACB_BUS_SPEED_6G; max_coherent_size = ARCMSR_SRBS_POOL_SIZE; } break; @@ -3973,6 +4005,12 @@ static u_int32_t arcmsr_initialize(device_t dev) max_coherent_size = ARCMSR_SRBS_POOL_SIZE + (sizeof(struct HBB_MessageUnit)); } break; + case PCIDevVenIDARC1203: { + acb->adapter_type = ACB_ADAPTER_TYPE_B; + acb->adapter_bus_speed = ACB_BUS_SPEED_6G; + max_coherent_size = ARCMSR_SRBS_POOL_SIZE + (sizeof(struct HBB_MessageUnit)); + } + break; case PCIDevVenIDARC1110: case PCIDevVenIDARC1120: case PCIDevVenIDARC1130: @@ -4008,47 +4046,47 @@ static u_int32_t arcmsr_initialize(device_t dev) #else if(bus_dma_tag_create( /*PCI parent*/ NULL, #endif - /*alignemnt*/ 1, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, - /*nsegments*/ BUS_SPACE_UNRESTRICTED, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, + /*alignemnt*/ 1, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, + /*filterarg*/ NULL, + /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, + /*nsegments*/ BUS_SPACE_UNRESTRICTED, + /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, + /*flags*/ 0, #if __FreeBSD_version >= 501102 - /*lockfunc*/ NULL, - /*lockarg*/ NULL, + /*lockfunc*/ NULL, + /*lockarg*/ NULL, #endif - &acb->parent_dmat) != 0) + &acb->parent_dmat) != 0) { printf("arcmsr%d: parent_dmat bus_dma_tag_create failure!\n", device_get_unit(dev)); return ENOMEM; } /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */ - if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, - /*alignment*/ 1, - /*boundary*/ 0, + if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, + /*alignment*/ 1, + /*boundary*/ 0, #ifdef PAE - /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, #else - /*lowaddr*/ BUS_SPACE_MAXADDR, + /*lowaddr*/ BUS_SPACE_MAXADDR, #endif - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ ARCMSR_MAX_SG_ENTRIES * PAGE_SIZE * ARCMSR_MAX_FREESRB_NUM, - /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, + /*filterarg*/ NULL, + /*maxsize*/ ARCMSR_MAX_SG_ENTRIES * PAGE_SIZE * ARCMSR_MAX_FREESRB_NUM, + /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, + /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, + /*flags*/ 0, #if __FreeBSD_version >= 501102 - /*lockfunc*/ busdma_lock_mutex, - /*lockarg*/ &acb->isr_lock, + /*lockfunc*/ busdma_lock_mutex, + /*lockarg*/ &acb->isr_lock, #endif - &acb->dm_segs_dmat) != 0) + &acb->dm_segs_dmat) != 0) { bus_dma_tag_destroy(acb->parent_dmat); printf("arcmsr%d: dm_segs_dmat bus_dma_tag_create failure!\n", device_get_unit(dev)); @@ -4056,22 +4094,22 @@ static u_int32_t arcmsr_initialize(device_t dev) } /* DMA tag for our srb structures.... Allocate the freesrb memory */ - if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, - /*alignment*/ 0x20, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ max_coherent_size, - /*nsegments*/ 1, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, + if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, + /*alignment*/ 0x20, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, + /*filterarg*/ NULL, + /*maxsize*/ max_coherent_size, + /*nsegments*/ 1, + /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, + /*flags*/ 0, #if __FreeBSD_version >= 501102 - /*lockfunc*/ NULL, - /*lockarg*/ NULL, + /*lockfunc*/ NULL, + /*lockarg*/ NULL, #endif - &acb->srb_dmat) != 0) + &acb->srb_dmat) != 0) { bus_dma_tag_destroy(acb->dm_segs_dmat); bus_dma_tag_destroy(acb->parent_dmat); @@ -4132,10 +4170,15 @@ static u_int32_t arcmsr_initialize(device_t dev) struct CommandControlBlock *freesrb; u_int32_t rid[]={ PCIR_BAR(0), PCIR_BAR(2) }; vm_offset_t mem_base[]={0,0}; + u_long size; + if (vendor_dev_id == PCIDevVenIDARC1203) + size = sizeof(struct HBB_DOORBELL_1203); + else + size = sizeof(struct HBB_DOORBELL); for(i=0; i < 2; i++) { if(i == 0) { acb->sys_res_arcmsr[i] = bus_alloc_resource(dev,SYS_RES_MEMORY, &rid[i], - 0ul, ~0ul, sizeof(struct HBB_DOORBELL), RF_ACTIVE); + 0ul, ~0ul, size, RF_ACTIVE); } else { acb->sys_res_arcmsr[i] = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid[i], 0ul, ~0ul, sizeof(struct HBB_RWBUFFER), RF_ACTIVE); @@ -4164,6 +4207,17 @@ static u_int32_t arcmsr_initialize(device_t dev) phbbmu = (struct HBB_MessageUnit *)acb->pmu; phbbmu->hbb_doorbell = (struct HBB_DOORBELL *)mem_base[0]; phbbmu->hbb_rwbuffer = (struct HBB_RWBUFFER *)mem_base[1]; + if (vendor_dev_id == PCIDevVenIDARC1203) { + phbbmu->drv2iop_doorbell = offsetof(struct HBB_DOORBELL_1203, drv2iop_doorbell); + phbbmu->drv2iop_doorbell_mask = offsetof(struct HBB_DOORBELL_1203, drv2iop_doorbell_mask); + phbbmu->iop2drv_doorbell = offsetof(struct HBB_DOORBELL_1203, iop2drv_doorbell); + phbbmu->iop2drv_doorbell_mask = offsetof(struct HBB_DOORBELL_1203, iop2drv_doorbell_mask); + } else { + phbbmu->drv2iop_doorbell = offsetof(struct HBB_DOORBELL, drv2iop_doorbell); + phbbmu->drv2iop_doorbell_mask = offsetof(struct HBB_DOORBELL, drv2iop_doorbell_mask); + phbbmu->iop2drv_doorbell = offsetof(struct HBB_DOORBELL, iop2drv_doorbell); + phbbmu->iop2drv_doorbell_mask = offsetof(struct HBB_DOORBELL, iop2drv_doorbell_mask); + } } break; case ACB_ADAPTER_TYPE_C: { @@ -4254,7 +4308,7 @@ static int arcmsr_attach(device_t dev) struct cam_devq *devq; /* Device Queue to use for this SIM */ struct resource *irqres; int rid; - + if(acb == NULL) { printf("arcmsr%d: cannot allocate softc\n", unit); return (ENOMEM); @@ -4288,9 +4342,9 @@ static int arcmsr_attach(device_t dev) * Create device queue of SIM(s) * (MAX_START_JOB - 1) : * max_sim_transactions */ - devq = cam_simq_alloc(ARCMSR_MAX_START_JOB); + devq = cam_simq_alloc(acb->maxOutstanding); if(devq == NULL) { - arcmsr_free_resource(acb); + arcmsr_free_resource(acb); bus_release_resource(dev, SYS_RES_IRQ, 0, acb->irqres); arcmsr_mutex_destroy(acb); printf("arcmsr%d: cam_simq_alloc failure!\n", unit); @@ -4362,14 +4416,16 @@ static int arcmsr_attach(device_t dev) static int arcmsr_probe(device_t dev) { u_int32_t id; + u_int16_t sub_device_id; static char buf[256]; char x_type[]={"unknown"}; char *type; int raid6 = 1; - + if (pci_get_vendor(dev) != PCI_VENDOR_ID_ARECA) { return (ENXIO); } + sub_device_id = pci_read_config(dev, PCIR_SUBDEV_0, 2); switch(id = pci_get_devid(dev)) { case PCIDevVenIDARC1110: case PCIDevVenIDARC1200: @@ -4402,9 +4458,13 @@ static int arcmsr_probe(device_t dev) case PCIDevVenIDARC1882: case PCIDevVenIDARC1213: case PCIDevVenIDARC1223: - type = "SAS 6G"; + if (sub_device_id == ARECA_SUB_DEV_ID_1883) + type = "SAS 12G"; + else + type = "SAS 6G"; break; case PCIDevVenIDARC1214: + case PCIDevVenIDARC1203: type = "SATA 6G"; break; default: @@ -4429,7 +4489,7 @@ static int arcmsr_shutdown(device_t dev) u_int32_t intmask_org; struct CommandControlBlock *srb; struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); - + /* stop adapter background rebuild */ ARCMSR_LOCK_ACQUIRE(&acb->isr_lock); /* disable all outbound interrupt */ @@ -4469,7 +4529,7 @@ static int arcmsr_detach(device_t dev) { struct AdapterControlBlock *acb=(struct AdapterControlBlock *)device_get_softc(dev); int i; - + callout_stop(&acb->devmap_callout); bus_teardown_intr(dev, acb->irqres, acb->ih); arcmsr_shutdown(dev); diff --git a/sys/dev/arcmsr/arcmsr.h b/sys/dev/arcmsr/arcmsr.h index e4f2d6f..aa613ad 100644 --- a/sys/dev/arcmsr/arcmsr.h +++ b/sys/dev/arcmsr/arcmsr.h @@ -34,23 +34,23 @@ ************************************************************************** * $FreeBSD$ */ -#define ARCMSR_SCSI_INITIATOR_ID 255 -#define ARCMSR_DEV_SECTOR_SIZE 512 -#define ARCMSR_MAX_XFER_SECTORS 4096 -#define ARCMSR_MAX_TARGETID 17 /*16 max target id + 1*/ -#define ARCMSR_MAX_TARGETLUN 8 /*8*/ -#define ARCMSR_MAX_CHIPTYPE_NUM 4 -#define ARCMSR_MAX_OUTSTANDING_CMD 256 -#define ARCMSR_MAX_START_JOB 256 -#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD -#define ARCMSR_MAX_FREESRB_NUM 384 -#define ARCMSR_MAX_QBUFFER 4096 /* ioctl QBUFFER */ -#define ARCMSR_MAX_SG_ENTRIES 38 /* max 38*/ -#define ARCMSR_MAX_ADAPTER 4 -#define ARCMSR_RELEASE_SIMQ_LEVEL 230 -#define ARCMSR_MAX_HBB_POSTQUEUE 264 /* (ARCMSR_MAX_OUTSTANDING_CMD+8) */ -#define ARCMSR_MAX_HBD_POSTQUEUE 256 -#define ARCMSR_TIMEOUT_DELAY 60 /* in sec */ +#define ARCMSR_SCSI_INITIATOR_ID 255 +#define ARCMSR_DEV_SECTOR_SIZE 512 +#define ARCMSR_MAX_XFER_SECTORS 4096 +#define ARCMSR_MAX_TARGETID 17 /*16 max target id + 1*/ +#define ARCMSR_MAX_TARGETLUN 8 /*8*/ +#define ARCMSR_MAX_CHIPTYPE_NUM 4 +#define ARCMSR_MAX_OUTSTANDING_CMD 256 +#define ARCMSR_MAX_START_JOB 256 +#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD +#define ARCMSR_MAX_FREESRB_NUM 384 +#define ARCMSR_MAX_QBUFFER 4096 /* ioctl QBUFFER */ +#define ARCMSR_MAX_SG_ENTRIES 38 /* max 38*/ +#define ARCMSR_MAX_ADAPTER 4 +#define ARCMSR_RELEASE_SIMQ_LEVEL 230 +#define ARCMSR_MAX_HBB_POSTQUEUE 264 /* (ARCMSR_MAX_OUTSTANDING_CMD+8) */ +#define ARCMSR_MAX_HBD_POSTQUEUE 256 +#define ARCMSR_TIMEOUT_DELAY 60 /* in sec */ /* ********************************************************************* */ @@ -75,7 +75,7 @@ #define ARCMSR_LOCK_RELEASE(l) mtx_unlock(l) #define ARCMSR_LOCK_TRY(l) mtx_trylock(l) #define arcmsr_htole32(x) htole32(x) - typedef struct mtx arcmsr_lock_t; + typedef struct mtx arcmsr_lock_t; #else #define ARCMSR_LOCK_INIT(l, s) simple_lock_init(l) #define ARCMSR_LOCK_DESTROY(l) @@ -91,7 +91,7 @@ ** ********************************************************************************** */ -#define PCI_VENDOR_ID_ARECA 0x17D3 /* Vendor ID */ +#define PCI_VENDOR_ID_ARECA 0x17D3 /* Vendor ID */ #define PCI_DEVICE_ID_ARECA_1110 0x1110 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1120 0x1120 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */ @@ -99,6 +99,7 @@ #define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1203 0x1203 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1210 0x1210 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1212 0x1212 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1214 0x1214 /* Device ID */ @@ -118,6 +119,7 @@ #define ARECA_SUB_DEV_ID_1880 0x1880 /* Subsystem Device ID */ #define ARECA_SUB_DEV_ID_1882 0x1882 /* Subsystem Device ID */ +#define ARECA_SUB_DEV_ID_1883 0x1883 /* Subsystem Device ID */ #define ARECA_SUB_DEV_ID_1212 0x1212 /* Subsystem Device ID */ #define ARECA_SUB_DEV_ID_1213 0x1213 /* Subsystem Device ID */ #define ARECA_SUB_DEV_ID_1222 0x1222 /* Subsystem Device ID */ @@ -130,13 +132,14 @@ #define PCIDevVenIDARC1170 0x117017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1200 0x120017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1201 0x120117D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1203 0x120317D3 /* Vendor Device ID */ #define PCIDevVenIDARC1210 0x121017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1212 0x121217D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1213 0x121317D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1214 0x121417D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1213 0x121317D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1214 0x121417D3 /* Vendor Device ID */ #define PCIDevVenIDARC1220 0x122017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1222 0x122217D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1223 0x122317D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1223 0x122317D3 /* Vendor Device ID */ #define PCIDevVenIDARC1230 0x123017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1231 0x123117D3 /* Vendor Device ID */ #define PCIDevVenIDARC1260 0x126017D3 /* Vendor Device ID */ @@ -148,7 +151,7 @@ #define PCIDevVenIDARC1680 0x168017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1681 0x168117D3 /* Vendor Device ID */ #define PCIDevVenIDARC1880 0x188017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1882 0x188217D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1882 0x188217D3 /* Vendor Device ID */ #ifndef PCIR_BARS #define PCIR_BARS 0x10 @@ -175,18 +178,20 @@ ** ********************************************************************************** */ -#define arcmsr_ccbsrb_ptr spriv_ptr0 -#define arcmsr_ccbacb_ptr spriv_ptr1 -#define dma_addr_hi32(addr) (u_int32_t) ((addr>>16)>>16) -#define dma_addr_lo32(addr) (u_int32_t) (addr & 0xffffffff) -#define get_min(x,y) ((x) < (y) ? (x) : (y)) -#define get_max(x,y) ((x) < (y) ? (y) : (x)) +#define arcmsr_ccbsrb_ptr spriv_ptr0 +#define arcmsr_ccbacb_ptr spriv_ptr1 +#define dma_addr_hi32(addr) (u_int32_t) ((addr>>16)>>16) +#define dma_addr_lo32(addr) (u_int32_t) (addr & 0xffffffff) +#define get_min(x,y) ((x) < (y) ? (x) : (y)) +#define get_max(x,y) ((x) < (y) ? (y) : (x)) /* ************************************************************************** ************************************************************************** */ -#define CHIP_REG_READ32(s, b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r)) +#define CHIP_REG_READ32(s, b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r)) #define CHIP_REG_WRITE32(s, b, r, d) bus_space_write_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r), d) +#define READ_CHIP_REG32(b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], r) +#define WRITE_CHIP_REG32(b, r, d) bus_space_write_4(acb->btag[b], acb->bhandle[b], r, d) /* ********************************************************************************** ** IOCTL CONTROL Mail Box @@ -209,17 +214,17 @@ struct CMD_MESSAGE_FIELD { /************************************************************************/ /************************************************************************/ -#define ARCMSR_IOP_ERROR_ILLEGALPCI 0x0001 -#define ARCMSR_IOP_ERROR_VENDORID 0x0002 -#define ARCMSR_IOP_ERROR_DEVICEID 0x0002 -#define ARCMSR_IOP_ERROR_ILLEGALCDB 0x0003 -#define ARCMSR_IOP_ERROR_UNKNOW_CDBERR 0x0004 -#define ARCMSR_SYS_ERROR_MEMORY_ALLOCATE 0x0005 -#define ARCMSR_SYS_ERROR_MEMORY_CROSS4G 0x0006 -#define ARCMSR_SYS_ERROR_MEMORY_LACK 0x0007 -#define ARCMSR_SYS_ERROR_MEMORY_RANGE 0x0008 -#define ARCMSR_SYS_ERROR_DEVICE_BASE 0x0009 -#define ARCMSR_SYS_ERROR_PORT_VALIDATE 0x000A +#define ARCMSR_IOP_ERROR_ILLEGALPCI 0x0001 +#define ARCMSR_IOP_ERROR_VENDORID 0x0002 +#define ARCMSR_IOP_ERROR_DEVICEID 0x0002 +#define ARCMSR_IOP_ERROR_ILLEGALCDB 0x0003 +#define ARCMSR_IOP_ERROR_UNKNOW_CDBERR 0x0004 +#define ARCMSR_SYS_ERROR_MEMORY_ALLOCATE 0x0005 +#define ARCMSR_SYS_ERROR_MEMORY_CROSS4G 0x0006 +#define ARCMSR_SYS_ERROR_MEMORY_LACK 0x0007 +#define ARCMSR_SYS_ERROR_MEMORY_RANGE 0x0008 +#define ARCMSR_SYS_ERROR_DEVICE_BASE 0x0009 +#define ARCMSR_SYS_ERROR_PORT_VALIDATE 0x000A /*DeviceType*/ #define ARECA_SATA_RAID 0x90000000 @@ -251,44 +256,44 @@ struct CMD_MESSAGE_FIELD { #define ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE _IOWR('F', FUNCTION_FLUSH_ADAPTER_CACHE, struct CMD_MESSAGE_FIELD) /* ARECA IOCTL ReturnCode */ -#define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 -#define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 -#define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F -#define ARCMSR_IOCTL_RETURNCODE_BUS_HANG_ON 0x00000088 +#define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 +#define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 +#define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F +#define ARCMSR_IOCTL_RETURNCODE_BUS_HANG_ON 0x00000088 /* ************************************************************************ ** SPEC. for Areca HBA adapter ************************************************************************ */ /* signature of set and get firmware config */ -#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 -#define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 +#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 +#define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 /* message code of inbound message register */ -#define ARCMSR_INBOUND_MESG0_NOP 0x00000000 -#define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 -#define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 -#define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 -#define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 -#define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 -#define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 -#define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 -#define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 +#define ARCMSR_INBOUND_MESG0_NOP 0x00000000 +#define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 +#define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 +#define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 +#define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 +#define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 +#define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 +#define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 +#define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 /* doorbell interrupt generator */ -#define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 -#define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 -#define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 -#define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 +#define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 +#define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 +#define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 +#define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 /* srb areca cdb flag */ -#define ARCMSR_SRBPOST_FLAG_SGL_BSIZE 0x80000000 -#define ARCMSR_SRBPOST_FLAG_IAM_BIOS 0x40000000 -#define ARCMSR_SRBREPLY_FLAG_IAM_BIOS 0x40000000 -#define ARCMSR_SRBREPLY_FLAG_ERROR 0x10000000 -#define ARCMSR_SRBREPLY_FLAG_ERROR_MODE0 0x10000000 -#define ARCMSR_SRBREPLY_FLAG_ERROR_MODE1 0x00000001 +#define ARCMSR_SRBPOST_FLAG_SGL_BSIZE 0x80000000 +#define ARCMSR_SRBPOST_FLAG_IAM_BIOS 0x40000000 +#define ARCMSR_SRBREPLY_FLAG_IAM_BIOS 0x40000000 +#define ARCMSR_SRBREPLY_FLAG_ERROR 0x10000000 +#define ARCMSR_SRBREPLY_FLAG_ERROR_MODE0 0x10000000 +#define ARCMSR_SRBREPLY_FLAG_ERROR_MODE1 0x00000001 /* outbound firmware ok */ -#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 +#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 -#define ARCMSR_ARC1680_BUS_RESET 0x00000003 +#define ARCMSR_ARC1680_BUS_RESET 0x00000003 /* ************************************************************************ ** SPEC. for Areca HBB adapter @@ -300,26 +305,31 @@ struct CMD_MESSAGE_FIELD { #define ARCMSR_IOP2DRV_DOORBELL 0x00020408 /* window of "instruction flags" from iop to driver */ #define ARCMSR_IOP2DRV_DOORBELL_MASK 0x0002040C +#define ARCMSR_IOP2DRV_DOORBELL_1203 0x00021870 /* window of "instruction flags" from iop to driver */ +#define ARCMSR_IOP2DRV_DOORBELL_MASK_1203 0x00021874 +#define ARCMSR_DRV2IOP_DOORBELL_1203 0x00021878 /* window of "instruction flags" from driver to iop */ +#define ARCMSR_DRV2IOP_DOORBELL_MASK_1203 0x0002187C + /* ARECA FLAG LANGUAGE */ #define ARCMSR_IOP2DRV_DATA_WRITE_OK 0x00000001 /* ioctl transfer */ #define ARCMSR_IOP2DRV_DATA_READ_OK 0x00000002 /* ioctl transfer */ #define ARCMSR_IOP2DRV_CDB_DONE 0x00000004 #define ARCMSR_IOP2DRV_MESSAGE_CMD_DONE 0x00000008 -#define ARCMSR_DOORBELL_HANDLE_INT 0x0000000F +#define ARCMSR_DOORBELL_HANDLE_INT 0x0000000F #define ARCMSR_DOORBELL_INT_CLEAR_PATTERN 0xFF00FFF0 #define ARCMSR_MESSAGE_INT_CLEAR_PATTERN 0xFF00FFF7 -#define ARCMSR_MESSAGE_GET_CONFIG 0x00010008 /* (ARCMSR_INBOUND_MESG0_GET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ -#define ARCMSR_MESSAGE_SET_CONFIG 0x00020008 /* (ARCMSR_INBOUND_MESG0_SET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ -#define ARCMSR_MESSAGE_ABORT_CMD 0x00030008 /* (ARCMSR_INBOUND_MESG0_ABORT_CMD<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ -#define ARCMSR_MESSAGE_STOP_BGRB 0x00040008 /* (ARCMSR_INBOUND_MESG0_STOP_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ +#define ARCMSR_MESSAGE_GET_CONFIG 0x00010008 /* (ARCMSR_INBOUND_MESG0_GET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ +#define ARCMSR_MESSAGE_SET_CONFIG 0x00020008 /* (ARCMSR_INBOUND_MESG0_SET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ +#define ARCMSR_MESSAGE_ABORT_CMD 0x00030008 /* (ARCMSR_INBOUND_MESG0_ABORT_CMD<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ +#define ARCMSR_MESSAGE_STOP_BGRB 0x00040008 /* (ARCMSR_INBOUND_MESG0_STOP_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ #define ARCMSR_MESSAGE_FLUSH_CACHE 0x00050008 /* (ARCMSR_INBOUND_MESG0_FLUSH_CACHE<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ -#define ARCMSR_MESSAGE_START_BGRB 0x00060008 /* (ARCMSR_INBOUND_MESG0_START_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ -#define ARCMSR_MESSAGE_START_DRIVER_MODE 0x000E0008 -#define ARCMSR_MESSAGE_SET_POST_WINDOW 0x000F0008 -#define ARCMSR_MESSAGE_ACTIVE_EOI_MODE 0x00100008 -#define ARCMSR_MESSAGE_FIRMWARE_OK 0x80000000 /* ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK */ +#define ARCMSR_MESSAGE_START_BGRB 0x00060008 /* (ARCMSR_INBOUND_MESG0_START_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ +#define ARCMSR_MESSAGE_START_DRIVER_MODE 0x000E0008 +#define ARCMSR_MESSAGE_SET_POST_WINDOW 0x000F0008 +#define ARCMSR_MESSAGE_ACTIVE_EOI_MODE 0x00100008 +#define ARCMSR_MESSAGE_FIRMWARE_OK 0x80000000 /* ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK */ #define ARCMSR_DRV2IOP_DATA_WRITE_OK 0x00000001 /* ioctl transfer */ #define ARCMSR_DRV2IOP_DATA_READ_OK 0x00000002 /* ioctl transfer */ @@ -328,13 +338,13 @@ struct CMD_MESSAGE_FIELD { #define ARCMSR_DRV2IOP_END_OF_INTERRUPT 0x00000010 /* */ /* data tunnel buffer between user space program and its firmware */ -#define ARCMSR_MSGCODE_RWBUFFER 0x0000fa00 /* iop msgcode_rwbuffer for message command */ -#define ARCMSR_IOCTL_WBUFFER 0x0000fe00 /* user space data to iop 128bytes */ -#define ARCMSR_IOCTL_RBUFFER 0x0000ff00 /* iop data to user space 128bytes */ -#define ARCMSR_HBB_BASE0_OFFSET 0x00000010 -#define ARCMSR_HBB_BASE1_OFFSET 0x00000018 -#define ARCMSR_HBB_BASE0_LEN 0x00021000 -#define ARCMSR_HBB_BASE1_LEN 0x00010000 +#define ARCMSR_MSGCODE_RWBUFFER 0x0000fa00 /* iop msgcode_rwbuffer for message command */ +#define ARCMSR_IOCTL_WBUFFER 0x0000fe00 /* user space data to iop 128bytes */ +#define ARCMSR_IOCTL_RBUFFER 0x0000ff00 /* iop data to user space 128bytes */ +#define ARCMSR_HBB_BASE0_OFFSET 0x00000010 +#define ARCMSR_HBB_BASE1_OFFSET 0x00000018 +#define ARCMSR_HBB_BASE0_LEN 0x00021000 +#define ARCMSR_HBB_BASE1_LEN 0x00010000 /* ************************************************************************ ** SPEC. for Areca HBC adapter @@ -382,64 +392,64 @@ struct CMD_MESSAGE_FIELD { #define ARCMSR_HBCMU_IOP2DRV_DATA_READ_DOORBELL_CLEAR 0x00000004/*outbound DATA READ isr door bell clear*/ #define ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE 0x00000008/*outbound message 0 ready*/ #define ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR 0x00000008/*outbound message cmd isr door bell clear*/ -#define ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK 0x80000000/*ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK*/ +#define ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK 0x80000000/*ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK*/ #define ARCMSR_HBCMU_RESET_ADAPTER 0x00000024 -#define ARCMSR_HBCMU_DiagWrite_ENABLE 0x00000080 +#define ARCMSR_HBCMU_DiagWrite_ENABLE 0x00000080 /* ************************************************************************ ** SPEC. for Areca HBD adapter ************************************************************************ */ -#define ARCMSR_HBDMU_CHIP_ID 0x00004 +#define ARCMSR_HBDMU_CHIP_ID 0x00004 #define ARCMSR_HBDMU_CPU_MEMORY_CONFIGURATION 0x00008 -#define ARCMSR_HBDMU_I2_HOST_INTERRUPT_MASK 0x00034 -#define ARCMSR_HBDMU_MAIN_INTERRUPT_STATUS 0x00200 +#define ARCMSR_HBDMU_I2_HOST_INTERRUPT_MASK 0x00034 +#define ARCMSR_HBDMU_MAIN_INTERRUPT_STATUS 0x00200 #define ARCMSR_HBDMU_PCIE_F0_INTERRUPT_ENABLE 0x0020C -#define ARCMSR_HBDMU_INBOUND_MESSAGE0 0x00400 -#define ARCMSR_HBDMU_INBOUND_MESSAGE1 0x00404 -#define ARCMSR_HBDMU_OUTBOUND_MESSAGE0 0x00420 -#define ARCMSR_HBDMU_OUTBOUND_MESSAGE1 0x00424 -#define ARCMSR_HBDMU_INBOUND_DOORBELL 0x00460 -#define ARCMSR_HBDMU_OUTBOUND_DOORBELL 0x00480 +#define ARCMSR_HBDMU_INBOUND_MESSAGE0 0x00400 +#define ARCMSR_HBDMU_INBOUND_MESSAGE1 0x00404 +#define ARCMSR_HBDMU_OUTBOUND_MESSAGE0 0x00420 +#define ARCMSR_HBDMU_OUTBOUND_MESSAGE1 0x00424 +#define ARCMSR_HBDMU_INBOUND_DOORBELL 0x00460 +#define ARCMSR_HBDMU_OUTBOUND_DOORBELL 0x00480 #define ARCMSR_HBDMU_OUTBOUND_DOORBELL_ENABLE 0x00484 -#define ARCMSR_HBDMU_INBOUND_LIST_BASE_LOW 0x01000 -#define ARCMSR_HBDMU_INBOUND_LIST_BASE_HIGH 0x01004 +#define ARCMSR_HBDMU_INBOUND_LIST_BASE_LOW 0x01000 +#define ARCMSR_HBDMU_INBOUND_LIST_BASE_HIGH 0x01004 #define ARCMSR_HBDMU_INBOUND_LIST_WRITE_POINTER 0x01018 -#define ARCMSR_HBDMU_OUTBOUND_LIST_BASE_LOW 0x01060 +#define ARCMSR_HBDMU_OUTBOUND_LIST_BASE_LOW 0x01060 #define ARCMSR_HBDMU_OUTBOUND_LIST_BASE_HIGH 0x01064 #define ARCMSR_HBDMU_OUTBOUND_LIST_COPY_POINTER 0x0106C #define ARCMSR_HBDMU_OUTBOUND_LIST_READ_POINTER 0x01070 #define ARCMSR_HBDMU_OUTBOUND_INTERRUPT_CAUSE 0x01088 #define ARCMSR_HBDMU_OUTBOUND_INTERRUPT_ENABLE 0x0108C -#define ARCMSR_HBDMU_MESSAGE_WBUFFER 0x02000 -#define ARCMSR_HBDMU_MESSAGE_RBUFFER 0x02100 -#define ARCMSR_HBDMU_MESSAGE_RWBUFFER 0x02200 +#define ARCMSR_HBDMU_MESSAGE_WBUFFER 0x02000 +#define ARCMSR_HBDMU_MESSAGE_RBUFFER 0x02100 +#define ARCMSR_HBDMU_MESSAGE_RWBUFFER 0x02200 -#define ARCMSR_HBDMU_ISR_THROTTLING_LEVEL 16 -#define ARCMSR_HBDMU_ISR_MAX_DONE_QUEUE 20 +#define ARCMSR_HBDMU_ISR_THROTTLING_LEVEL 16 +#define ARCMSR_HBDMU_ISR_MAX_DONE_QUEUE 20 /* Host Interrupt Mask */ -#define ARCMSR_HBDMU_ALL_INT_ENABLE 0x00001010 /* enable all ISR */ -#define ARCMSR_HBDMU_ALL_INT_DISABLE 0x00000000 /* disable all ISR */ +#define ARCMSR_HBDMU_ALL_INT_ENABLE 0x00001010 /* enable all ISR */ +#define ARCMSR_HBDMU_ALL_INT_DISABLE 0x00000000 /* disable all ISR */ /* Host Interrupt Status */ -#define ARCMSR_HBDMU_OUTBOUND_INT 0x00001010 -#define ARCMSR_HBDMU_OUTBOUND_DOORBELL_INT 0x00001000 -#define ARCMSR_HBDMU_OUTBOUND_POSTQUEUE_INT 0x00000010 +#define ARCMSR_HBDMU_OUTBOUND_INT 0x00001010 +#define ARCMSR_HBDMU_OUTBOUND_DOORBELL_INT 0x00001000 +#define ARCMSR_HBDMU_OUTBOUND_POSTQUEUE_INT 0x00000010 /* DoorBell*/ -#define ARCMSR_HBDMU_DRV2IOP_DATA_IN_READY 0x00000001 -#define ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ 0x00000002 +#define ARCMSR_HBDMU_DRV2IOP_DATA_IN_READY 0x00000001 +#define ARCMSR_HBDMU_DRV2IOP_DATA_OUT_READ 0x00000002 -#define ARCMSR_HBDMU_IOP2DRV_DATA_WRITE_OK 0x00000001 -#define ARCMSR_HBDMU_IOP2DRV_DATA_READ_OK 0x00000002 +#define ARCMSR_HBDMU_IOP2DRV_DATA_WRITE_OK 0x00000001 +#define ARCMSR_HBDMU_IOP2DRV_DATA_READ_OK 0x00000002 /*outbound message 0 ready*/ #define ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE 0x02000000 -#define ARCMSR_HBDMU_F0_DOORBELL_CAUSE 0x02000003 +#define ARCMSR_HBDMU_F0_DOORBELL_CAUSE 0x02000003 /*outbound message cmd isr door bell clear*/ #define ARCMSR_HBDMU_IOP2DRV_MESSAGE_CMD_DONE_CLEAR 0x02000000 @@ -449,7 +459,7 @@ struct CMD_MESSAGE_FIELD { #define ARCMSR_HBDMU_OUTBOUND_LIST_INTERRUPT_CLEAR 0x00000001 /*ARCMSR_HBAMU_MESSAGE_FIRMWARE_OK*/ -#define ARCMSR_HBDMU_MESSAGE_FIRMWARE_OK 0x80000000 +#define ARCMSR_HBDMU_MESSAGE_FIRMWARE_OK 0x80000000 /* ********************************************************************* ** Message Unit structure @@ -457,41 +467,49 @@ struct CMD_MESSAGE_FIELD { */ struct HBA_MessageUnit { - u_int32_t resrved0[4]; /*0000 000F*/ - u_int32_t inbound_msgaddr0; /*0010 0013*/ - u_int32_t inbound_msgaddr1; /*0014 0017*/ - u_int32_t outbound_msgaddr0; /*0018 001B*/ - u_int32_t outbound_msgaddr1; /*001C 001F*/ - u_int32_t inbound_doorbell; /*0020 0023*/ - u_int32_t inbound_intstatus; /*0024 0027*/ - u_int32_t inbound_intmask; /*0028 002B*/ - u_int32_t outbound_doorbell; /*002C 002F*/ - u_int32_t outbound_intstatus; /*0030 0033*/ - u_int32_t outbound_intmask; /*0034 0037*/ - u_int32_t reserved1[2]; /*0038 003F*/ - u_int32_t inbound_queueport; /*0040 0043*/ - u_int32_t outbound_queueport; /*0044 0047*/ - u_int32_t reserved2[2]; /*0048 004F*/ - u_int32_t reserved3[492]; /*0050 07FF ......local_buffer 492*/ - u_int32_t reserved4[128]; /*0800 09FF 128*/ - u_int32_t msgcode_rwbuffer[256]; /*0a00 0DFF 256*/ - u_int32_t message_wbuffer[32]; /*0E00 0E7F 32*/ - u_int32_t reserved5[32]; /*0E80 0EFF 32*/ - u_int32_t message_rbuffer[32]; /*0F00 0F7F 32*/ - u_int32_t reserved6[32]; /*0F80 0FFF 32*/ + u_int32_t resrved0[4]; /*0000 000F*/ + u_int32_t inbound_msgaddr0; /*0010 0013*/ + u_int32_t inbound_msgaddr1; /*0014 0017*/ + u_int32_t outbound_msgaddr0; /*0018 001B*/ + u_int32_t outbound_msgaddr1; /*001C 001F*/ + u_int32_t inbound_doorbell; /*0020 0023*/ + u_int32_t inbound_intstatus; /*0024 0027*/ + u_int32_t inbound_intmask; /*0028 002B*/ + u_int32_t outbound_doorbell; /*002C 002F*/ + u_int32_t outbound_intstatus; /*0030 0033*/ + u_int32_t outbound_intmask; /*0034 0037*/ + u_int32_t reserved1[2]; /*0038 003F*/ + u_int32_t inbound_queueport; /*0040 0043*/ + u_int32_t outbound_queueport; /*0044 0047*/ + u_int32_t reserved2[2]; /*0048 004F*/ + u_int32_t reserved3[492]; /*0050 07FF ......local_buffer 492*/ + u_int32_t reserved4[128]; /*0800 09FF 128*/ + u_int32_t msgcode_rwbuffer[256]; /*0a00 0DFF 256*/ + u_int32_t message_wbuffer[32]; /*0E00 0E7F 32*/ + u_int32_t reserved5[32]; /*0E80 0EFF 32*/ + u_int32_t message_rbuffer[32]; /*0F00 0F7F 32*/ + u_int32_t reserved6[32]; /*0F80 0FFF 32*/ }; /* ********************************************************************* ** ********************************************************************* */ +struct HBB_DOORBELL_1203 +{ + u_int8_t doorbell_reserved[ARCMSR_IOP2DRV_DOORBELL_1203]; /*reserved */ + u_int32_t iop2drv_doorbell; /*offset 0x00021870:00,01,02,03: window of "instruction flags" from iop to driver */ + u_int32_t iop2drv_doorbell_mask; /* 04,05,06,07: doorbell mask */ + u_int32_t drv2iop_doorbell; /* 08,09,10,11: window of "instruction flags" from driver to iop */ + u_int32_t drv2iop_doorbell_mask; /* 12,13,14,15: doorbell mask */ +}; struct HBB_DOORBELL { - u_int8_t doorbell_reserved[ARCMSR_DRV2IOP_DOORBELL]; /*reserved */ - u_int32_t drv2iop_doorbell; /*offset 0x00020400:00,01,02,03: window of "instruction flags" from driver to iop */ - u_int32_t drv2iop_doorbell_mask; /* 04,05,06,07: doorbell mask */ - u_int32_t iop2drv_doorbell; /* 08,09,10,11: window of "instruction flags" from iop to driver */ - u_int32_t iop2drv_doorbell_mask; /* 12,13,14,15: doorbell mask */ + u_int8_t doorbell_reserved[ARCMSR_DRV2IOP_DOORBELL]; /*reserved */ + u_int32_t drv2iop_doorbell; /*offset 0x00020400:00,01,02,03: window of "instruction flags" from driver to iop */ + u_int32_t drv2iop_doorbell_mask; /* 04,05,06,07: doorbell mask */ + u_int32_t iop2drv_doorbell; /* 08,09,10,11: window of "instruction flags" from iop to driver */ + u_int32_t iop2drv_doorbell_mask; /* 12,13,14,15: doorbell mask */ }; /* ********************************************************************* @@ -500,11 +518,11 @@ struct HBB_DOORBELL */ struct HBB_RWBUFFER { - u_int8_t message_reserved0[ARCMSR_MSGCODE_RWBUFFER]; /*reserved */ - u_int32_t msgcode_rwbuffer[256]; /*offset 0x0000fa00: 0, 1, 2, 3,...,1023: message code read write 1024bytes */ - u_int32_t message_wbuffer[32]; /*offset 0x0000fe00:1024,1025,1026,1027,...,1151: user space data to iop 128bytes */ - u_int32_t message_reserved1[32]; /* 1152,1153,1154,1155,...,1279: message reserved*/ - u_int32_t message_rbuffer[32]; /*offset 0x0000ff00:1280,1281,1282,1283,...,1407: iop data to user space 128bytes */ + u_int8_t message_reserved0[ARCMSR_MSGCODE_RWBUFFER]; /*reserved */ + u_int32_t msgcode_rwbuffer[256]; /*offset 0x0000fa00: 0, 1, 2, 3,...,1023: message code read write 1024bytes */ + u_int32_t message_wbuffer[32]; /*offset 0x0000fe00:1024,1025,1026,1027,...,1151: user space data to iop 128bytes */ + u_int32_t message_reserved1[32]; /* 1152,1153,1154,1155,...,1279: message reserved*/ + u_int32_t message_rbuffer[32]; /*offset 0x0000ff00:1280,1281,1282,1283,...,1407: iop data to user space 128bytes */ }; /* ********************************************************************* @@ -513,12 +531,16 @@ struct HBB_RWBUFFER */ struct HBB_MessageUnit { - u_int32_t post_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; /* post queue buffer for iop */ - u_int32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; /* done queue buffer for iop */ - int32_t postq_index; /* post queue index */ - int32_t doneq_index; /* done queue index */ + u_int32_t post_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; /* post queue buffer for iop */ + u_int32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; /* done queue buffer for iop */ + int32_t postq_index; /* post queue index */ + int32_t doneq_index; /* done queue index */ struct HBB_DOORBELL *hbb_doorbell; struct HBB_RWBUFFER *hbb_rwbuffer; + bus_size_t drv2iop_doorbell; /* window of "instruction flags" from driver to iop */ + bus_size_t drv2iop_doorbell_mask; /* doorbell mask */ + bus_size_t iop2drv_doorbell; /* window of "instruction flags" from iop to driver */ + bus_size_t iop2drv_doorbell_mask; /* doorbell mask */ }; /* @@ -530,71 +552,71 @@ struct HBC_MessageUnit { u_int32_t message_unit_status; /*0000 0003*/ u_int32_t slave_error_attribute; /*0004 0007*/ u_int32_t slave_error_address; /*0008 000B*/ - u_int32_t posted_outbound_doorbell; /*000C 000F*/ + u_int32_t posted_outbound_doorbell; /*000C 000F*/ u_int32_t master_error_attribute; /*0010 0013*/ - u_int32_t master_error_address_low; /*0014 0017*/ - u_int32_t master_error_address_high; /*0018 001B*/ + u_int32_t master_error_address_low; /*0014 0017*/ + u_int32_t master_error_address_high; /*0018 001B*/ u_int32_t hcb_size; /*001C 001F size of the PCIe window used for HCB_Mode accesses*/ - u_int32_t inbound_doorbell; /*0020 0023*/ - u_int32_t diagnostic_rw_data; /*0024 0027*/ - u_int32_t diagnostic_rw_address_low; /*0028 002B*/ - u_int32_t diagnostic_rw_address_high; /*002C 002F*/ - u_int32_t host_int_status; /*0030 0033 host interrupt status*/ - u_int32_t host_int_mask; /*0034 0037 host interrupt mask*/ - u_int32_t dcr_data; /*0038 003B*/ - u_int32_t dcr_address; /*003C 003F*/ - u_int32_t inbound_queueport; /*0040 0043 port32 host inbound queue port*/ - u_int32_t outbound_queueport; /*0044 0047 port32 host outbound queue port*/ - u_int32_t hcb_pci_address_low; /*0048 004B*/ - u_int32_t hcb_pci_address_high; /*004C 004F*/ - u_int32_t iop_int_status; /*0050 0053*/ - u_int32_t iop_int_mask; /*0054 0057*/ - u_int32_t iop_inbound_queue_port; /*0058 005B*/ - u_int32_t iop_outbound_queue_port; /*005C 005F*/ - u_int32_t inbound_free_list_index; /*0060 0063 inbound free list producer consumer index*/ - u_int32_t inbound_post_list_index; /*0064 0067 inbound post list producer consumer index*/ - u_int32_t outbound_free_list_index; /*0068 006B outbound free list producer consumer index*/ - u_int32_t outbound_post_list_index; /*006C 006F outbound post list producer consumer index*/ - u_int32_t inbound_doorbell_clear; /*0070 0073*/ - u_int32_t i2o_message_unit_control; /*0074 0077*/ - u_int32_t last_used_message_source_address_low; /*0078 007B*/ - u_int32_t last_used_message_source_address_high; /*007C 007F*/ - u_int32_t pull_mode_data_byte_count[4]; /*0080 008F pull mode data byte count0..count7*/ - u_int32_t message_dest_address_index; /*0090 0093*/ - u_int32_t done_queue_not_empty_int_counter_timer; /*0094 0097*/ - u_int32_t utility_A_int_counter_timer; /*0098 009B*/ - u_int32_t outbound_doorbell; /*009C 009F*/ - u_int32_t outbound_doorbell_clear; /*00A0 00A3*/ - u_int32_t message_source_address_index; /*00A4 00A7 message accelerator source address consumer producer index*/ - u_int32_t message_done_queue_index; /*00A8 00AB message accelerator completion queue consumer producer index*/ - u_int32_t reserved0; /*00AC 00AF*/ - u_int32_t inbound_msgaddr0; /*00B0 00B3 scratchpad0*/ - u_int32_t inbound_msgaddr1; /*00B4 00B7 scratchpad1*/ - u_int32_t outbound_msgaddr0; /*00B8 00BB scratchpad2*/ - u_int32_t outbound_msgaddr1; /*00BC 00BF scratchpad3*/ - u_int32_t inbound_queueport_low; /*00C0 00C3 port64 host inbound queue port low*/ - u_int32_t inbound_queueport_high; /*00C4 00C7 port64 host inbound queue port high*/ - u_int32_t outbound_queueport_low; /*00C8 00CB port64 host outbound queue port low*/ - u_int32_t outbound_queueport_high; /*00CC 00CF port64 host outbound queue port high*/ - u_int32_t iop_inbound_queue_port_low; /*00D0 00D3*/ - u_int32_t iop_inbound_queue_port_high; /*00D4 00D7*/ - u_int32_t iop_outbound_queue_port_low; /*00D8 00DB*/ - u_int32_t iop_outbound_queue_port_high; /*00DC 00DF*/ - u_int32_t message_dest_queue_port_low; /*00E0 00E3 message accelerator destination queue port low*/ - u_int32_t message_dest_queue_port_high; /*00E4 00E7 message accelerator destination queue port high*/ - u_int32_t last_used_message_dest_address_low; /*00E8 00EB last used message accelerator destination address low*/ - u_int32_t last_used_message_dest_address_high; /*00EC 00EF last used message accelerator destination address high*/ - u_int32_t message_done_queue_base_address_low; /*00F0 00F3 message accelerator completion queue base address low*/ - u_int32_t message_done_queue_base_address_high; /*00F4 00F7 message accelerator completion queue base address high*/ - u_int32_t host_diagnostic; /*00F8 00FB*/ - u_int32_t write_sequence; /*00FC 00FF*/ - u_int32_t reserved1[34]; /*0100 0187*/ - u_int32_t reserved2[1950]; /*0188 1FFF*/ - u_int32_t message_wbuffer[32]; /*2000 207F*/ - u_int32_t reserved3[32]; /*2080 20FF*/ - u_int32_t message_rbuffer[32]; /*2100 217F*/ - u_int32_t reserved4[32]; /*2180 21FF*/ - u_int32_t msgcode_rwbuffer[256]; /*2200 23FF*/ + u_int32_t inbound_doorbell; /*0020 0023*/ + u_int32_t diagnostic_rw_data; /*0024 0027*/ + u_int32_t diagnostic_rw_address_low; /*0028 002B*/ + u_int32_t diagnostic_rw_address_high; /*002C 002F*/ + u_int32_t host_int_status; /*0030 0033 host interrupt status*/ + u_int32_t host_int_mask; /*0034 0037 host interrupt mask*/ + u_int32_t dcr_data; /*0038 003B*/ + u_int32_t dcr_address; /*003C 003F*/ + u_int32_t inbound_queueport; /*0040 0043 port32 host inbound queue port*/ + u_int32_t outbound_queueport; /*0044 0047 port32 host outbound queue port*/ + u_int32_t hcb_pci_address_low; /*0048 004B*/ + u_int32_t hcb_pci_address_high; /*004C 004F*/ + u_int32_t iop_int_status; /*0050 0053*/ + u_int32_t iop_int_mask; /*0054 0057*/ + u_int32_t iop_inbound_queue_port; /*0058 005B*/ + u_int32_t iop_outbound_queue_port; /*005C 005F*/ + u_int32_t inbound_free_list_index; /*0060 0063 inbound free list producer consumer index*/ + u_int32_t inbound_post_list_index; /*0064 0067 inbound post list producer consumer index*/ + u_int32_t outbound_free_list_index; /*0068 006B outbound free list producer consumer index*/ + u_int32_t outbound_post_list_index; /*006C 006F outbound post list producer consumer index*/ + u_int32_t inbound_doorbell_clear; /*0070 0073*/ + u_int32_t i2o_message_unit_control; /*0074 0077*/ + u_int32_t last_used_message_source_address_low; /*0078 007B*/ + u_int32_t last_used_message_source_address_high; /*007C 007F*/ + u_int32_t pull_mode_data_byte_count[4]; /*0080 008F pull mode data byte count0..count7*/ + u_int32_t message_dest_address_index; /*0090 0093*/ + u_int32_t done_queue_not_empty_int_counter_timer; /*0094 0097*/ + u_int32_t utility_A_int_counter_timer; /*0098 009B*/ + u_int32_t outbound_doorbell; /*009C 009F*/ + u_int32_t outbound_doorbell_clear; /*00A0 00A3*/ + u_int32_t message_source_address_index; /*00A4 00A7 message accelerator source address consumer producer index*/ + u_int32_t message_done_queue_index; /*00A8 00AB message accelerator completion queue consumer producer index*/ + u_int32_t reserved0; /*00AC 00AF*/ + u_int32_t inbound_msgaddr0; /*00B0 00B3 scratchpad0*/ + u_int32_t inbound_msgaddr1; /*00B4 00B7 scratchpad1*/ + u_int32_t outbound_msgaddr0; /*00B8 00BB scratchpad2*/ + u_int32_t outbound_msgaddr1; /*00BC 00BF scratchpad3*/ + u_int32_t inbound_queueport_low; /*00C0 00C3 port64 host inbound queue port low*/ + u_int32_t inbound_queueport_high; /*00C4 00C7 port64 host inbound queue port high*/ + u_int32_t outbound_queueport_low; /*00C8 00CB port64 host outbound queue port low*/ + u_int32_t outbound_queueport_high; /*00CC 00CF port64 host outbound queue port high*/ + u_int32_t iop_inbound_queue_port_low; /*00D0 00D3*/ + u_int32_t iop_inbound_queue_port_high; /*00D4 00D7*/ + u_int32_t iop_outbound_queue_port_low; /*00D8 00DB*/ + u_int32_t iop_outbound_queue_port_high; /*00DC 00DF*/ + u_int32_t message_dest_queue_port_low; /*00E0 00E3 message accelerator destination queue port low*/ + u_int32_t message_dest_queue_port_high; /*00E4 00E7 message accelerator destination queue port high*/ + u_int32_t last_used_message_dest_address_low; /*00E8 00EB last used message accelerator destination address low*/ + u_int32_t last_used_message_dest_address_high; /*00EC 00EF last used message accelerator destination address high*/ + u_int32_t message_done_queue_base_address_low; /*00F0 00F3 message accelerator completion queue base address low*/ + u_int32_t message_done_queue_base_address_high; /*00F4 00F7 message accelerator completion queue base address high*/ + u_int32_t host_diagnostic; /*00F8 00FB*/ + u_int32_t write_sequence; /*00FC 00FF*/ + u_int32_t reserved1[34]; /*0100 0187*/ + u_int32_t reserved2[1950]; /*0188 1FFF*/ + u_int32_t message_wbuffer[32]; /*2000 207F*/ + u_int32_t reserved3[32]; /*2080 20FF*/ + u_int32_t message_rbuffer[32]; /*2100 217F*/ + u_int32_t reserved4[32]; /*2180 21FF*/ + u_int32_t msgcode_rwbuffer[256]; /*2200 23FF*/ }; /* ********************************************************************* @@ -616,46 +638,46 @@ struct OutBound_SRB { struct HBD_MessageUnit { uint32_t reserved0; uint32_t chip_id; //0x0004 - uint32_t cpu_mem_config; //0x0008 - uint32_t reserved1[10]; //0x000C + uint32_t cpu_mem_config; //0x0008 + uint32_t reserved1[10]; //0x000C uint32_t i2o_host_interrupt_mask; //0x0034 - uint32_t reserved2[114]; //0x0038 - uint32_t host_int_status; //0x0200 - uint32_t host_int_enable; //0x0204 - uint32_t reserved3[1]; //0x0208 - uint32_t pcief0_int_enable; //0x020C - uint32_t reserved4[124]; //0x0210 - uint32_t inbound_msgaddr0; //0x0400 - uint32_t inbound_msgaddr1; //0x0404 - uint32_t reserved5[6]; //0x0408 - uint32_t outbound_msgaddr0; //0x0420 - uint32_t outbound_msgaddr1; //0x0424 - uint32_t reserved6[14]; //0x0428 - uint32_t inbound_doorbell; //0x0460 - uint32_t reserved7[7]; //0x0464 - uint32_t outbound_doorbell; //0x0480 + uint32_t reserved2[114]; //0x0038 + uint32_t host_int_status; //0x0200 + uint32_t host_int_enable; //0x0204 + uint32_t reserved3[1]; //0x0208 + uint32_t pcief0_int_enable; //0x020C + uint32_t reserved4[124]; //0x0210 + uint32_t inbound_msgaddr0; //0x0400 + uint32_t inbound_msgaddr1; //0x0404 + uint32_t reserved5[6]; //0x0408 + uint32_t outbound_msgaddr0; //0x0420 + uint32_t outbound_msgaddr1; //0x0424 + uint32_t reserved6[14]; //0x0428 + uint32_t inbound_doorbell; //0x0460 + uint32_t reserved7[7]; //0x0464 + uint32_t outbound_doorbell; //0x0480 uint32_t outbound_doorbell_enable; //0x0484 uint32_t reserved8[734]; //0x0488 - uint32_t inboundlist_base_low; //0x1000 - uint32_t inboundlist_base_high; //0x1004 - uint32_t reserved9[4]; //0x1008 + uint32_t inboundlist_base_low; //0x1000 + uint32_t inboundlist_base_high; //0x1004 + uint32_t reserved9[4]; //0x1008 uint32_t inboundlist_write_pointer; //0x1018 uint32_t inboundlist_read_pointer; //0x101C uint32_t reserved10[16]; //0x1020 - uint32_t outboundlist_base_low; //0x1060 + uint32_t outboundlist_base_low; //0x1060 uint32_t outboundlist_base_high; //0x1064 - uint32_t reserved11; //0x1068 + uint32_t reserved11; //0x1068 uint32_t outboundlist_copy_pointer; //0x106C uint32_t outboundlist_read_pointer; //0x1070 0x1072 - uint32_t reserved12[5]; //0x1074 + uint32_t reserved12[5]; //0x1074 uint32_t outboundlist_interrupt_cause; //0x1088 uint32_t outboundlist_interrupt_enable; //0x108C uint32_t reserved13[988]; //0x1090 - uint32_t message_wbuffer[32]; //0x2000 + uint32_t message_wbuffer[32]; //0x2000 uint32_t reserved14[32]; //0x2080 - uint32_t message_rbuffer[32]; //0x2100 + uint32_t message_rbuffer[32]; //0x2100 uint32_t reserved15[32]; //0x2180 - uint32_t msgcode_rwbuffer[256]; //0x2200 + uint32_t msgcode_rwbuffer[256]; //0x2200 }; struct HBD_MessageUnit0 { @@ -674,10 +696,10 @@ struct HBD_MessageUnit0 { struct MessageUnit_UNION { union { - struct HBA_MessageUnit hbamu; - struct HBB_MessageUnit hbbmu; - struct HBC_MessageUnit hbcmu; - struct HBD_MessageUnit0 hbdmu; + struct HBA_MessageUnit hbamu; + struct HBB_MessageUnit hbbmu; + struct HBC_MessageUnit hbcmu; + struct HBD_MessageUnit0 hbdmu; } muu; }; /* @@ -685,7 +707,7 @@ struct MessageUnit_UNION ** structure for holding DMA address data ************************************************************* */ -#define IS_SG64_ADDR 0x01000000 /* bit24 */ +#define IS_SG64_ADDR 0x01000000 /* bit24 */ /* ************************************************************************************************ ** ARECA FIRMWARE SPEC @@ -694,10 +716,10 @@ struct MessageUnit_UNION ** (All In/Out is in IOP331's view) ** 1. Message 0 --> InitThread message and retrun code ** 2. Doorbell is used for RS-232 emulation -** inDoorBell : bit0 -- data in ready (DRIVER DATA WRITE OK) -** bit1 -- data out has been read (DRIVER DATA READ OK) -** outDooeBell: bit0 -- data out ready (IOP331 DATA WRITE OK) -** bit1 -- data in has been read (IOP331 DATA READ OK) +** inDoorBell : bit0 -- data in ready (DRIVER DATA WRITE OK) +** bit1 -- data out has been read (DRIVER DATA READ OK) +** outDooeBell: bit0 -- data out ready (IOP331 DATA WRITE OK) +** bit1 -- data in has been read (IOP331 DATA READ OK) ** 3. Index Memory Usage ** offset 0xf00 : for RS232 out (request buffer) ** offset 0xe00 : for RS232 in (scratch buffer) @@ -710,66 +732,66 @@ struct MessageUnit_UNION ** 5. PostQ ** All SCSI Command must be sent through postQ: ** (inbound queue port) Request frame must be 32 bytes aligned -** # bit27--bit31 => flag for post ccb -** # bit0--bit26 => real address (bit27--bit31) of post arcmsr_cdb -** bit31 : 0 : 256 bytes frame -** 1 : 512 bytes frame -** bit30 : 0 : normal request -** 1 : BIOS request -** bit29 : reserved -** bit28 : reserved -** bit27 : reserved +** # bit27--bit31 => flag for post ccb +** # bit0--bit26 => real address (bit27--bit31) of post arcmsr_cdb +** bit31 : 0 : 256 bytes frame +** 1 : 512 bytes frame +** bit30 : 0 : normal request +** 1 : BIOS request +** bit29 : reserved +** bit28 : reserved +** bit27 : reserved ** ------------------------------------------------------------------------------- ** (outbount queue port) Request reply -** # bit27--bit31 => flag for reply -** # bit0--bit26 => real address (bit27--bit31) of reply arcmsr_cdb -** bit31 : must be 0 (for this type of reply) -** bit30 : reserved for BIOS handshake -** bit29 : reserved -** bit28 : 0 : no error, ignore AdapStatus/DevStatus/SenseData -** 1 : Error, error code in AdapStatus/DevStatus/SenseData -** bit27 : reserved +** # bit27--bit31 => flag for reply +** # bit0--bit26 => real address (bit27--bit31) of reply arcmsr_cdb +** bit31 : must be 0 (for this type of reply) +** bit30 : reserved for BIOS handshake +** bit29 : reserved +** bit28 : 0 : no error, ignore AdapStatus/DevStatus/SenseData +** 1 : Error, error code in AdapStatus/DevStatus/SenseData +** bit27 : reserved ** 6. BIOS request ** All BIOS request is the same with request from PostQ ** Except : ** Request frame is sent from configuration space -** offset: 0x78 : Request Frame (bit30 == 1) -** offset: 0x18 : writeonly to generate IRQ to IOP331 +** offset: 0x78 : Request Frame (bit30 == 1) +** offset: 0x18 : writeonly to generate IRQ to IOP331 ** Completion of request: -** (bit30 == 0, bit28==err flag) +** (bit30 == 0, bit28==err flag) ** 7. Definition of SGL entry (structure) ** 8. Message1 Out - Diag Status Code (????) ** 9. Message0 message code : ** 0x00 : NOP ** 0x01 : Get Config ->offset 0xa00 :for outbound message code msgcode_rwbuffer (IOP331 send to driver) -** Signature 0x87974060(4) -** Request len 0x00000200(4) -** numbers of queue 0x00000100(4) -** SDRAM Size 0x00000100(4)-->256 MB -** IDE Channels 0x00000008(4) -** vendor 40 bytes char -** model 8 bytes char -** FirmVer 16 bytes char -** Device Map 16 bytes char +** Signature 0x87974060(4) +** Request len 0x00000200(4) +** numbers of queue 0x00000100(4) +** SDRAM Size 0x00000100(4)-->256 MB +** IDE Channels 0x00000008(4) +** vendor 40 bytes char +** model 8 bytes char +** FirmVer 16 bytes char +** Device Map 16 bytes char ** ** FirmwareVersion DWORD <== Added for checking of new firmware capability ** 0x02 : Set Config ->offset 0xa00 : for inbound message code msgcode_rwbuffer (driver send to IOP331) -** Signature 0x87974063(4) -** UPPER32 of Request Frame (4)-->Driver Only +** Signature 0x87974063(4) +** UPPER32 of Request Frame (4)-->Driver Only ** 0x03 : Reset (Abort all queued Command) ** 0x04 : Stop Background Activity ** 0x05 : Flush Cache ** 0x06 : Start Background Activity (re-start if background is halted) ** 0x07 : Check If Host Command Pending (Novell May Need This Function) ** 0x08 : Set controller time ->offset 0xa00 : for inbound message code msgcode_rwbuffer (driver to IOP331) -** byte 0 : 0xaa <-- signature -** byte 1 : 0x55 <-- signature -** byte 2 : year (04) -** byte 3 : month (1..12) -** byte 4 : date (1..31) -** byte 5 : hour (0..23) -** byte 6 : minute (0..59) -** byte 7 : second (0..59) +** byte 0 : 0xaa <-- signature +** byte 1 : 0x55 <-- signature +** byte 2 : year (04) +** byte 3 : month (1..12) +** byte 4 : date (1..31) +** byte 5 : hour (0..23) +** byte 6 : minute (0..59) +** byte 7 : second (0..59) ** ********************************************************************************* ** Porting Of LSI2108/2116 Based PCIE SAS/6G host raid adapter ** ==> Difference from IOP348 @@ -788,33 +810,33 @@ struct MessageUnit_UNION ** b. Message0: message code ** 0x00 : NOP ** 0x01 : Get Config ->offset 0xB8 :for outbound message code msgcode_rwbuffer (IOP send to driver) -** Signature 0x87974060(4) -** Request len 0x00000200(4) -** numbers of queue 0x00000100(4) -** SDRAM Size 0x00000100(4)-->256 MB -** IDE Channels 0x00000008(4) -** vendor 40 bytes char -** model 8 bytes char -** FirmVer 16 bytes char -** Device Map 16 bytes char -** cfgVersion ULONG <== Added for checking of new firmware capability +** Signature 0x87974060(4) +** Request len 0x00000200(4) +** numbers of queue 0x00000100(4) +** SDRAM Size 0x00000100(4)-->256 MB +** IDE Channels 0x00000008(4) +** vendor 40 bytes char +** model 8 bytes char +** FirmVer 16 bytes char +** Device Map 16 bytes char +** cfgVersion ULONG <== Added for checking of new firmware capability ** 0x02 : Set Config ->offset 0xB0 :for inbound message code msgcode_rwbuffer (driver send to IOP) -** Signature 0x87974063(4) -** UPPER32 of Request Frame (4)-->Driver Only +** Signature 0x87974063(4) +** UPPER32 of Request Frame (4)-->Driver Only ** 0x03 : Reset (Abort all queued Command) ** 0x04 : Stop Background Activity ** 0x05 : Flush Cache ** 0x06 : Start Background Activity (re-start if background is halted) ** 0x07 : Check If Host Command Pending (Novell May Need This Function) ** 0x08 : Set controller time ->offset 0xB0 : for inbound message code msgcode_rwbuffer (driver to IOP) -** byte 0 : 0xaa <-- signature -** byte 1 : 0x55 <-- signature -** byte 2 : year (04) -** byte 3 : month (1..12) -** byte 4 : date (1..31) -** byte 5 : hour (0..23) -** byte 6 : minute (0..59) -** byte 7 : second (0..59) +** byte 0 : 0xaa <-- signature +** byte 1 : 0x55 <-- signature +** byte 2 : year (04) +** byte 3 : month (1..12) +** byte 4 : date (1..31) +** byte 5 : hour (0..23) +** byte 6 : minute (0..59) +** byte 7 : second (0..59) ** ** <2> Doorbell Register is used for RS-232 emulation ** different clear register @@ -907,21 +929,21 @@ struct MessageUnit_UNION */ /* size 8 bytes */ /* 32bit Scatter-Gather list */ -struct SG32ENTRY { /* length bit 24 == 0 */ - u_int32_t length; /* high 8 bit == flag,low 24 bit == length */ - u_int32_t address; +struct SG32ENTRY { /* length bit 24 == 0 */ + u_int32_t length; /* high 8 bit == flag,low 24 bit == length */ + u_int32_t address; }; /* size 12 bytes */ /* 64bit Scatter-Gather list */ -struct SG64ENTRY { /* length bit 24 == 1 */ - u_int32_t length; /* high 8 bit == flag,low 24 bit == length */ - u_int32_t address; - u_int32_t addresshigh; +struct SG64ENTRY { /* length bit 24 == 1 */ + u_int32_t length; /* high 8 bit == flag,low 24 bit == length */ + u_int32_t address; + u_int32_t addresshigh; }; struct SGENTRY_UNION { union { - struct SG32ENTRY sg32entry; /* 30h Scatter gather address */ - struct SG64ENTRY sg64entry; /* 30h */ + struct SG32ENTRY sg32entry; /* 30h Scatter gather address */ + struct SG64ENTRY sg64entry; /* 30h */ }u; }; /* @@ -931,14 +953,14 @@ struct SGENTRY_UNION { */ struct QBUFFER { u_int32_t data_len; - u_int8_t data[124]; + u_int8_t data[124]; }; /* ********************************** */ typedef struct PHYS_ADDR64 { - u_int32_t phyadd_low; - u_int32_t phyadd_high; + u_int32_t phyadd_low; + u_int32_t phyadd_high; }PHYSADDR64; /* ************************************************************************************************ @@ -958,11 +980,11 @@ struct FIRMWARE_INFO { u_int32_t ide_channels; /*4,16-19*/ char vendor[40]; /*5,20-59*/ char model[8]; /*15,60-67*/ - char firmware_ver[16]; /*17,68-83*/ + char firmware_ver[16]; /*17,68-83*/ char device_map[16]; /*21,84-99*/ - u_int32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/ - char cfgSerial[16]; /*26,104-119*/ - u_int32_t cfgPicStatus; /*30,120-123*/ + u_int32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/ + char cfgSerial[16]; /*26,104-119*/ + u_int32_t cfgPicStatus; /*30,120-123*/ }; /* (A) For cfgVersion in FIRMWARE_INFO ** if low BYTE (byte#0) >= 3 (version 3) @@ -1022,8 +1044,8 @@ struct ARCMSR_CDB { u_int8_t SenseData[15]; /* 21h output */ union { - struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h Scatter gather address */ - struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h */ + struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h Scatter gather address */ + struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h */ } u; }; /* CDB flag */ @@ -1044,9 +1066,9 @@ struct ARCMSR_CDB { #define SCSISTAT_COMMAND_TERMINATED 0x22 #define SCSISTAT_QUEUE_FULL 0x28 /* DeviceStatus */ -#define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 -#define ARCMSR_DEV_ABORTED 0xF1 -#define ARCMSR_DEV_INIT_FAIL 0xF2 +#define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 +#define ARCMSR_DEV_ABORTED 0xF1 +#define ARCMSR_DEV_INIT_FAIL 0xF2 /* ********************************************************************* ** Command Control Block (SrbExtension) @@ -1056,40 +1078,40 @@ struct ARCMSR_CDB { ********************************************************************* */ struct CommandControlBlock { - struct ARCMSR_CDB arcmsr_cdb; /* 0 -503 (size of CDB=504): arcmsr messenger scsi command descriptor size 504 bytes */ - u_int32_t cdb_phyaddr_low; /* 504-507 */ - u_int32_t arc_cdb_size; /* 508-511 */ + struct ARCMSR_CDB arcmsr_cdb; /* 0 -503 (size of CDB=504): arcmsr messenger scsi command descriptor size 504 bytes */ + u_int32_t cdb_phyaddr_low; /* 504-507 */ + u_int32_t arc_cdb_size; /* 508-511 */ /* ======================512+32 bytes============================ */ - union ccb *pccb; /* 512-515 516-519 pointer of freebsd scsi command */ - struct AdapterControlBlock *acb; /* 520-523 524-527 */ - bus_dmamap_t dm_segs_dmamap; /* 528-531 532-535 */ - u_int16_t srb_flags; /* 536-537 */ - u_int16_t srb_state; /* 538-539 */ - u_int32_t cdb_phyaddr_high; /* 540-543 */ - struct callout ccb_callout; + union ccb *pccb; /* 512-515 516-519 pointer of freebsd scsi command */ + struct AdapterControlBlock *acb; /* 520-523 524-527 */ + bus_dmamap_t dm_segs_dmamap; /* 528-531 532-535 */ + u_int16_t srb_flags; /* 536-537 */ + u_int16_t srb_state; /* 538-539 */ + u_int32_t cdb_phyaddr_high; /* 540-543 */ + struct callout ccb_callout; /* ========================================================== */ }; /* srb_flags */ -#define SRB_FLAG_READ 0x0000 -#define SRB_FLAG_WRITE 0x0001 -#define SRB_FLAG_ERROR 0x0002 -#define SRB_FLAG_FLUSHCACHE 0x0004 +#define SRB_FLAG_READ 0x0000 +#define SRB_FLAG_WRITE 0x0001 +#define SRB_FLAG_ERROR 0x0002 +#define SRB_FLAG_FLUSHCACHE 0x0004 #define SRB_FLAG_MASTER_ABORTED 0x0008 -#define SRB_FLAG_DMAVALID 0x0010 +#define SRB_FLAG_DMAVALID 0x0010 #define SRB_FLAG_DMACONSISTENT 0x0020 -#define SRB_FLAG_DMAWRITE 0x0040 -#define SRB_FLAG_PKTBIND 0x0080 +#define SRB_FLAG_DMAWRITE 0x0040 +#define SRB_FLAG_PKTBIND 0x0080 #define SRB_FLAG_TIMER_START 0x0080 /* srb_state */ -#define ARCMSR_SRB_DONE 0x0000 -#define ARCMSR_SRB_UNBUILD 0x0000 -#define ARCMSR_SRB_TIMEOUT 0x1111 -#define ARCMSR_SRB_RETRY 0x2222 -#define ARCMSR_SRB_START 0x55AA -#define ARCMSR_SRB_PENDING 0xAA55 -#define ARCMSR_SRB_RESET 0xA5A5 -#define ARCMSR_SRB_ABORTED 0x5A5A -#define ARCMSR_SRB_ILLEGAL 0xFFFF +#define ARCMSR_SRB_DONE 0x0000 +#define ARCMSR_SRB_UNBUILD 0x0000 +#define ARCMSR_SRB_TIMEOUT 0x1111 +#define ARCMSR_SRB_RETRY 0x2222 +#define ARCMSR_SRB_START 0x55AA +#define ARCMSR_SRB_PENDING 0xAA55 +#define ARCMSR_SRB_RESET 0xA5A5 +#define ARCMSR_SRB_ABORTED 0x5A5A +#define ARCMSR_SRB_ILLEGAL 0xFFFF #define SRB_SIZE ((sizeof(struct CommandControlBlock)+0x1f) & 0xffe0) #define ARCMSR_SRBS_POOL_SIZE (SRB_SIZE * ARCMSR_MAX_FREESRB_NUM) @@ -1099,108 +1121,109 @@ struct CommandControlBlock { ** Adapter Control Block ********************************************************************* */ -#define ACB_ADAPTER_TYPE_A 0x00000001 /* hba I IOP */ -#define ACB_ADAPTER_TYPE_B 0x00000002 /* hbb M IOP */ -#define ACB_ADAPTER_TYPE_C 0x00000004 /* hbc L IOP */ -#define ACB_ADAPTER_TYPE_D 0x00000008 /* hbd M IOP */ +#define ACB_ADAPTER_TYPE_A 0x00000001 /* hba I IOP */ +#define ACB_ADAPTER_TYPE_B 0x00000002 /* hbb M IOP */ +#define ACB_ADAPTER_TYPE_C 0x00000004 /* hbc L IOP */ +#define ACB_ADAPTER_TYPE_D 0x00000008 /* hbd M IOP */ struct AdapterControlBlock { - u_int32_t adapter_type; /* adapter A,B..... */ + u_int32_t adapter_type; /* adapter A,B..... */ - bus_space_tag_t btag[2]; - bus_space_handle_t bhandle[2]; - bus_dma_tag_t parent_dmat; - bus_dma_tag_t dm_segs_dmat; /* dmat for buffer I/O */ - bus_dma_tag_t srb_dmat; /* dmat for freesrb */ - bus_dmamap_t srb_dmamap; - device_t pci_dev; + bus_space_tag_t btag[2]; + bus_space_handle_t bhandle[2]; + bus_dma_tag_t parent_dmat; + bus_dma_tag_t dm_segs_dmat; /* dmat for buffer I/O */ + bus_dma_tag_t srb_dmat; /* dmat for freesrb */ + bus_dmamap_t srb_dmamap; + device_t pci_dev; #if __FreeBSD_version < 503000 - dev_t ioctl_dev; + dev_t ioctl_dev; #else - struct cdev *ioctl_dev; + struct cdev *ioctl_dev; #endif - int pci_unit; + int pci_unit; - struct resource *sys_res_arcmsr[2]; - struct resource *irqres; - void *ih; /* interrupt handle */ + struct resource *sys_res_arcmsr[2]; + struct resource *irqres; + void *ih; /* interrupt handle */ /* Hooks into the CAM XPT */ - struct cam_sim *psim; - struct cam_path *ppath; - u_int8_t *uncacheptr; - unsigned long vir2phy_offset; + struct cam_sim *psim; + struct cam_path *ppath; + u_int8_t *uncacheptr; + unsigned long vir2phy_offset; union { - unsigned long phyaddr; + unsigned long phyaddr; struct { - u_int32_t phyadd_low; - u_int32_t phyadd_high; + u_int32_t phyadd_low; + u_int32_t phyadd_high; }B; - } srb_phyaddr; + }srb_phyaddr; // unsigned long srb_phyaddr; /* Offset is used in making arc cdb physical to virtual calculations */ - u_int32_t outbound_int_enable; + u_int32_t outbound_int_enable; - struct MessageUnit_UNION *pmu; /* message unit ATU inbound base address0 */ + struct MessageUnit_UNION *pmu; /* message unit ATU inbound base address0 */ - u_int8_t adapter_index; /* */ - u_int8_t irq; - u_int16_t acb_flags; /* */ + u_int8_t adapter_index; + u_int8_t irq; + u_int16_t acb_flags; struct CommandControlBlock *psrb_pool[ARCMSR_MAX_FREESRB_NUM]; /* serial srb pointer array */ struct CommandControlBlock *srbworkingQ[ARCMSR_MAX_FREESRB_NUM]; /* working srb pointer array */ - int32_t workingsrb_doneindex; /* done srb array index */ - int32_t workingsrb_startindex; /* start srb array index */ - int32_t srboutstandingcount; + int32_t workingsrb_doneindex; /* done srb array index */ + int32_t workingsrb_startindex; /* start srb array index */ + int32_t srboutstandingcount; - u_int8_t rqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for read from 80331 */ - u_int32_t rqbuf_firstindex; /* first of read buffer */ - u_int32_t rqbuf_lastindex; /* last of read buffer */ + u_int8_t rqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for read from 80331 */ + u_int32_t rqbuf_firstindex; /* first of read buffer */ + u_int32_t rqbuf_lastindex; /* last of read buffer */ - u_int8_t wqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for write to 80331 */ - u_int32_t wqbuf_firstindex; /* first of write buffer */ - u_int32_t wqbuf_lastindex; /* last of write buffer */ + u_int8_t wqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for write to 80331 */ + u_int32_t wqbuf_firstindex; /* first of write buffer */ + u_int32_t wqbuf_lastindex; /* last of write buffer */ - arcmsr_lock_t isr_lock; - arcmsr_lock_t srb_lock; - arcmsr_lock_t postDone_lock; - arcmsr_lock_t qbuffer_lock; + arcmsr_lock_t isr_lock; + arcmsr_lock_t srb_lock; + arcmsr_lock_t postDone_lock; + arcmsr_lock_t qbuffer_lock; - u_int8_t devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN]; /* id0 ..... id15,lun0...lun7 */ - u_int32_t num_resets; - u_int32_t num_aborts; - u_int32_t firm_request_len; /*1,04-07*/ - u_int32_t firm_numbers_queue; /*2,08-11*/ - u_int32_t firm_sdram_size; /*3,12-15*/ - u_int32_t firm_ide_channels; /*4,16-19*/ - u_int32_t firm_cfg_version; - char firm_model[12]; /*15,60-67*/ - char firm_version[20]; /*17,68-83*/ - char device_map[20]; /*21,84-99 */ - struct callout devmap_callout; - u_int32_t pktRequestCount; - u_int32_t pktReturnCount; - u_int32_t vendor_device_id; - u_int32_t adapter_bus_speed; - u_int32_t maxOutstanding; + u_int8_t devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN]; /* id0 ..... id15,lun0...lun7 */ + u_int32_t num_resets; + u_int32_t num_aborts; + u_int32_t firm_request_len; /*1,04-07*/ + u_int32_t firm_numbers_queue; /*2,08-11*/ + u_int32_t firm_sdram_size; /*3,12-15*/ + u_int32_t firm_ide_channels; /*4,16-19*/ + u_int32_t firm_cfg_version; + char firm_model[12]; /*15,60-67*/ + char firm_version[20]; /*17,68-83*/ + char device_map[20]; /*21,84-99 */ + struct callout devmap_callout; + u_int32_t pktRequestCount; + u_int32_t pktReturnCount; + u_int32_t vendor_device_id; + u_int32_t adapter_bus_speed; + u_int32_t maxOutstanding; + u_int16_t sub_device_id; };/* HW_DEVICE_EXTENSION */ /* acb_flags */ #define ACB_F_SCSISTOPADAPTER 0x0001 -#define ACB_F_MSG_STOP_BGRB 0x0002 /* stop RAID background rebuild */ -#define ACB_F_MSG_START_BGRB 0x0004 /* stop RAID background rebuild */ -#define ACB_F_IOPDATA_OVERFLOW 0x0008 /* iop ioctl data rqbuffer overflow */ -#define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010 /* ioctl clear wqbuffer */ -#define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020 /* ioctl clear rqbuffer */ +#define ACB_F_MSG_STOP_BGRB 0x0002 /* stop RAID background rebuild */ +#define ACB_F_MSG_START_BGRB 0x0004 /* stop RAID background rebuild */ +#define ACB_F_IOPDATA_OVERFLOW 0x0008 /* iop ioctl data rqbuffer overflow */ +#define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010 /* ioctl clear wqbuffer */ +#define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020 /* ioctl clear rqbuffer */ #define ACB_F_MESSAGE_WQBUFFER_READ 0x0040 #define ACB_F_BUS_RESET 0x0080 -#define ACB_F_IOP_INITED 0x0100 /* iop init */ -#define ACB_F_MAPFREESRB_FAILD 0x0200 /* arcmsr_map_freesrb faild */ +#define ACB_F_IOP_INITED 0x0100 /* iop init */ +#define ACB_F_MAPFREESRB_FAILD 0x0200 /* arcmsr_map_freesrb faild */ #define ACB_F_CAM_DEV_QFRZN 0x0400 -#define ACB_F_BUS_HANG_ON 0x0800 /* need hardware reset bus */ +#define ACB_F_BUS_HANG_ON 0x0800 /* need hardware reset bus */ #define ACB_F_SRB_FUNCTION_POWER 0x1000 /* devstate */ -#define ARECA_RAID_GONE 0x55 -#define ARECA_RAID_GOOD 0xaa +#define ARECA_RAID_GONE 0x55 +#define ARECA_RAID_GOOD 0xaa /* adapter_bus_speed */ #define ACB_BUS_SPEED_3G 0 #define ACB_BUS_SPEED_6G 1 @@ -1231,17 +1254,17 @@ struct SENSE_DATA { ** Peripheral Device Type definitions ********************************** */ -#define SCSI_DASD 0x00 /* Direct-access Device */ +#define SCSI_DASD 0x00 /* Direct-access Device */ #define SCSI_SEQACESS 0x01 /* Sequential-access device */ #define SCSI_PRINTER 0x02 /* Printer device */ #define SCSI_PROCESSOR 0x03 /* Processor device */ #define SCSI_WRITEONCE 0x04 /* Write-once device */ -#define SCSI_CDROM 0x05 /* CD-ROM device */ +#define SCSI_CDROM 0x05 /* CD-ROM device */ #define SCSI_SCANNER 0x06 /* Scanner device */ #define SCSI_OPTICAL 0x07 /* Optical memory device */ #define SCSI_MEDCHGR 0x08 /* Medium changer device */ -#define SCSI_COMM 0x09 /* Communications device */ -#define SCSI_NODEV 0x1F /* Unknown or no device type */ +#define SCSI_COMM 0x09 /* Communications device */ +#define SCSI_NODEV 0x1F /* Unknown or no device type */ /* ************************************************************************************************************ ** @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ -- cgit v1.1